Low Temperature Al-Al Thermo-compression Bonding with Sn Oxidation Protect Layer for Wafer-level Hermetic Sealing

2016 ◽  
Vol 136 (6) ◽  
pp. 237-243 ◽  
Author(s):  
Shiro Satoh ◽  
Hideyuki Fukushi ◽  
Masayoshi Esashi ◽  
Shuji Tanaka
Keyword(s):  
Low Temperature ◽  
Wafer Level ◽  
Hermetic Sealing

scholarly journals Low-Temperature Al-Al Thermocompression Bonding with Sn Oxidation Protect Layer for Wafer-Level Hermetic Sealing

2017 ◽  
Vol 100 (8) ◽  
pp. 43-50
Author(s):  
SHIRO SATOH ◽  
HIDEYUKI FUKUSHI ◽  
MASAYOSHI ESASHI ◽  
SHUJI TANAKA
Keyword(s):  
Low Temperature ◽  
Wafer Level ◽  
Hermetic Sealing ◽  
Thermocompression Bonding

Reliability of Hermetic RF MEMS Wafer Level Packaging Using Au-Sn Eutectic Bonding

2006 ◽  
Vol 326-328 ◽  
pp. 609-612
Author(s):  
Qian Wang ◽  
Sung Hoon Choa ◽  
Woon Bae Kim ◽  
Jun Sik Hwang ◽  
Suk Jin Ham ◽  
...  
Keyword(s):  
Shear Strength ◽  
Low Temperature ◽  
Insertion Loss ◽  
Rf Mems ◽  
Wafer Level ◽  
Eutectic Bonding ◽  
Wafer Level Packaging ◽  
Hermetic Sealing ◽  
Multilayer Metallization

In this paper, a low temperature hermetic wafer level packaging scheme for the RFMEMS devices is presented. For hermetic sealing, Au-Sn multilayer metallization with a square loop of 70 %m in width is performed. The size of the MEMS package is 1mm × 1mm × 700 %m. The shear strength and hermeticity of the package satisfy the requirements of MIL-STD-883F. The total insertion loss for the packaging is 0.075 dB at 2 GHz.

Hermetic Seal Bonding at Low-temperature with Sub-micron Gold Particles for Wafer Level Packaging

2015 ◽  
Vol 2015 (1) ◽  
pp. 000073-000078 ◽  
Author(s):  
Toshinori Ogashiwa ◽  
Kentaro Totsu ◽  
Mitsutomo Nishizawa ◽  
Hiroyuki Ishida ◽  
Yuya Sasaki ◽  
...  
Keyword(s):  
Low Temperature ◽  
Leak Rate ◽  
Surface Irregularity ◽  
Wafer Level ◽  
Gold Particles ◽  
Wafer Level Packaging ◽  
Hermetic Sealing ◽  
Hermetic Seal ◽  
Micron Size ◽  
Surface Flatness

Au/Au hermetic sealing was successfully done using a rim structure covered with sub-micron-size Au particles by low-temperature thermo-compression bonding. The easy deformability of sintered Au particles is advantageous in terms of the compliance with surface irregularity as well as the insensitivity of surface flatness. From the deflection of Si diaphragms over the sealed cavity, an inside pressure of 100 Pa and the maximum leak rate in a range of 10−14 Pa·m3/s (He) were estimated, which is sufficient for many MEMS applications.

Role of Thin Sn Layer for Low Temperature Al-Al Thermo-compression Bonding of Wafer-Level Hermetic Sealing

2018 ◽  
Vol 101 (5) ◽  
pp. 33-40
Author(s):  
SHIRO SATOH ◽  
HIDEYUKI FUKUSHI ◽  
MASAYOSHI ESASHI ◽  
SHUJI TANAKA
Keyword(s):  
Low Temperature ◽  
Wafer Level ◽  
Hermetic Sealing

Role of Thin Sn Layer for Low Temperature Al-Al Thermo-compression Bonding of Wafer-level Hermetic Sealing

2017 ◽  
Vol 137 (12) ◽  
pp. 432-437 ◽  
Author(s):  
Shiro Satoh ◽  
Hideyuki Fukushi ◽  
Masayoshi Esashi ◽  
Shuji Tanaka
Keyword(s):  
Low Temperature ◽  
Wafer Level ◽  
Hermetic Sealing

High Precision Low Temperature Direct Wafer Bonding Technology for Wafer-Level 3D ICs Manufacturing

2016 ◽  
Vol 75 (9) ◽  
pp. 345-353 ◽  
Author(s):  
F. Kurz ◽  
T. Plach ◽  
J. Suss ◽  
T. Wagenleitner ◽  
D. Zinner ◽  
...  
Keyword(s):  
Low Temperature ◽  
High Precision ◽  
Wafer Bonding ◽  
Wafer Level ◽  
3D Ics ◽  
Direct Wafer Bonding ◽  
Bonding Technology

The European 3D Heterogeneous Integration Platform (e-BRAINS) - a Particular Focus on Reliability and Low-Temperature Processes for 3D Integrated Sensor Systems

2015 ◽  
Vol 2015 (DPC) ◽  
pp. 001847-001884
Author(s):  
Peter Ramm ◽  
Armin Klumpp ◽  
Alan Mathewson ◽  
Kafil M. Razeeb ◽  
Reinhard Pufall
Keyword(s):  
Low Temperature ◽  
Heterogeneous Integration ◽  
Sensor Systems ◽  
Wafer Level ◽  
3D Integration ◽  
Integrated Sensor ◽  
Integration Platform ◽  
Ultrasonic Agitation ◽  
Bonding Technology ◽  
Low Temperature Bonding

The European 3D heterogeneous integration platform has been established by the consortium of the Integrated Project e-BRAINS [1], where technologies of the following relevant main categories of 3D integration are provided to enable future applications of smart sensor systems:3D System-on-Chip Integration - 3D-SOC: TSV technology for stacking of thinned devices or large IC blocks (global level),3D Wafer-Level-Packaging - 3D-WLP: embedding technology with through-polymer vias (TPV) for stacking of thinned ICs on wafer-level (no TSV), and3D System-in-Package - 3D-SIP: 3D stacking of packaged devices or substrates *definitions according to [2] Regarding TSV performance, the applications do not need ultra-high vertical interconnect densities as for 3D stacked Integrated Circuits – 3D-SIC*. Nevertheless, the lateral sizes of the TSVs are preferably minimized to allow for place and route for small “open” IC areas. Smaller TSVs are also preferred in order to reduce thermo-mechanical stress. e-BRAINS' focus is on how heterogeneous integration and sensor device technologies can be combined to bring new performance levels to targeted applications with high market potentials. The consortium, under coordination of Infineon and technical management by Fraunhofer EMFT, is composed of major European system manufacturers (Infineon, Siemens, SensoNor, 3D PLUS, Vermon and IQE), SMEs (DMCE, Magna Diagnostics, SORIN and eesy-ID), the large research institutions CEA Grenoble, Fraunhofer (EMFT Munich & IIS-EAS Dresden), imec, SINTEF, Tyndall and ITE Warsaw, and universities (EPFL Lausanne, TU Chemnitz and TU Graz). Target applications include automotive, ambient living and medical devices, with a specific focus on wireless sensor systems. Concerning the enabling 3D Heterogeneous Integration Platform, the e-BRAINS partners are working close together, where Infineon, Fraunhofer EMFT, imec and SINTEF are focusing mainly on 3D-SOC and 3D-WLP, and the French system manufacturer 3D PLUS and Tyndall on 3D-WLP and 3D-SIP technologies. The focus of this paper is on low-temperature bonding processes for highly reliable 3D integrated sensor systems. One of the key issues for heterogeneous systems production is the impact of 3D processes to the reliability of the product, i.e. the high built-in stresses caused by e.g. the CTE mismatch of complex layer structures (thin Si, ILDs, metals etc.) in combination with elevated bonding temperatures. As consequence, extensive project work was dedicated in the developments of reliable low-temperature bonding processes. Mainly intermetallic compound (IMC) bonding with Cu/Sn metal systems supported by ultrasonic agitation (Fraunhofer EMFT) was successfully introduced in 3D integration technology (see Fig. 2). A copper/tin solid-liquid interdiffusion (SLID) system was investigated using ultrasonic agitation to reduce the assembly temperature below the melting point of tin. Cleaning procedures are important shortly before joining the samples; dry cleaning has best results due to removal of thin oxide layers. Figure 2 shows a cross section of US supported Cu/Sn bonding at 150C. The intermetallic compounds Cu3Sn and Cu6Sn5 as well as pure tin easily can be identified. Due to low temperature assembly the most stable intermetallic compound (IMC) Cu3Sn has a minor share of the metal system. Most importantly there is no gap between top and bottom part of the joint despite the macroscopic assembly temperature is far away from the melting point of tin. But maybe the ultrasonic agitation brings enough energy to the interfaces, so locally melting can occur. In this way robust IMC bonding technology at 150C could be demonstrated with shear forces of 17 MPa and an alignment accuracy of 3 μm, well-suited for 3D integration. Figure 2: Low-temperature IMC bonding technology using ultrasonic agitation (Fraunhofer EMFT) Reliability for SLID contacts is certainly a very challenging objective especially looking for robust solutions in automotive applications. Thermally induced mechanical stress is the main reason for early fails during temperature cycling. Cross sectioned samples were investigated and methods like nanoindentation, Raman spectroscopy, fibDAC, and high local resolution x-ray scattering were applied to measure the intrinsic stresses. It can be shown that low temperature bonding is the right approach to avoid excessive stress cracking the interface or even fracturing the silicon. Also fatigue of metals can be reduced in a range that plastic deformation is no lifetime limiting factor.

TLP Bonding Technologies for Micro Joining and 3D Packaging

2010 ◽  
Vol 2010 (DPC) ◽  
pp. 001221-001252 ◽  
Author(s):  
Kei Murayama ◽  
Mitsuhiro Aizawa ◽  
Mitsutoshi Higashi
Keyword(s):  
High Temperature ◽  
Melting Point ◽  
Low Temperature ◽  
Wafer Bonding ◽  
Bonding Process ◽  
Tlp Bonding ◽  
Hermetic Sealing ◽  
Low Temperature Bonding ◽  
Free Material ◽  
Bonding Technique

The bonding technique for High density Flip Chip(F.C.) packages requires a low temperature and a low stress process to have high reliability of the micro joining ,especially that for sensor MEMS packages requires hermetic sealing so as to ensure their performance. The Transient Liquid Phase (TLP) bonding, that is a kind of diffusion bonding is a technique that connects the low melting point material such as Indium to the higher melting point metal such as Gold by the isothermal solidification and high-melting-point intermetallic compounds are formed. Therefore, it is a unique joining technique that can achieve not only the low temperature bonding and also the high temperature reliability. The Gold-Indium TLP bonding technique can join parts at 180 degree C and after bonding the melting point of the junction is shifted to more than 495 degree C, therefore itfs possible to apply the low temperature bonding lower than the general use as a lead free material such as a SAC and raise the melting point more than AuSn solder which is used for the high temperature reliability usage. Therefore, the heat stress caused by bonding process can be expected to be lowered. We examined wafer bonding and F.C bonding plus annealing technique by using electroplated Indium and Gold as a joint material. We confirmed that the shear strength obtained at the F.C. bonding plus anneal technique was equal with that of the wafer bonding process. Moreover, it was confirmed to ensure sufficient hermetic sealing in silicon cavity packages that had been bonded at 180 degree C. And the difference of the thermal stress that affect to the device by the bonding process was confirmed. In this paper, we report on various possible application of the TLP bonding.

Low Temperature Wafer Level Bonding Using Benzocyclobutene Adhesive Polymers

2012 ◽  
Vol 2012 (DPC) ◽  
pp. 1-24
Author(s):  
Michael Gallagher ◽  
Jong-Uk Kim ◽  
Eric Huenger ◽  
Kai Zoschke ◽  
Christina Lopper ◽  
...  
Keyword(s):  
Low Temperature ◽  
Wafer Bonding ◽  
Flip Chip ◽  
Bonding Temperature ◽  
Bonding Process ◽  
Curing Temperature ◽  
Wafer Level ◽  
Mechanical Adhesion ◽  
3D Stacking ◽  
Dry Etch

3D stacking, one of the 3D integration technologies using through silicon vias (TSVs), is considered as a desirable 3D solution due to its cost effectiveness and matured technical background. For successful 3D stacking, precisely controlled bonding of the two substrates is necessary, so that various methods and materials have been developed over the last decade. Wafer bonding using polymeric adhesives has advantages. Surface roughness, which is critical in direct bonding and metal-to-metal bonding, is not a significant issue, as the organic adhesive can smooth out the unevenness during bonding process. Moreover, bonding of good quality can be obtained using relatively low bonding pressure and low bonding temperature. Benzocyclobutene (BCB) polymers have been commonly used as bonding adhesives due to their relatively low curing temperature (~250 °C), very low water uptake (<0.2%), excellent planarizing capability, and good affinity to Cu metal lines. In this study, we present wafer bonding with BCB at various conditions. In particular, bonding experiments are performed at low temperature range (180 °C ~ 210 °C), which results in partially cured state. In order to examine the effectiveness of the low temperature process, the mechanical (adhesion) strength and dimensional changes are measured after bonding, and compared with the values of the fully cured state. Two different BCB polymers, dry-etch type and photo type, are examined. Dry etch BCB is proper for full-area bonding, as it has low degree of cure and therefore less viscosity. Photo-BCB has advantages when a pattern (frame or via open) is to be structured on the film, since it is photoimageable (negative tone), and its moderate viscosity enables the film to sustain the patterns during the wafer bonding process. The effect of edge beads at the wafer rim area and the soft cure (before bonding) conditions on the bonding quality are also studied. Alan/Rey ok move from Flip Chip and Wafer Level Packaging 1-6-12.

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