A New Annealing Method to Obtain High Quality Poly-Si

1992 ◽  
Vol 283 ◽  
Author(s):  
Yoon-Ho Song ◽  
Jong-Tae Baek ◽  
Kee-Soo Nam ◽  
Sang-Won Kang
Keyword(s):  
Field Effect ◽  
Field Effect Mobility ◽  
High Quality ◽  
Furnace Annealing ◽  
Conventional Furnace ◽  
Good Uniformity ◽  
Conventional Furnace Annealing ◽  
Annealing Method ◽  
Si Thin Film ◽  
Free Nucleus

ABSTRACTA new annealing method, a combination of rapid thermal annealing (RTA) and furnace annealing, has been developed to obtain a high quality poly-Si from a-Si deposited by LPCVD. This method produces a large grain poly-Si with good uniformity, which may result from the growth of relatively defect-free nucleus generated at a high temperature by RTA. Poly-Si thin film transistors fabricated by this new annealing method have higher field effect mobility and better uniformity compared with those by the conventional furnace annealing.

omparisons of Silicide Formation by Rapid Thermal Annealing and Conventional Furnace Annealing

1987 ◽  
Vol 92 ◽  
Author(s):  
E. Ma ◽  
M. Natan ◽  
B.S. Lim ◽  
M-A. Nicolet
Keyword(s):  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Silicide Formation ◽  
X Ray Diffraction ◽  
Furnace Annealing ◽  
Cross Sectional ◽  
Conventional Furnace ◽  
Diffusion Controlled ◽  
Conventional Furnace Annealing ◽  
Kinetics Of

ABSTRACTSilicide formation induced by rapid thermal annealing (RTA) and conventional furnace annealing (CFA) in bilayers of sequentially deposited films of amorphous silicon and polycrystalline Co or Ni is studied with RBS, X-ray diffraction and TEM. Particular attention is paid to the reliability of the RTA temperature measurements in the study of the growth kinetics of the first interfacial compound, Co2Si and Ni2Si, for both RTA and CFA. It is found that the same diffusion-controlled kinetics applies for the silicide formation by RTA in argon and CFA in vacuum with a common activation energy of 2.1+0.2eV for Co2Si and 1.3+0.2eV for Ni Si. Co and Ni atoms are the dominant diffusing species; during silicide formation by both RTA and CFA. The microstructures of the Ni-silicide formed by the two annealing techniques, however, differs considerably from each other, as revealed by cross-sectional TEM studies.

Rapid Optical Annealing for Improved GaAs Fet Uniformity

1985 ◽  
Vol 52 ◽  
Author(s):  
Thomas E. Kazior ◽  
Kamal Tabatabaie-Alavi
Keyword(s):  
Low Noise ◽  
Drift Mobility ◽  
Gate Length ◽  
Furnace Annealing ◽  
Zero Bias ◽  
Conventional Furnace ◽  
Conventional Furnace Annealing ◽  
Performance Results ◽  
Doping Profiles ◽  
Excellent Reproducibility

ABSTRACTAn Eaton Nova Rapid Optical Annealer (ROA 400) has been used to activate n and n+ Si implants for use in power and low noise FET structures for GaAs MMIC's. PECVD SiN capped 3" SI GaAs wafers were annealed at temperatures ranging from 800 to 970 °C for times ranging from 0 (transient light pulse) to 20 sec. Doping profiles were determined using a Polaron concentration profiler; FATFET's were used for measuring drift mobility; and short gate (l.0μm gate length) FET's were fabricated to establish activation uniformity and to determine d.c. and r.f. performance. Results have indicated peak implant activation as high as 90% and electron mobilities of up to 4700cm2/V-sec for carrier concentrations of 1.3×1017/cm3 – results comparable to conventional furnace annealing. The most significant improvement of optical annealing comes in device uniformity. Saturated current uniformities of < ±3% have been achieved over 3" wafers with excellent reproducibility from wafer to wafer. Power FET structures with zero bias gm of 120mS/mm with uniformities of <±5mS/mm have been measured. R.f. measurements on these devices yielded output powers of >500mW/mm with power added efficiencies as high as 35%.

Soi Formation by a Line-Source Electron Beam and Electrical Characteristics

1987 ◽  
Vol 107 ◽  
Author(s):  
H. Hada ◽  
H. Okabayashi ◽  
S. Saito ◽  
T. Nakamura ◽  
Y. Kawase
Keyword(s):  
Electron Beam ◽  
Grain Boundary ◽  
Line Source ◽  
Field Effect ◽  
Electrical Characteristics ◽  
Field Effect Mobility ◽  
Boundary Density ◽  
Width Direction ◽  
Good Uniformity

AbstractCrystal quality of SOI and electrical characteristics of p-MOSFETs fabricated in SOI films have been studied. The SOI recrystallization is done by a cw-operated, high-power, line-source and line-shaped electron beam annealing. Single crystal SOI strips, 15~20¼mxa few mm in sized, are formed with a good uniformity on a 4 inch diameter wafer by adopting the step and repeat system in the annealing apparatus. p-MOSFETs with ~90% field effect mobility of the bulk values are fabricated in the SOI films. The electrical characteristics of p-MOSFETs, fabricated in the SOI regions beyond the lateral seeding distance (~15¼m), are found to be independent of the low angle grain boundary density in the MOSFET channel, when the low angle grain boundaries extended toward the channel width direction.

Quantum State in Solid-Phase Crystallization of a-Si:H by FA

2010 ◽  
Vol 44-47 ◽  
pp. 4154-4156
Author(s):  
Rui Min Jin ◽  
Ding Zhen Li ◽  
Lan Li Chen ◽  
Xiang Ju Han ◽  
Jing Xiao Lu
Keyword(s):  
Thin Film ◽  
Annealing Temperature ◽  
Solid Phase ◽  
Quantum States ◽  
Solid Phase Crystallization ◽  
Furnace Annealing ◽  
Conventional Furnace ◽  
Different Temperatures ◽  
Conventional Furnace Annealing ◽  
Electronic Microscope

Amorphous silicon films prepared by PECVD on glass substrate has been crystallized by conventional furnace annealing (FA) at different temperatures. From the Raman spectra and scanning electronic microscope (SEM), it is found that the thin film grain size present quantum states with annealing temperature.

Effect Of O2 Plasma Exposure On The Performance Of Polycrystalline Silicon Thin Film Transistors

1994 ◽  
Vol 345 ◽  
Author(s):  
Chul Ha Kim ◽  
Il Lee ◽  
Ki Soo Sohn ◽  
Su Chul Chun ◽  
Jin Jang
Keyword(s):  
Thin Film ◽  
Polycrystalline Silicon ◽  
Field Effect ◽  
Thin Film Transistor ◽  
Field Effect Mobility ◽  
Plasma Exposure ◽  
Silicon Thin Film ◽  
Current Ratio ◽  
Si Thin Film ◽  
O2 Plasma

AbstractWe have studied the effect of O2 plasma exposure on the performance of polycrystalline silicon (poly-Si) thin film transistor (TFTs). The field effect mobility is increased and the drain currents at negative gate voltages are reduced by O2 plasma exposure on the surface of the TFT. These improvements in the performance of the poly-Si TFTs are larger in offset structure compared to overlap one. We obtained the on/off current ratio of ∼ 108 after O2 plasma exposure for the poly-Si TFTs with 3 or 4 μm offset length.

Smooth Silicide Formation by Ion Beam Mixing of Ti/Si-Layers

1986 ◽  
Vol 74 ◽  
Author(s):  
K. Kohlhof ◽  
S. Mantl ◽  
B. Stritzker
Keyword(s):  
Ion Beam ◽  
Liquid Nitrogen Temperature ◽  
Silicide Formation ◽  
Furnace Annealing ◽  
Ion Beam Mixing ◽  
X Ray ◽  
Surfaces And Interfaces ◽  
Conventional Furnace ◽  
Conventional Furnace Annealing ◽  
Substrate Temperatures

AbstractIon beam mixing experiments of Ti-Si layers have been performed with Kr ions of 250 keV energy and doses ranging from 7 1015 to 7 1016 cm-2 at temperatures between liquid nitrogen temperature and 450°C. At substrate temperatures below 120°C no silicide formation could be detected. Only weak mixing at the Ti-Si interface is observed. At temperatures above 120°C the formation of TiSi2 could be verified by Rutherford backscattering and X-ray diffractometry. Layers of TiSi2 produced by ion beam mixing show smooth surfaces in contrast to those prepared by conventional furnace annealing. Those display rough surfaces and interfaces.

Novel Gate Insulator Process by Nitrogen Annealing for Si-Face SiC MOSFET with High-Mobility and High-Reliability

2018 ◽  
Vol 924 ◽  
pp. 457-460 ◽  
Author(s):  
Shunsuke Asaba ◽  
Tatsuo Schimizu ◽  
Yukio Nakabayashi ◽  
Shigeto Fukatsu ◽  
Toshihide Ito ◽  
...  
Keyword(s):  
High Temperature ◽  
Electric Field ◽  
Field Effect ◽  
High Reliability ◽  
High Mobility ◽  
Gate Insulator ◽  
Field Effect Mobility ◽  
High Quality ◽  
Bias Temperature Instability ◽  
Nitrogen Annealing

The gate insulator process for SiC-MOSFET was examined and high-quality interface was realized by employing the pre-annealing process before high-temperature N2 annealing. The pre-annealing evidently activated the interface to introduce nitrogen, and then field-effect mobility exceeded 50 cm2/Vs. The fabricated sample also demonstrated superior bias temperature instability (BTI) and excellent breakdown electric field of 11.7 MV/cm.

Sign in / Sign up

Export Citation Format

Share Document