Novel Gate Insulator Process by Nitrogen Annealing for Si-Face SiC MOSFET with High-Mobility and High-Reliability

2018 ◽  
Vol 924 ◽  
pp. 457-460 ◽  
Author(s):  
Shunsuke Asaba ◽  
Tatsuo Schimizu ◽  
Yukio Nakabayashi ◽  
Shigeto Fukatsu ◽  
Toshihide Ito ◽  
...  
Keyword(s):  
High Temperature ◽  
Electric Field ◽  
Field Effect ◽  
High Reliability ◽  
High Mobility ◽  
Gate Insulator ◽  
Field Effect Mobility ◽  
High Quality ◽  
Bias Temperature Instability ◽  
Nitrogen Annealing

The gate insulator process for SiC-MOSFET was examined and high-quality interface was realized by employing the pre-annealing process before high-temperature N2 annealing. The pre-annealing evidently activated the interface to introduce nitrogen, and then field-effect mobility exceeded 50 cm2/Vs. The fabricated sample also demonstrated superior bias temperature instability (BTI) and excellent breakdown electric field of 11.7 MV/cm.

Effect of High Temperature Forming Gas Annealing on Electrical Properties of 4H-SiC Lateral MOSFETs with Lanthanum Silicate and ALD SiO2 Gate Dielectric

2018 ◽  
Vol 924 ◽  
pp. 482-485
Author(s):  
Min Seok Kang ◽  
Kevin Lawless ◽  
Bong Mook Lee ◽  
Veena Misra
Keyword(s):  
Threshold Voltage ◽  
Interfacial Layer ◽  
Field Effect ◽  
Lanthanum Oxide ◽  
Gate Dielectric ◽  
High Mobility ◽  
High Threshold ◽  
Field Effect Mobility ◽  
The Impact ◽  
Lanthanum Silicate

We investigated the impact of an initial lanthanum oxide (La2O3) thickness and forming gas annealing (FGA) conditions on the MOSFET performance. The FGA has been shown to dramatically improve the threshold voltage (VT) stability of 4H-SiC MOSFETs. The FGA process leads to low VTshift and high field effect mobility due to reduction of the interface states density as well as traps by passivating the dangling bonds and active traps in the Lanthanum Silicate dielectrics. By optimizing the La2O3interfacial layer thickness and FGA condition, SiC MOSFETs with high threshold voltage and high mobility while maintaining minimal VTshift are realized.

scholarly journals High Quality Gate Insulator/GaN Interface for Enhancement-Mode Field Effect Transistor

2011 ◽  
Vol 120 (6A) ◽  
pp. A-22-A-24 ◽  
Author(s):  
A. Taube ◽  
R. Kruszka ◽  
M. Borysiewicz ◽  
S. Gierałtowska ◽  
E. Kamińska ◽  
...  
Keyword(s):  
Field Effect ◽  
Field Effect Transistor ◽  
Gate Insulator ◽  
High Quality ◽  
Enhancement Mode ◽  
Mode Field ◽  
Effect Transistor

1200 V / 200 A V-Groove Trench MOSFET Optimized for Low Power Loss and High Reliability

2020 ◽  
Vol 1004 ◽  
pp. 776-782
Author(s):  
Kosuke Uchida ◽  
Toru Hiyoshi ◽  
Yu Saito ◽  
Hiroshi Egusa ◽  
Tatsushi Kaneda ◽  
...  
Keyword(s):  
High Temperature ◽  
Electric Field ◽  
Low Power ◽  
Power Loss ◽  
High Reliability ◽  
Short Circuit ◽  
Guard Ring ◽  
Optimized Design ◽  
Drain Bias ◽  
Bias Condition

1200 V / 200 A V-groove trench MOSFET optimized to achieve low power loss, high oxide reliability under a drain bias condition and high avalanche ruggedness is shown in this paper. We revealed a relationship between the lifetime under a high temperature reverse bias condition and the oxide electric field. In accordance with the results of the test, the 1200 V / 200 A trench MOSFET showed an improvement in the tradeoff between the on-resistance and oxide electric field with the presence of current spreading layers. In order to obtain low on-resistance and high avalanche ruggedness at the same time, buried guard ring structures, which made the blocking voltage of the edge termination area higher than that of the active area, was developed. The fabricated MOSFETs demonstrated a low specific on-resistance of 3.1 mΩ cm2. A predicted lifetime of 200 years under a high temperature drain bias condition of 1200 V was achieved by the optimized design. A short circuit withstand time of 6 μs and a high avalanche energy of 7.8 J/cm2 were shown.

Instability of OTFT with Organic Gate Dielectrics

2007 ◽  
Vol 124-126 ◽  
pp. 407-410
Author(s):  
Sang Chul Lim ◽  
Seong Hyun Kim ◽  
Gi Heon Kim ◽  
Jae Bon Koo ◽  
Jung Hun Lee ◽  
...  
Keyword(s):  
Thin Film ◽  
Thin Film Transistors ◽  
Field Effect ◽  
Gate Dielectrics ◽  
Gate Insulator ◽  
Semiconductor Layer ◽  
Field Effect Mobility ◽  
Current Ratio ◽  
Dielectric Thickness ◽  
Inverter Circuit

We report the effects of instability with gate dielectrics of pentacene thin film transistors (OTFTs) inverter circuits. We used to the UV sensitive curable resin and poly-4-vinylphenol(PVP) by gate dielectrics. The inverter supply bias is VDD= -40 V. For a given dielectric thickness and applied voltage, pentacene OTFTs with inverter circuits measurements field effect mobility, on-off current ratio, Vth. The field effect mobility 0.03~0.07 cm2/Vs, and the threshold voltage is -3.3 V ~ -8.8 V. The on- and off-state currents ratio is about 103~106. From the OTFT device and inverter circuit measurement, we observed hysteresis behavior was caused by interface states of between the gate insulator and the pentacene semiconductor layer.

High Mobility a-Si:H TFT Fabricated by Hot Wire Chemical Vapor Deposition

2010 ◽  
Vol 1245 ◽  
Author(s):  
Chun-Yuan Hsueh ◽  
Chieh-Hung Yang ◽  
Si-Chen Lee
Keyword(s):  
Chemical Vapor Deposition ◽  
Vapor Deposition ◽  
Field Effect ◽  
High Mobility ◽  
Chemical Vapor ◽  
Field Effect Mobility ◽  
Hot Wire ◽  
Low Threshold ◽  
Hydrogenated Amorphous ◽  
Very High

AbstractThe hydrogenated amorphous silicon (a-Si:H) thin film transistors (TFTs) having a very high field-effect mobility of 1.76 cm2/V-s and a low threshold voltage of 2.43 V have been fabricated successfully using the hot wire chemical vapor deposition (HWCVD).

A New Annealing Method to Obtain High Quality Poly-Si

1992 ◽  
Vol 283 ◽  
Author(s):  
Yoon-Ho Song ◽  
Jong-Tae Baek ◽  
Kee-Soo Nam ◽  
Sang-Won Kang
Keyword(s):  
Field Effect ◽  
Field Effect Mobility ◽  
High Quality ◽  
Furnace Annealing ◽  
Conventional Furnace ◽  
Good Uniformity ◽  
Conventional Furnace Annealing ◽  
Annealing Method ◽  
Si Thin Film ◽  
Free Nucleus

ABSTRACTA new annealing method, a combination of rapid thermal annealing (RTA) and furnace annealing, has been developed to obtain a high quality poly-Si from a-Si deposited by LPCVD. This method produces a large grain poly-Si with good uniformity, which may result from the growth of relatively defect-free nucleus generated at a high temperature by RTA. Poly-Si thin film transistors fabricated by this new annealing method have higher field effect mobility and better uniformity compared with those by the conventional furnace annealing.

Dependence of Field-Effect Mobility on Deposition Conditions in a-Si:H TFT

1994 ◽  
Vol 336 ◽  
Author(s):  
Y. Chida ◽  
M. Kondo ◽  
G. Ganguly ◽  
A. Matsuda
Keyword(s):  
Thin Film ◽  
Thin Film Transistors ◽  
Field Effect ◽  
High Performance ◽  
High Mobility ◽  
High Electron ◽  
Field Effect Mobility ◽  
Si Substrate ◽  
High Electron Mobility ◽  
Deposition Conditions

ABSTRACTHigh electron Mobility (over 3 cm2/Vs) thin film transistors (TFTs) have been fabricated using a-Si:H on thermally oxidized crystalline Si substrate. The procedures for fabricating the high performance TFTs are presented and the possible reasons for the high mobility are discussed.

Copper Phthalocyanine Single-crystal Field-effect Transistors Stable Above 100°C

2006 ◽  
Vol 937 ◽  
Author(s):  
Koichi Yamada ◽  
Jun Takeya ◽  
Kunji Shigeto ◽  
Kazuhito Tsukagoshi ◽  
Yoshinobu Aoyagi ◽  
...  
Keyword(s):  
High Temperature ◽  
Single Crystal ◽  
Crystal Field ◽  
Field Effect ◽  
Copper Phthalocyanine ◽  
Field Effect Transistors ◽  
Measured Temperature ◽  
Field Effect Mobility ◽  
Crystal Field Effect ◽  
Activation Type

ABSTRACTIntrinsic charge transport of copper phthalocyanine single-crystal field-effect transistors is measured as function of temperature up to above 100°C. The conduction of the accumulated carriers shows hopping-type transport, so that the field-effect mobility increases with temperature following activation-type temperature dependence throughout the measured temperature region. Due to excellent material stability at the high temperature, the mobility values are precisely reproduced after the heat cycles.

scholarly journals Influence of Plasma Treatment to the Performance of Amorphous IGZO based Flexible Thin Film Transistors

2017 ◽  
Author(s):  
Long-long Chen ◽  
Xiang Sun ◽  
Ji-feng Shi ◽  
Xi-feng Li ◽  
Xing-wei Ding ◽  
...  
Keyword(s):  
Thin Film ◽  
Plasma Treatment ◽  
Threshold Voltage ◽  
Thin Film Transistors ◽  
Field Effect ◽  
Treatment Time ◽  
Gate Insulator ◽  
Field Effect Mobility ◽  
Flexible Displays ◽  
Plasma Species

Thin film transistors (TFTs) using In-Ga-Zn Oxide (IGZO) as active layer and the gate insulator was treated with NH3 plasma and N2O plasma, respectively, which is fabricated on flexible PI substrate in this work. The performance of IGZO TFTs with different plasma species and treatment time are investigated and compared. The experiment results show that the plasma species and treatment time play an important role in the threshold voltage, field-effect mobility, Ion/Ioff ratio, sub-threshold swing (SS) and bias stress stability of the devices. The TFT with a 10 seconds NH3 plasma treatment shows the best performance; specifically, threshold voltage of 0.34 V, field-effect mobility of 15.97 cm2/Vs, Ion/Ioff ratio of 6.33×107, and sub-threshold swing of 0.36 V/dec. The proposed flexible IGZO-TFTs in this paper can be used as driving devices in the next-generation flexible displays.

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