Tungsten Silicide Zinc as a High Temperature Zinc Diffusion Source

1987 ◽  
Vol 92 ◽  
Author(s):  
D.L. Plumton

ABSTRACTA process for Zn diffusion into GaAs during rapid thermal processing has been developed using Zn doped tungsten silicide as the diffusion source. The WSi:Zn is a sputter deposited, solid source layer that undergoes capless annealing in a quartz-halogen lamp system. For a given time and temperature the diffusion of Zn into GaAs is controlled by both the Zn concentration and the W/Si ratio in the film. Tungsten-rich films are Zn concentration “independent” while Si-rich films are Zn concentration “dependent.” Changing the film composition allows shallow Zn diffusions at either a low or a high temperature. Deep Zn diffusions are possible through higher temperatures or longer anneal times for any given WSi:Zn composition.

1987 ◽  
Vol 92 ◽  
Author(s):  
A. Usami ◽  
Y. Tokuda ◽  
H. Shiraki ◽  
H. Ueda ◽  
T. Wada ◽  
...  

ABSTRACTRapid thermal processing using halogen lamps was applied to the diffusion of Zn into GaAs0.6 P0.4:Te from Zn-doped oxide films. The Zn diffusion coefficient of the rapid thermal diffused (RTD) samples at 800°C for 6 s was about two orders of magnitude higher than that of the conventional furnace diffused samples at 800°C for 60 min. The enhanced diffusion of Zn by RTD may be ascribed to the stress field due to the difference in the thermal expansion coefficient between the doped oxide films and GaAs0.6P0.4 materials, and due to the temperature gradient in GaAs0.6P0 4 materials. The Zn diffusion coefficient at Zn concentration of 1.0 × l018 cm−3 was 3.6 × 10−11, 3.1 × 10−11 and 5.0 × 10−12 cm2 /s for the RTD samples at 950°C for 6 s from Zn-, (Zn,Ga)- and (Zn,P)-doped oxide films, respectively. This suggests that Zn diffusibility was controlled by the P in the doped oxide films.


1997 ◽  
Vol 470 ◽  
Author(s):  
J. Hong ◽  
J. W. Lee ◽  
C. B. Vartuli ◽  
J. D. MacKenzie ◽  
S. M. Donovan ◽  
...  

ABSTRACTTransient thermal processing is employed for implant activation, contact alloying, implant isolation and dehydrogenation during III-nitride device fabrication. We have compared use of InN, AlN and GaN powder as methods for providing a N2 overpressure within a graphite susceptor for high temperature annealing of GaN, InN, A1N and InAlN. The AlN powder provides adequate surface protection to temperatures of ∼1100°C for AlN, > 1050°C for GaN, ∼600°C for InN and ∼800°C for the ternary alloy. While the InN powder provides a higher N2 partial pressure than AlN powder, at temperatures above ∼750°C the evaporation of In is sufficiently high to produce condensation of In droplets on the surfaces of the annealed samples. GaN powder achieved better surface protection than the other two cases.


1990 ◽  
Vol 202 ◽  
Author(s):  
C. S. Galovich ◽  
S. S. Lee ◽  
D. L. Kwong

ABSTRACTTitanium nitride, formed either by rapid thermal processing (RTP) or reactive sputtering, is commonly applied as a barrier film in the fabrication of metal-to-substrate contacts for CMOS devices. In one approach a titanium film is sputtered onto a patterned dielectric and then nitrided at a temperature greater than 500° C to form a TiN layer. Variations in the structure and resistivity of the titanium layer are observed when the titanium overlies a borophosphosilicate glass (BPSG) film. The structural change appears as a “wrinkling” of the TiN film and the TiN/BPSG interface. More severely wrinkled films are characterized by lower sheet resistivities. Results of TEM and SEM analyses are presented, as well as data on TiN resistivity and reflectance for nitridation temperatures in the range 650°C to 900°C, and for BPSG boron and phosphorus concentrations of approximately 3 to 5 wt. %. Mechanisms for the TiN wrinkling are discussed.


1987 ◽  
Vol 92 ◽  
Author(s):  
Tohru Hara ◽  
Jeffrey C. Gelpey

ABSTRACTThe use of Rapid Thermal Processing (RTP) for the activation of silicon ion implanted channel layers in GaAs MESFET devices has been studied. Tungsten-halogen lamp and Water-wall DC arc lamp RTP have been compared. The arc lamp gave superior abruptness of the carrier concentration profile (78% at 850°C for 15 seconds or 1000°C for 2 seconds) and dopant activation greater than 60%. These parameters are important to achieve good MESFETs fabricated using arc lamp RTP was also studied. The transconductance (gm) of the devices usinq RTP was 78mS/mm which is much higher than achieved with similar samples using furnace annealing. Both capped and capless RTP was examined. Although capped annealing generally yields superior surface quality, the capless annealing provided good electrical properties in a process window which also yielded adequate surface quality and good devices.


1997 ◽  
Vol 470 ◽  
Author(s):  
H. Gilboa ◽  
Y. E. Gilboa ◽  
Z. Atzmon ◽  
S. Levy ◽  
H. Spilberg ◽  
...  

ABSTRACTThe evolution of integrated single-wafer processing for high-temperature applications in the front end of the line (FEOL) occurred with the advancements in single-wafer rapid thermal processing and its acceptance as a manufacturing technology. The Integra RTCVD cluster tool for high-temperature applications features wafer cleaning, rapid thermal processing and single wafer chemical vapor deposition steps. The paper presents integrated vapor phase clean and RTCVD applications for FLASH memory gate stack and DRAM cell.


1985 ◽  
Vol 52 ◽  
Author(s):  
D. Wood ◽  
J. Mun

ABSTRACTFor the first time a combination of titanium disilicide and rapid thermal processing has been used to produce a high temperature stable gate on gallium arsenide. A barrier height of 0.79 V with an ideality factor of 1.02 has been obtained after annealing up to 800°C, and useful results are found up to 900°C. Auger analysis shows little intermixing of the silicide with the underlying substrate, which is not the case for conventional annealing. The advantages of titanium disilicide over the more commonly used tungsten silicide with regard to film resistivity and stress will be discussed. A self-aligned gate MESFET (SAGFET) process has been developed using TiSi2 as the gate material.


2002 ◽  
Vol 41 (Part 1, No. 7A) ◽  
pp. 4442-4449 ◽  
Author(s):  
Woo Sik Yoo ◽  
Takashi Fukada ◽  
Ichiro Yokoyama ◽  
Kitaek Kang ◽  
Nobuaki Takahashi

1991 ◽  
Vol 224 ◽  
Author(s):  
Pushkar P. Apte ◽  
Samuel Wood ◽  
Len Booth ◽  
Krishna C. Saraswat ◽  
Mehrdad M. Moslehi

AbstractRapid thermal processing (RTP) can play an important role in in situ single-wafer thermal multiprocessing, since it allows for a rapid wafer throughput rate. Conventional dedicated RTP equipment, where temperature uniformity is achieved by optimized reflector and chamber geometries for a specific process, typically cannot provide uniformity for different processes, or for a range of processing conditions. In this work we present a new flexible lamp system, in which tungsten-halogen lamps are configured in three concentric rings that are independently and dynamically controlled. The resultant circularly symmetric flux, which can be varied and controlled both temporally and spatially, offers significantly improved temperature uniformity. This is demonstrated using thermocouples as well as actual processes such as implant annealing, thermal oxidation and chemical vapor deposition of silicon. Through added flexibility and more precise control, this approach offers a powerful tool for multiprocessing and rapid process prototyping.


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