Rapid Thermal Processing of Silicon Ion Implanted Channel Layers in GaAs

1987 ◽  
Vol 92 ◽  
Author(s):  
Tohru Hara ◽  
Jeffrey C. Gelpey

ABSTRACTThe use of Rapid Thermal Processing (RTP) for the activation of silicon ion implanted channel layers in GaAs MESFET devices has been studied. Tungsten-halogen lamp and Water-wall DC arc lamp RTP have been compared. The arc lamp gave superior abruptness of the carrier concentration profile (78% at 850°C for 15 seconds or 1000°C for 2 seconds) and dopant activation greater than 60%. These parameters are important to achieve good MESFETs fabricated using arc lamp RTP was also studied. The transconductance (gm) of the devices usinq RTP was 78mS/mm which is much higher than achieved with similar samples using furnace annealing. Both capped and capless RTP was examined. Although capped annealing generally yields superior surface quality, the capless annealing provided good electrical properties in a process window which also yielded adequate surface quality and good devices.

2002 ◽  
Vol 717 ◽  
Author(s):  
K. A. Gable ◽  
K. S. Jones ◽  
M. E. Law ◽  
L. S. Robertson ◽  
S. Talwar

AbstractOne alternative to conventional rapid thermal annealing (RTA) of implants for ultra-shallow junction formation is that of laser annealing. Laser thermal processing (LTP) incorporates an excimer pulsed laser capable of melting the near surface region of the silicon (Si) substrate. The melt depth is dependent upon the energy density supplied by the irradiation source and the melting temperature of the substrate surface. A process window associated with this technique is able to produce similar junction depths over a range of energy densities due to the melting temperature depression established with pre-amorphization of the substrate surface prior to dopant incorporation. The process window of germanium (Ge) preamorphized, boron (B) doped Si was investigated. 200 mm (100) n-type Si wafers were preamorphized via 18 keV Ge+ implantation to 1x1015/cm2 and subsequently implanted with 1 keV B+ to doses of 1x1015/cm2, 3x1015/cm2, 6x1015/cm2, and 9x1015/cm2. The wafers were laser annealed from 0.50 J/cm2 to 0.88 J/cm2 using a 308 nm XeCl excimer irradiation source. Transmission electron microscopy (TEM) was used to determine the process window for each implant condition, and correlations between process window translation and impurity concentration were made. Four-point probe quantified dopant activation and subsequent deactivation upon post-LTP furnace annealing.


1987 ◽  
Vol 92 ◽  
Author(s):  
Julian Blake ◽  
Jeffrey C. Gelpey ◽  
John F. Moquin ◽  
James Schlueter ◽  
Ron Capodilupo

ABSTRACTSlip is a primary concern in Rapid Thermal Processing (RTP). Diagnostics for slip are compared, including: visual inspection, differential interference contrast microscopy (Nomarski), X-ray topography, decorative etching and optical surface scanning. Data from each technique are presented. RTP control parameters (temperature uniformity, heat up and cool down rates, edge cooling) and substrate parameters (wafer size, oxygen content, edge damage) which may have an effect on slip are discussed. Typical results for implant annealing sequences on a water-wall DC arc lamp RTP system are presented and used to suggest techniques for process optimization.


1985 ◽  
Vol 52 ◽  
Author(s):  
Alwin E. Michel

ABSTRACTTransient enhanced diffusion during rapid thermal processing has been reported for most of the common dopants employed for silicon device fabrication. For arsenic a large amount of the available data is fit by a computational model based on accepted diffusion mechanisms. Ion implanted boron on the other hand exhibits anomalous tails and transient motiou. A time dependence of this displacement is demonstrated at lower temperatures. High temperature rapid anneals are shown to reduce some of the anomalous motion observed for low temperature furnace anneals. A model is described that links the electrical activation with the diffusion and describes both the transient diffusion of rapid thermal processing and the large anomalous diffusion reported many years ago for furnace anneals.


1997 ◽  
Vol 477 ◽  
Author(s):  
A. Kamath ◽  
B. Y. Kim ◽  
P. M. Blass ◽  
Y. M. Sun ◽  
J. M. White ◽  
...  

ABSTRACTThe oxidation resistance of ultrathin (5–15Å) thermally grown silicon nitride (Si3N4), in conditions relevant to the deposition/annealing of Tantalum Pentoxide (Ta2O5) in a Rapid Thermal Processing (RTP) environment, has been non destructively examined using X-Ray Photoelectron Spectroscopy (XPS). This has been carried out with a view to establishing a process window for the deposition of Ta2O5 on a Rapid Thermally Nitrided (RTN) Si(100) surface, with negligible oxidation of the Si(100) substrate. A physical model of the oxidation process of these films is also proposed.


1996 ◽  
Vol 429 ◽  
Author(s):  
J. A. Kittl ◽  
D. A. Prinslow ◽  
G. Misium ◽  
M. F. Pas

AbstractRapid thermal processing is widely applied in self-aligned Ti silicide processes for deep-submicron devices. We investigated and modeled the effects of rapid thermal processing variables (silicide formation temperature and time, and anneal temperature and time) and Ti thickness on deep-sub-micron device characteristics. The effect of Ti thickness, formation temperature and time on diode leakage and bridging due to silicide lateral growth, and its correlation to silicide thickness was analyzed; as well as the effects of these and the anneal variables on n+ gate sheet resistance, silicide to source/drain contact resistance and transistor source-drain series resistance. An expression for n+ gate sheet resistance is given, as function of anneal temperature and time, silicide thickness, linewidth and TiSi2 C49 grain size after formation, based on a nucleation density model in agreement with measurements of TiSi2 C49 to C54 transformation kinetics. The tradeoffs and process window limits are discussed, as well as trends observed when scaling down lateral and vertical dimensions. We show that for advanced technologies, the scaling of silicide thickness and linewidth narrows the process window between full C49 to C54 transformation and agglomeration temperatures. Due to the high activation energy of the C49 to C54 transformation, a process window for low sheet resistance exists only for high temperature-short time processes.


1998 ◽  
Vol 514 ◽  
Author(s):  
Karen Maex ◽  
Eiichi Kondoh ◽  
Anne Lauwers ◽  
Muriel DePotter ◽  
Joris Prost

ABSTRACTThe introduction of rapid thermal processing for silicide formation has triggered a lot of research to temperature uniformity and reproducibility in RTP systems. From the other side there has been the demand to make the process itself as robust as possible for temperature variations. Indeed the way the module is set up can open or close the thermal process window for silicidation. In addition to the temperature, the ambient control is to be taken into account. Although gasses are specified to a low level of contaminants, the RTP step needs to be optimized for optimal contaminant reduction. Besides, the process wafer itself can be a source of contamination. In this paper an overview will be given of the role of temperature and ambient during RTP on the silicidation processes. The effect of the wafer on ambient purity will be highlighted. It will be shown that the latter can also have an impact on other process steps in the interconnect technology.


1985 ◽  
Vol 52 ◽  
Author(s):  
R. A. Powell ◽  
M. L. Manion

ABSTRACTThis bibliography presents 342 references to work published on rapid thermal processing (RTP) from 1979 through mid-1985. A variety of broad-beam energy sources are represented, including: arc and quartz-halogen lamps, blackbody radiators, strip heaters, broadly rastered electron beams, and defocused CO2 lasers. Citations were obtained by both manual searching and searching of a commercially available computerized data base (I NSPEC). Entries are grouped under 13 topical headings: reviews, implanted dopant activation and diffusion in silicon, polycrystalline silicon, silicides and polycides, metals, dielectrics, compound semiconductors, defects and microstructure, device applications (silicon and compound semiconductors), miscellaneous applications, equipment, and modeling. Within each group, citations are arranged alphabetically by title. A full author index is provided.


1995 ◽  
Vol 387 ◽  
Author(s):  
R. P. S. Thakur ◽  
K. Schuegraf ◽  
P. Fazan ◽  
H. Rhodes ◽  
R. Zahorik

AbstractWhile repeatable and accurate measurement of temperature in rapid thermal processing (RTP) remains a subject of ongoing research, inception of large-diameter wafers and deep subhalf micron design rules may be viewed as good news for implementing RTP during the development phase for later transfer to volume manufacturing. To date, the only well-established application of RTP in manufacturing is silicide annealing. However, research during the past decade has demonstrated the feasibility of using RTP to replace essentially all furnace-based thermal processes in sub-half micron process flows. These developments in the RTP capability offer several technological and economic benefits such as improved defect control, higher product yields, and faster development cycles for DRAM-type technologies at a reduced cost and with an earlier entry of the driver products during the revenue-generating period.In this paper, we review several applications of RTP such as silicide anneals, borophosphosilicate glass (BPSG) reflow, dopant activation, and rapid thermal nitridation (RTN) and discuss the integration issues related to advanced process flows. Furthermore, we highlight important manufacturing parameters like throughput, machine cost and uptime, software and hardware issues, wafer dimensional analysis, and simulation expectations. While considering volume manufacturing, we make some calibration and process control recommendations.


1987 ◽  
Vol 92 ◽  
Author(s):  
D.L. Plumton

ABSTRACTA process for Zn diffusion into GaAs during rapid thermal processing has been developed using Zn doped tungsten silicide as the diffusion source. The WSi:Zn is a sputter deposited, solid source layer that undergoes capless annealing in a quartz-halogen lamp system. For a given time and temperature the diffusion of Zn into GaAs is controlled by both the Zn concentration and the W/Si ratio in the film. Tungsten-rich films are Zn concentration “independent” while Si-rich films are Zn concentration “dependent.” Changing the film composition allows shallow Zn diffusions at either a low or a high temperature. Deep Zn diffusions are possible through higher temperatures or longer anneal times for any given WSi:Zn composition.


Sign in / Sign up

Export Citation Format

Share Document