DESIGN LOW VOLTAGE CURRENT MIRROR AT 32NM REGIME

2017 ◽  
Vol 5 (1) ◽  
pp. 16
Author(s):  
Avinash Sukadeo Pawar
Keyword(s):  
Power Supply ◽  
High Speed ◽  
High Stability ◽  
Low Voltage ◽  
Current Mirror ◽  
Lower Power ◽  
Speed Performance ◽  
Accurate Performance ◽  
Simulation Results ◽  
Lower Voltage

As the technology moving towards lower voltage for high stability and accurate performance. We design low voltage current mirror using IGFET, FDSOI, CNTFET.These transistor moving towards low-voltage high-speed performance. Here in this paper, we have design low voltage current mirror for Accurate duplication of current. To obtain accurate duplication of current we verify the performance of low voltage current mirror on FDSOI and CNTFET Transistor having 32nm technology.The circuit is simulated with 32nm technology for FDSOI and CNFET. They operate at lower power supply than IGFET. The simulation results show the improvement in knee voltage 1.7v and 1.3v for the current mirror.

A LOW-POWER AND HIGH-SPEED D FLIP-FLOP USING A SINGLE LATCH

2002 ◽  
Vol 11 (01) ◽  
pp. 51-55
Author(s):  
ROBERT C. CHANG ◽  
L.-C. HSU ◽  
M.-C. SUN
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Power Dissipation ◽  
High Speed ◽  
Operating Frequency ◽  
Flip Flop ◽  
Lower Power ◽  
Simulation Results ◽  
Hspice Simulation

A novel low-power and high-speed D flip-flop is presented in this letter. The flip-flop consists of a single low-power latch, which is controlled by a positive narrow pulse. Hence, fewer transistors are used and lower power consumption is achieved. HSPICE simulation results show that power dissipation of the proposed D flip-flop has been reduced up to 76%. The operating frequency of the flip-flop is also greatly increased.

Low Power FGSRAM Cell Using Sleepy and LECTOR Technique

2016 ◽  
Vol 4 (2) ◽  
pp. 333 ◽  
Author(s):  
Kanan Bala Ray ◽  
Sushanta Kumar Mandal ◽  
Shivalal Patro
Keyword(s):  
Low Power ◽  
Power Supply ◽  
High Stability ◽  
Supply Voltage ◽  
Cmos Technology ◽  
Floating Gate ◽  
Power Supply Voltage ◽  
Operation Analysis ◽  
Sram Cell ◽  
Simulation Results

<em>In this paper floating gate MOS (FGMOS) along with sleep transistor technique and leakage control transistor (LECTOR) technique has been used to design low power SRAM cell. Detailed investigation on operation, analysis and result comparison of conventional 6T, FGSRAM, FGSLEEPY, FGLECTOR and FGSLEEPY LECTOR has been done. All the simulations are done in Cadence Virtuoso environment on 45 nm standard CMOS technology with 1 V power supply voltage. Simulation results show that FGSLEEPY LECTOR SRAM cell consumes very low power and achieves high stability compared to conventional FGSRAM Cell</em>

scholarly journals Analysis of the Degradation of MOSFETs in Switching Mode Power Supply by Characterizing Source Oscillator Signals

2013 ◽  
Vol 2013 ◽  
pp. 1-7 ◽  
Author(s):  
Xueyan Zheng ◽  
Lifeng Wu ◽  
Yong Guan ◽  
Xiaojuan Li
Keyword(s):  
Power Supply ◽  
High Speed ◽  
Nuclear Power ◽  
Low Voltage ◽  
Junction Temperature ◽  
Factors Affecting ◽  
Die Attach ◽  
Switching Mode Power Supply ◽  
Switching Mode ◽  
State Resistance

Switching Mode Power Supply (SMPS) has been widely applied in aeronautics, nuclear power, high-speed railways, and other areas related to national strategy and security. The degradation of MOSFET occupies a dominant position in the key factors affecting the reliability of SMPS. MOSFETs are used as low-voltage switches to regulate the DC voltage in SMPS. The studies have shown that die-attach degradation leads to an increase in on-state resistance due to its dependence on junction temperature. On-state resistance is the key indicator of the health of MOSFETs. In this paper, an online real-time method is presented for predicting the degradation of MOSFETs. First, the relationship between an oscillator signal of source and on-state resistance is introduced. Because oscillator signals change when they age, a feature is proposed to capture these changes and use them as indicators of the state of health of MOSFETs. A platform for testing characterizations is then established to monitor oscillator signals of source. Changes in oscillator signal measurement were observed with aged on-state resistance as a result of die-attach degradation. The experimental results demonstrate that the method is efficient. This study will enable a method to predict the failure of MOSFETs to be developed.

Real-Time Database System Implementation of Railway Signal Power Source Remote Monitoring

2011 ◽  
Vol 128-129 ◽  
pp. 961-964
Author(s):  
Zhi Jian Qu ◽  
Li Liu
Keyword(s):  
Power Supply ◽  
Remote Monitoring ◽  
High Speed ◽  
Low Voltage ◽  
Signal Power ◽  
High Speed Railway ◽  
Railway Traffic ◽  
Power Failure ◽  
Railway Signal ◽  
Real Time Database

Railway signal is a key technology for high-speed railway，which is the foundation to keep the high-speed train line. Railway signal power is the automatic blocking of railway lines and 10kV lines transform into 380V power through after the power supply for railway signals. Signal power as the railway traffic signal of the power supply, it belongs to the first level of power system load. Its 10kV high voltage side stik up by the major of electric, 380V low voltage side maintenance by the signal major. When the signal power failure, often occur shirk responsibilities between the different majors, in order to define the responsibilities of the accident better, which need automation remote monitoring for main railway lines of the railway signal power and scheduling control as soon as possible[1-3].

Analysis of EMI from Pantograph-catenary Arc on Speed Sensor Based on the High-speed Train Model

2021 ◽  
Vol 36 (2) ◽  
pp. 205-212
Author(s):  
Yutao Tang ◽  
Feng Zhu ◽  
Yingying Chen
Keyword(s):  
Power Supply ◽  
Electromagnetic Interference ◽  
High Speed ◽  
Control Unit ◽  
Composite Model ◽  
High Speed Train ◽  
Traction Control ◽  
Speed Sensor ◽  
Simulation Results ◽  
The Magnetic Field

There will be the pantograph-catenary arc (PCA) when the pantograph of a high-speed train is separated from the power supply line, and the electromagnetic interference (EMI) caused by the PCA can affect speed sensors of the train. To study the influence of the PCA, firstly, the traction control unit (TCU) speed sensor of the high-speed train is researched. The result shows both overvoltage and electromagnetic radiation (EMR) generated by the PCA can influence the signal of speed sensor. Secondly, the composite model of the train is established. Then, the interference of the PCA on the TCU speed sensor is verified. The results of practical measurements show the PCA causes a maximum overvoltage of 680 V on train body (TB) and increases the magnetic field around TB to a maximum of 58 dBµA/m. This is the reason of sensor malfunction, which is consistent with the theoretical and simulation results. Finally, the methods to reduce the EMI of the PCA are proposed.

Low-Voltage-Power-Supply-Fed 1.5-kW 150,000-r/min Ultra-High-Speed PM Motor Designed to Maximize Efficiency and Power Density

2014 ◽  
Vol 134 (6) ◽  
pp. 641-648 ◽  
Author(s):  
Toshihiko Noguchi ◽  
Tetsuro Wada ◽  
Masaru Kano ◽  
Takehiro Komori
Keyword(s):  
Power Density ◽  
Power Supply ◽  
High Speed ◽  
Low Voltage ◽  
Ultra High Speed

Common Mode Feedback Circuits for Low Voltage Fully-Differential Amplifiers

2016 ◽  
Vol 25 (10) ◽  
pp. 1650124 ◽  
Author(s):  
S. Rekha ◽  
T. Laxminidhi
Keyword(s):  
Power Supply ◽  
Continuous Time ◽  
Efficient Solution ◽  
Low Voltage ◽  
Cmos Technology ◽  
Common Mode ◽  
Power Efficient ◽  
Differential Amplifiers ◽  
Fully Differential ◽  
Simulation Results

Continuous time common mode feedback (CMFB) circuits for low voltage, low power applications are proposed. Four circuits are proposed for gate/bulk-driven pseudo-differential transconductors operating on sub-1-V power supply. The circuits are validated for a bulk-driven pseudo-differential transconductor operating on 0.5[Formula: see text]V in 0.18[Formula: see text][Formula: see text]m standard CMOS technology. Simulation results reveal that the proposed CMFB circuits offer power efficient solution for setting the output common mode of the transconductors. They also load the transconductor capacitively offering capacitance of about 1[Formula: see text]fF to tens of femto farads.

Low Power Operational Transconductance Amplifier (OTA) with Enhanced DC Gain and Slew-Rate

2013 ◽  
Vol 411-414 ◽  
pp. 1645-1648
Author(s):  
Xiao Zong Huang ◽  
Lun Cai Liu ◽  
Jian Gang Shi ◽  
Wen Gang Huang ◽  
Fan Liu ◽  
...  
Keyword(s):  
Low Voltage ◽  
Cmos Technology ◽  
Optimization Techniques ◽  
Current Mirror ◽  
Slew Rate ◽  
Operational Transconductance Amplifier ◽  
Theory Analysis ◽  
Transconductance Amplifier ◽  
Dc Gain ◽  
Simulation Results

This paper presents a low-voltage differential operational transconductance amplifier (OTA) with enhanced DC gain and slew-rate. Based on the current mirror OTA topology, the optimization techniques are discussed in this work. The proposed structure achieves enhanced DC gain, unit gain frequency (UGF) and slew-rate (SR) with adding four devices. The design of the OTA is described with theory analysis. The OTA operates at the power supply of 1.8V. Simulation results for 0.18μm standard CMOS technology show that the DC gain increases from 60.6dB to 65dB, the UGF is optimized from 2.5MHz to 4.3MHz, the SR is enhanced from 0.88 V/μs to 4.8 V/μs with close power consumption dramatically.

DESIGN CONSIDERATIONS FOR INTEGRATED MODULATOR DRIVERS IN SILICON GERMANIUM TECHNOLOGY

2005 ◽  
Vol 15 (03) ◽  
pp. 477-495 ◽  
Author(s):  
SHANTHI PAVAN ◽  
MAURICE TARSIA ◽  
STEFFEN KUDSZUS ◽  
DAVID PRITZKAU
Keyword(s):  
Power Supply ◽  
Silicon Germanium ◽  
High Speed ◽  
Design Considerations ◽  
Trade Offs ◽  
Bicmos Technology ◽  
Sige Bicmos ◽  
Present Design ◽  
Simulation Results ◽  
Modulator Driver

We present design considerations for high speed high swing differential modulator drivers in SiGe BiCMOS technology. Trade-offs between lumped and distributed designs, and linear and limiting amplifiers are examined. The design of a 6 V output modulator driver is discussed in detail. The driver features a unique bias generation and distribution circuit that enables low power-supply operation. Simulation results and measurements are given.

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