Prediction of Approximate Multiplier for 16-Bit DICOM Image Contrast Scaling Using Classical Machine Learning Approach
Abstract The role of approximate arithmetic are involved when the processors are used for multimedia signal processing application. The impact of multiplier is very important in many processes done by these processors. The compressors are the core architecture for reduction stage if the multiplier width is increased. Later approximations are done in the compressor to limited error without affecting the signal standard. The design of scalable-split compressor is designed in this work and a counter matching method has been developed for approximation. The design of 32x32 and 16x16 multiplier with these new compressors are synthesised in 45nm Synopsis Design Compiler and shows an improvement of 25 % of Chip area and 27% power. The split-scalable architecture attempts to reduce the delay with trade-off in area and power. Mean Error Distance (MED) and Normalized Error Distance (NED) are the parameters that ensure the quality of any approximate arithmetic based design. 16-bit medical images are processed with both existing and proposed multipliers then the Peak Signal to Noise Ratio (PSNR) is compared. Finally with several input nature and targeted PSNR the best system is identified using classical machine learning model.