scholarly journals Определение параметров структур металл-диэлектрик- полупроводник со сверхтонким изолирующим слоем из высокочастотных вольт-фарадных характеристик

2019 ◽  
Vol 53 (1) ◽  
pp. 46
Author(s):  
Е.И. Гольдман ◽  
Н.Ф. Кухарская ◽  
С.А. Левашов ◽  
Г.В. Чучева
Keyword(s):  
Total Concentration ◽  
Oxide Thickness ◽  
Charge Carriers ◽  
Oxide Semiconductor ◽  
Flat Band ◽  
Band Bending ◽  
Insulating Layer ◽  
Energy Band Bending ◽  
Capacitance Voltage ◽  
Boundary States

AbstractA simple numerical method for processing the data of the high-frequency capacitance–voltage characteristics of metal–insulator–semiconductor structures is proposed. The approach is based on analyzing the experimental characteristics near the flat-band states, where the charge exchange of surface localized electron states is of little importance compared with changes in the near-boundary charged layer in the semiconductor. The developed technique makes it possible, first, to find the necessary parameters of the semiconductor and insulating layer and, second, to obtain the experimental field dependences of the energy-band bending in the semiconductor and the total concentration of the built-in charge, the charge of boundary states and minority charge carriers at the semiconductor–insulator interface in the range from the flat bands to deep depletion. The technique is well applicable to structures with an ultra-thin insulating layer. On n -Si-based metal–oxide–semiconductor samples with an oxide thickness of 39 Å, experimental approbation of the proposed approach is carried out. The accuracy of the obtained results is 2–3%.

scholarly journals Comparative Study ofSiO2,Al2O3, and BeO Ultrathin Interfacial Barrier Layers in Si Metal-Oxide-Semiconductor Devices

2012 ◽  
Vol 2012 ◽  
pp. 1-7 ◽  
Author(s):  
J. H. Yum ◽  
J. Oh ◽  
Todd. W. Hudnall ◽  
C. W. Bielawski ◽  
G. Bersuker ◽  
...  
Keyword(s):  
Metal Oxide ◽  
High Performance ◽  
Field Effect Transistors ◽  
Beryllium Oxide ◽  
Atomic Layer ◽  
Oxide Thickness ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Flat Band ◽  
Effective Electron

In a previous study, we have demonstrated that beryllium oxide (BeO) film grown by atomic layer deposition (ALD) on Si and III-V MOS devices has excellent electrical and physical characteristics. In this paper, we compare the electrical characteristics of inserting an ultrathin interfacial barrier layer such as SiO2, Al2O3, or BeO between the HfO2gate dielectric and Si substrate in metal oxide semiconductor capacitors (MOSCAPs) and n-channel inversion type metal oxide semiconductor field effect transistors (MOSFETs). Si MOSCAPs and MOSFETs with a BeO/HfO2gate stack exhibited high performance and reliability characteristics, including a 34% improvement in drive current, slightly better reduction in subthreshold swing, 42% increase in effective electron mobility at an electric field of 1 MV/cm, slightly low equivalent oxide thickness, less stress-induced flat-band voltage shift, less stress induced leakage current, and less interface charge.

Experimental Observations of the Redistribution of Implanted Nitrogen at the Si-SiO2 Interface During RTA Processing

1999 ◽  
Vol 568 ◽  
Author(s):  
Patrick S. Lysaght ◽  
Billy Nguyen ◽  
Joe Bennett ◽  
Gary Williamson ◽  
Kenneth Torres ◽  
...  
Keyword(s):  
Thermal Processing ◽  
Nitrogen Concentration ◽  
Oxide Semiconductor ◽  
Flat Band ◽  
Rapid Thermal Anneal ◽  
Mos Capacitors ◽  
Capacitance Voltage ◽  
Steady State Time ◽  
Nitrogen Abundance ◽  
Secondary Ion

ABSTRACTThe redistribution of nitrogen from silicon to the Si-SiO2 interface due to thermal processing is investigated by Secondary Ion Mass Spectroscopy (SIMS) using Metal-Oxide-Semiconductor (MOS) capacitors. SIMS profiles of implanted atomic nitrogen concentration indicate a significant redistribution of the nitrogen, from the silicon to the oxide layer in response to variations of the steady state time and temperature parameters of Rapid Thermal Anneal (RTA) processing. RTA treatment, in N2 ambient, over a temperature range of 750°C - 1100°C, results in a measured increase of the integrated nitrogen peak at the interface. High Frequency Capacitance Voltage (HFCV) measurements of an implanted (N/ 5 × 1014 cm2/s / 26keV) and annealed (900°C / 10s) sample is compared with a control (without N implant) sample to determine the relative nitrogen abundance at the interface. This value corresponds to the increase in fixed oxide charge Q that produces a negative shift in the flat band voltage Vo under negative gate bias conditions.

scholarly journals Study of Interface Charge Densities for ZrO2and HfO2Based Metal-Oxide-Semiconductor Devices

2014 ◽  
Vol 2014 ◽  
pp. 1-6 ◽  
Author(s):  
N. P. Maity ◽  
Reshmi Maity ◽  
R. K. Thapa ◽  
S. Baishya
Keyword(s):  
Metal Oxide ◽  
Oxide Thickness ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Charge Densities ◽  
Interface Charge ◽  
Capacitance Voltage ◽  
P Type ◽  
Mos Structures ◽  
Good Agreement

A thickness-dependent interfacial distribution of oxide charges for thin metal oxide semiconductor (MOS) structures using high-kmaterials ZrO2and HfO2has been methodically investigated. The interface charge densities are analyzed using capacitance-voltage (C-V) method and also conductance (G-V) method. It indicates that, by reducing the effective oxide thickness (EOT), the interface charge densities (Dit) increases linearly. For the same EOT,Dithas been found for the materials to be of the order of 1012 cm−2 eV−1and it is originated to be in good agreement with published fabrication results at p-type doping level of1×1017 cm−3. Numerical calculations and solutions are performed by MATLAB and device simulation is done by ATLAS.

Retarded Oxide Growth on 4H-SiC(0001) Substrates due to Sacrificial Oxidation

2014 ◽  
Vol 778-780 ◽  
pp. 562-565 ◽  
Author(s):  
Takuji Hosoi ◽  
Yusuke Uenishi ◽  
Yuki Nakano ◽  
Takashi Nakamura ◽  
Takayoshi Shimura ◽  
...  
Keyword(s):  
Photoelectron Spectroscopy ◽  
Frequency Dispersion ◽  
Oxide Thickness ◽  
Oxide Semiconductor ◽  
Oxidation Treatment ◽  
Mos Capacitor ◽  
X Ray ◽  
Initial Stage ◽  
Capacitance Voltage ◽  
The Impact

The impact of a sacrificial oxidation treatment on subsequent gate oxide formation on 4H-SiC(0001) substrates was investigated. Although x-ray photoelectron spectroscopy (XPS) analysis revealed that the SiC surface after removing a 40-nm-thick sacrificial oxide by diluted HF solution was almost identical to that of an as-grown epilayer, the subsequent dry O2 oxidation resulted in a thinner SiO2 layer for the sample with the sacrificial oxidation in the ultrathin film regime (~3 nm). The metal-oxide-semiconductor (MOS) capacitor with sacrificial oxidation also exhibited a larger frequency dispersion in capacitance-voltage (C-V) characteristics, indicating that interface property had been degraded. However, when the oxide thickness reached about 10 nm, there was no difference in frequency dispersion with and without sacrificial oxidation. This means that the SiO2 growth in the initial stage of oxidation was significantly affected by the sacrificial oxidation treatment.

Capacitance-Voltage (C-V) Hysteresis in the Metal-Oxide-Semiconductor Capacitor with Si Nanocrystals Deposited by the Gas Evaporation Technique

2001 ◽  
Vol 686 ◽  
Author(s):  
Puspashree Mishra ◽  
Shinji Nozaki ◽  
Ryuta Sakura ◽  
Hiroshi Morisaki ◽  
Hiroshi Ono ◽  
...  
Keyword(s):  
Metal Oxide ◽  
Supersonic Jet ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Flat Band ◽  
Mos Capacitor ◽  
Si Nanocrystals ◽  
Capacitance Voltage ◽  
Evaporation Technique ◽  
Gas Evaporation Technique

AbstractCapacitance-Voltage (C-V) hysteresis was observed in the Metal-Oxide-Semiconductor (MOS) capacitor with silicon nanocrystals. The MOS capacitor was fabricated by thermal oxidation of Si nanocrystals, which were deposited on an ultra-thin thermal oxide grown previously on a p-type Si substrate. The Si nanocrystals were deposited by the gas evaporation technique with a supersonic jet nozzle. The size uniformity and the crystallinity of the Si nanocrystals are found to be better than those fabricated by the conventional gas evaporation technique. The C-V hysteresis in the MOS capacitor is attributed to electron charging and discharging of the nanocrystals by direct tunneling though the ultra-thin oxide between the nanocrystals and the substrate. The flat-band voltage shift observed during the C-V measurement depends on the size and density of the nanocrystals and also on the magnitude of the positive gate bias for charging. The retention characteristic is also discussed.

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