scholarly journals Plug-and-play transceiver with high gain and ultra low noise figure for IEEE 802.15.4 application

2019 ◽  
Vol 32 (2) ◽  
pp. 231-238
Author(s):  
Josue Lopez-Leyva ◽  
Miguel Ponce-Camacho ◽  
Ariana Talamantes-Alvarez
Keyword(s):  
High Speed ◽  
Ieee 802.15.4 ◽  
Noise Figure ◽  
Impedance Matching ◽  
High Gain ◽  
Low Noise ◽  
Scattering Parameters ◽  
Performance Simulation ◽  
Noise Amplifier ◽  
And Performance

This paper shows the design and performance simulation of a 2.4 GHz plugand- play transceiver based on a high speed switch for IEEE 802.15.4 applications. The electrical design was optimized taking into account the scattering parameters, inputoutput impedance matching and minimum trace width. The simulation results show an important performance regarding the Noise Figure (0.38 dB) and gain (21 dB) at particular temperature for reception mode, transmission scattering parameters (S12 and S21) and reflection scattering parameters (all the rest parameters) for both mode operation (Power Amplifier and Low Noise Amplifier).

Design of Low-Noise Two-Path Amplifier for 6–16 GHz Applications

2020 ◽  
pp. 2150136
Author(s):  
Asieh Parhizkar Tarighat ◽  
Mostafa Yargholi
Keyword(s):  
Noise Figure ◽  
Impedance Matching ◽  
High Gain ◽  
Low Noise ◽  
Cmos Process ◽  
Input Matching ◽  
Inductive Peaking ◽  
Linearity Improvement ◽  
Noise Amplifier ◽  
Path Structure

A two-path low-noise amplifier (LNA) is designed with TSMC 0.18[Formula: see text][Formula: see text]m standard RF CMOS process for 6–16[Formula: see text]GHz frequency band applications. The principle of a conventional resistive shunt feedback LNA is analyzed to demonstrate the trade-off between the noise figure (NF) and the input matching. To alleviate the mentioned issue for wideband application, this structure with noise canceling technique and linearity improvement are applied to a two-path structure. Flat and high gain is supplied by the primary path; while the input and output impedance matching are provided by the secondary path. The [Formula: see text][Formula: see text]dB bandwidth can be increased to a higher frequency by inductive peaking, which is used at the first stage of the two paths. Besides, by biasing the transistors at the threshold voltage, low power dissipation is achieved. The [Formula: see text][Formula: see text]dB gain bandwidth of the proposed LNA is 10[Formula: see text]GHz, while the maximum power gain of 13.1[Formula: see text]dB is attained. With this structure, minimum NF of 4.6[Formula: see text]dB and noise flatness of 1[Formula: see text]dB in the whole bandwidth can be achieved. The input impedance is matched, and S[Formula: see text] is lower than [Formula: see text]10 dB. With the proposed linearized LNA, the average IIP[Formula: see text][Formula: see text]dBm is gained, while it occupies 1051.7[Formula: see text][Formula: see text]m die area.

scholarly journals Analytical Performance of Low Noise Amplifier Using Single-Stage Configuration for ADS-B Receiver

2021 ◽  
Vol 21 (2) ◽  
pp. 91
Author(s):  
M. Reza Hidayat ◽  
Ilham Pazaesa ◽  
Salita Ulitia Prini
Keyword(s):  
Return Loss ◽  
Noise Figure ◽  
Impedance Matching ◽  
High Gain ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Stability Factor ◽  
Ic 10 ◽  
Radar Applications ◽  
Noise Amplifier

Automatic dependent surveillance-broadcast (ADS-B) is an equipment of a radar system to reach difficult areas. For radar applications, an ADS-B requires a low noise amplifier (LNA) with high gain, stability, and a low noise figure. In this research, to produce an LNA with good performance, an LNA was designed using a BJT transistor 2SC5006 with DC bias, VCE = 3 V, and current Ic = 10 mA, also a DC supply with VCC = 12 V, to achieve a high gain with a low noise figure. The initial LNA impedance circuit was simulated using 2 elements and then converted into 3 elements to obtain parameters according to the target specification through the tuning process, impedance matching circuit was used to reduce return loss and voltage standing wave ratio (VSWR) values. The LNA sequence obtains the working frequency of 1090 MHz, return loss of -52.103 dB, a gain of 10.382, VSWR of 1.005, a noise figure of 0.552, stability factor of 0.997, and bandwidth of 83 MHz. From the simulation results, the LNA has been successfully designed according to the ADS-B receiver specifications.

Inductive Feedback Technique for Design of High Gain 0.18μm CMOS LNA for 5G Applications

2021 ◽  
pp. 2150236
Author(s):  
Anjana Jyothi Banu ◽  
G. Kavya ◽  
D. Jahnavi
Keyword(s):  
Reflection Coefficient ◽  
Noise Figure ◽  
Cmos Technology ◽  
High Gain ◽  
Low Noise ◽  
Common Source ◽  
Matching Network ◽  
Input Matching ◽  
Cmos Lna ◽  
Noise Amplifier

A 26[Formula: see text]GHz low-noise amplifier (LNA) designed for 5G applications using 0.18[Formula: see text][Formula: see text]m CMOS technology is proposed in this paper. The circuit includes a common-source in the first stage to suppress the noise in the amplifier. The successive stage has a Cascode topology along with an inductive feedback to improve the power gain. The input matching network is designed to achieve the input reflection coefficient less than [Formula: see text]7dB at the intended frequency. The matching network at the output is designed using inductor–capacitor (LC) components connected in parallel to attain the output reflection coefficient of [Formula: see text]10[Formula: see text]dB. Due to the inductor added in feedback at the second stage. The [Formula: see text] obtained is 18.208[Formula: see text]dB at 26[Formula: see text]GHz with a noise figure (NF) of 2.8[Formula: see text]dB. The power supply given to the LNA is 1.8[Formula: see text]V. The simulation and layout of the presented circuit are performed using Cadence Virtuoso software.

A Full Integrated LNA in 0.18μm SiGe BiCMOS Technology

2013 ◽  
Vol 380-384 ◽  
pp. 3287-3291
Author(s):  
Bing Liang Yu ◽  
Xiao Ning Xie ◽  
Wen Yuan Li
Keyword(s):  
Wireless Local Area Network ◽  
Local Area Network ◽  
Noise Figure ◽  
Impedance Matching ◽  
Local Area ◽  
Low Noise ◽  
Area Network ◽  
Bicmos Technology ◽  
Sige Bicmos ◽  
Noise Amplifier

A fully integrated low noise amplifier (LNA) for wireless local area network (WLAN) application is presents. The circuit is fabricated in 0.18μm SiGe BiCMOS technology. For the low noise figure, a feedback path is introduced into the traditional inductively degenerated common emitter cascade LNA, which decreases the inductance for input impedance matching, therefore reduces the thermal noise caused by loss resistor. Impedance matching and noise matching are achieved at the same time. Measured results show that the resonance point of the output resonance network shifts from 2.4GHz to 2.8GHz, due to the parasitic effects at the output. At the frequency of 2.8GHz, the LNA achieves 2.2dB noise figure, 19.4dB power gain. The core circuit consumes only 13mW from a 1.8V supply and occupies less than 0.5mm2.

scholarly journals Design and Analysis High Gain PHEMT LNA for Wireless Application at 5.8 GHz

2015 ◽  
Vol 5 (3) ◽  
pp. 611
Author(s):  
Kamil Pongot ◽  
Abdul Rani Othman ◽  
Zahriladha Zakaria ◽  
Mohamad Kadim Suaidi ◽  
Abdul Hamid Hamidon ◽  
...  
Keyword(s):  
Return Loss ◽  
Noise Figure ◽  
High Gain ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Output Terminal ◽  
Wireless Application ◽  
Noise Amplifier ◽  
The Stability ◽  
Inductive Generation

This research present a design of a higher  gain (66.38dB) for PHEMT LNA  using an inductive drain feedback technique for wireless application at 5.8GHz. The amplifier it is implemented using PHEMT FHX76LP transistor devices.  The designed circuit is simulated with  Ansoft Designer SV.  The LNA was designed using  T-network as a matching technique was used at the input and output terminal,  inductive generation to the source and an inductive drain feedback. The  low noise amplifier (LNA) using lumped-component provides a noise figure 0.64 dB and a gain (S<sub>21</sub>) of 68.94 dB. The output reflection (S<sub>22</sub>), input reflection (S<sub>11</sub>) and return loss (S<sub>12</sub>) are -17.37 dB, -15.77 dB and -88.39 dB respectively. The measurement shows the  stability was at  4.54 and 3-dB bandwidth of 1.72 GHz. While, the  low noise amplifier (LNA) using  Murata manufactured component provides a noise figure 0.60 dB and a gain (S<sub>21</sub>) of 66.38 dB. The output reflection (S<sub>22</sub>), input reflection (S<sub>11</sub>) and return loss (S<sub>12</sub>) are -13.88 dB, -12.41 dB and -89.90 dB respectively. The measurement shows the  stability was at  6.81 and 3-dB bandwidth of 1.70 GHz. The input sensitivity more than -80 dBm  exceeded the standards required by IEEE 802.16.

scholarly journals Single Stage 180nm CMOS Low Noise Amplifier Topologies and Optimization Algorithms for S Band Frequency

2019 ◽  
Vol 8 (3) ◽  
pp. 152-157 ◽  
Keyword(s):  
Noise Figure ◽  
Optimization Algorithms ◽  
Satellite System ◽  
High Gain ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Dual Band ◽  
Active Device ◽  
Band Frequency ◽  
Noise Amplifier

Low Noise Amplifier (LNA) plays an important role in radio receivers. It mainly determines the system noise and intermodulation behavior of overall receiver. LNA design is more challenging as it requires high gain, low noise figure, good input and output matching and unconditional stability. Further, designing a Low noise Amplifier requires active device selection, amplifier topology, optimization algorithms for superlative results. Hence this paper presents performance analysis of CMOS LNA based on different topologies and optimization algorithms for 180nm RF CMOS design in S band frequency. Here the best results, various limitations in each topology are reviewed and required specifications are determined in each designing. Further this best topology is used for designing LNA circuit which could be used in Indian Regional Navigation Satellite System (IRNSS) applications in dual band frequency.

A 6.5-kV HBM ESD-protected high-gain LNA using cascaded L-match input network

2019 ◽  
Vol 33 (23) ◽  
pp. 1950280
Author(s):  
Guoxiao Cheng ◽  
Zhiqun Li ◽  
Pengfei Yue ◽  
Lei Luo ◽  
Xiaodong He ◽  
...  
Keyword(s):  
Noise Figure ◽  
Nonlinear Coefficient ◽  
Cmos Technology ◽  
High Gain ◽  
Low Noise ◽  
Third Order ◽  
Input Matching ◽  
Third Stage ◽  
Protection Circuits ◽  
Noise Amplifier

A wideband (2–3 GHz) three-stage low noise amplifier (LNA) with electrostatic discharge (ESD) protection circuits using 0.18 [Formula: see text]m CMOS technology is presented in this paper. Low-parasitic silicon-controlled rectifier (SCR) devices are co-designed with the LNA in the form of [Formula: see text]-parameters, and a new cascaded L-match input network is proposed to reduce the parasitic effects of them on the input matching. To improve linearity performance, an optimized multiple-gated transistors method (MGTR) is proposed and applied to the third stage, which takes both transconductance [Formula: see text] and third-order nonlinear coefficient [Formula: see text] into consideration. The measured results show a wide input matching across 2–8 GHz and a high third-order input intercept point (IIP3) of −12.8 dBm. The peak power gain can achieve 29.1 dB, and the noise figure (NF) is in a range of 3.1–3.6 dB within the 3-dB bandwidth. Using SCR devices with low parasitic capacitance of [Formula: see text]80 fF and robust gate-driven power clamps, a 6.5-kV human body mode (HBM) ESD performance is obtained.

A Low Noise Amplifier with 1.1dB Noise Figure and +17dBm OIP3 for GPS RF Receivers

2013 ◽  
Vol 336-338 ◽  
pp. 1490-1495
Author(s):  
Yong Xiang ◽  
Yan Bin Luo ◽  
Ren Jie Zhou ◽  
Cheng Yan Ma
Keyword(s):  
Noise Figure ◽  
Impedance Matching ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Gain Compression ◽  
Sige Hbt ◽  
Current Consumption ◽  
Sige Bicmos ◽  
Noise Amplifier ◽  
Feedback Resistor

A 1.575GHz SiGe HBT(heterojunction bipolar transistor) low-noise-amplifier(LNA) optimized for Global Positioning System(GPS) L1-band applications was presented. The designed LNA employed a common-emitter topology with inductive emitter degeneration to simultaneously achieve low noise figure and input impedance matching. A resistor-bias-feed circuit with a feedback resistor was designed for the LNA input transistor to improve the gain compression and linearity performance. The LNA was fabricated in a commercial 0.18µm SiGe BiCMOS process. The LNA achieves a noise figure of 1.1dB, a power gain of 19dB, a input 1dB compression point(P1dB) of -13dBm and a output third-order intercept point(OIP3) of +17dBm at a current consumption of 3.6mA from a 2.8V supply.

A 1.8 to 4 GHz inductor-less highly linear CMOS LNA for wire-less receivers

2021 ◽  
pp. 11-20
Author(s):  
Nguyen Huu Tho
Keyword(s):  
Noise Figure ◽  
Impedance Matching ◽  
Wide Band ◽  
Low Noise ◽  
Common Source ◽  
Cmos Process ◽  
Wide Range ◽  
Active Feedback ◽  
Cmos Lna ◽  
Noise Amplifier

This paper presents an inductor-less wide-band highly linear low-noise amplifier (LNA) for wire-less receivers. The inductor-less LNA consists of a complementary current-reuse common source amplifier combined with a low-current active feedback to obtain wide range input impedance matching and low noise figure. In our LNA, a degeneration resistor is utilized to improve linearity of the LNA. Furthermore, we designed a bypass mode for the LNA to extend the range of its applications. The proposed LNA is implemented in 28 nm CMOS process. It has a gain of 14.9 dB and a bandwidth of 2.2 GHz. The noise figure (NF) is 1.95 dB and the third-order input intercept point (IIP3) is 24.8 dBm at 2.3 GHz. It consumes 17.2 mW at a 0.9-V supply and has an area of 0.011 mm2.

A Fully Integrated 5.2-GHz CMOS Variable Gain LNA for 802.11a WLAN

2012 ◽  
Vol 433-440 ◽  
pp. 5579-5583
Author(s):  
Ji Hai Duan ◽  
Chun Lei Kang
Keyword(s):  
Power Supply ◽  
Return Loss ◽  
Noise Figure ◽  
High Gain ◽  
Low Noise ◽  
Cmos Process ◽  
Small Signal ◽  
Fully Integrated ◽  
Variable Gain ◽  
Noise Amplifier

A fully integrated 5.2GHz variable gain low noise amplifier (VGLNA) in a 0.18μm CMOS process is proposed in this paper. The VGLAN can achieve a maximum small signal gain of 17.85 dB within the noise figure (NF) of 2.04 dB and a minimum gain of 2.04 dB with good input return loss. The LNA’s P1dB in the high gain mode is -17.5 dBm. The LAN consumes only 14.58 mW from a 1.8V power supply.

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