scholarly journals Preparation of PMMA/PGMA Blend to Apply for Metallographic Cross Section of Printed Circuit Board

2017 ◽  
Author(s):  
Xue-Mei He ◽  
Tao Shen ◽  
Shou-Xu Wang ◽  
Yuan-Ming Chen ◽  
Huai-Wu Zhang ◽  
...  
Keyword(s):  
Cross Section ◽  
Printed Circuit Board ◽  
Circuit Board ◽  
Printed Circuit ◽  
Metallographic Cross Section

Miniaturized Planar Tomography for Multiphase Stagnant Sample Detection

2015 ◽  
Vol 73 (6) ◽  
Author(s):  
Nur Adila Mohd Razali ◽  
Aizat Azmi ◽  
Shahrulnizahani Mohammad Din ◽  
Pei Song Chee ◽  
Nor Muzakkir Nor Ayob ◽  
...  
Keyword(s):  
Cross Section ◽  
Printed Circuit Board ◽  
Circuit Board ◽  
Projection Algorithm ◽  
Back Projection ◽  
Controllable System ◽  
Printed Circuit ◽  
Tomography System ◽  
Cell Measurement ◽  
Linear Back Projection

Miniaturized device offers portability, high throughput and faster time response compared to macroscale devices. In microdevices, most of the application utilizes planar electrode for microanalysis process as it is inexpensive, highly controllable system and easy for installation. In addition, miniaturized planar sensor offers great potential for microscale medical diagnosis, chemical analysis, environmental analysis, cell culture application and single cell measurement using tomography measurement. In this project, a miniaturized planar tomography system is developed for multiphase sample detection such as liquid-solid and liquid-liquid. Eight-electrode device was fabricated on the copper plated printed circuit board (PCB) using the commercial fabrication technique. The ability of the proposed device in reconstructing images of a multiphase sample using Linear Back Projection algorithm is tested. Experimental results show that the reconstructed images closely resemble with the cross-section of the stagnant multiphase sample.

Reliability Assessment for Printed Circuit Board in Lead-Free Process

2009 ◽  
Author(s):  
Chien-Yi Huang ◽  
Chen-Liang Ku ◽  
Hao-Chun Hsieh ◽  
Tzu-Min Chien ◽  
Hui-Hua Huang
Keyword(s):  
Thermal Shock ◽  
Cross Section ◽  
Printed Circuit Board ◽  
Circuit Board ◽  
Lead Free ◽  
Thermal Shock Test ◽  
Curing Agent ◽  
Production Environment ◽  
Printed Circuit ◽  
Section Analysis

This study aimed to explore Printed Circuit Board (PCB) failure mechanism and recommend appropriate material and handling process for the boards used in lead-free assembly process. In this study, the most stringent conditions in Printed Circuit Board Assembly (PCBA) process was used for various base-materials of PCB, such as Tg, and curing agent. In addition, thermal shock testing at 0∼100°C for 900 cycles was employed to simulate PCB performance during field service. Cross-section analysis was implemented to identify failure modes. Finally, the PCB moisture absorption property was evaluated by exposing the boards in a temperature/humidity chamber at 28°C and 60% RH, that was the worst condition in PCBA production environment. Results indicated that Tg had significant influence to the PCB quality, high Tg materials performs better. During multiple reflow process verification, cross section analysis of high Tg material indicated that Dicy material appear delamination even no electrical failure occurred. As for thermal shock test, high Tg material (either with Dicy or Phenolic curing agent) survived after 900 shock cycles. Also, moisture uptake in assembly environment, even at the worst scenario of 28°C and 60% RH for 120 hours, had not caused any PCB delamination.

Characteristics of Radiated Emission from a Printed Circuit Board with a Slit

2012 ◽  
Vol 132 (6) ◽  
pp. 404-410 ◽  
Author(s):  
Kenichi Nakayama ◽  
Kenichi Kagoshima ◽  
Shigeki Takeda
Keyword(s):  
Printed Circuit Board ◽  
Circuit Board ◽  
Printed Circuit ◽  
Radiated Emission

Confirming the Signal Integrity in Transmission of Digital Signals on Microstrip Straight Circuits via the Eye Diagrams

2014 ◽  
Vol 5 (1) ◽  
pp. 737-741
Author(s):  
Alejandro Dueñas Jiménez ◽  
Francisco Jiménez Hernández
Keyword(s):  
Integrated Circuits ◽  
Printed Circuit Board ◽  
Signal Integrity ◽  
High Volume ◽  
Information Storage ◽  
Circuit Board ◽  
Electromagnetic Simulation ◽  
Electronic Systems ◽  
Digital Signals ◽  
Printed Circuit

Because of the high volume of processing, transmission, and information storage, electronic systems presently requires faster clock speeds tosynchronizethe integrated circuits. Presently the “speeds” on the connections of a printed circuit board (PCB) are in the order of the GHz. At these frequencies the behavior of the interconnects are more like that of a transmission line, and hence distortion, delay, and phase shift- effects caused by phenomena like cross talk, ringing and over shot are present and may be undesirable for the performance of a circuit or system.Some of these phrases were extracted from the chapter eight of book “2-D Electromagnetic Simulation of Passive Microstrip Circuits” from the corresponding author of this paper.

Root Cause Analysis of a Connector Time-Delayed Fracture

2015 ◽  
Author(s):  
Prabjit Singh ◽  
Ying Yu ◽  
Robert E. Davis
Keyword(s):  
Printed Circuit Board ◽  
Ceramic Substrate ◽  
Circuit Board ◽  
Delayed Fracture ◽  
Ceramic Substrates ◽  
Printed Circuit ◽  
Root Cause ◽  
Chip Carrier ◽  
Electrical Connections ◽  
Grain Boundary Grooves

Abstract A land-grid array connector, electrically connecting an array of plated contact pads on a ceramic substrate chip carrier to plated contact pads on a printed circuit board (PCB), failed in a year after assembly due to time-delayed fracture of multiple C-shaped spring connectors. The land-grid-array connectors analyzed had arrays of connectors consisting of gold on nickel plated Be-Cu C-shaped springs in compression that made electrical connections between the pads on the ceramic substrates and the PCBs. Metallography, fractography and surface analyses revealed the root cause of the C-spring connector fracture to be plating solutions trapped in deep grain boundary grooves etched into the C-spring connectors during the pre-plating cleaning operation. The stress necessary for the stress corrosion cracking mechanism was provided by the C-spring connectors, in the land-grid array, being compressed between the ceramic substrate and the printed circuit board.

Application of Lock-in Thermography on PCB for Fault Localization and Validation of Failure Mechanism Due to External Discrete Component Variation

2010 ◽  
Author(s):  
William Ng ◽  
Kevin Weaver ◽  
Zachary Gemmill ◽  
Herve Deslandes ◽  
Rudolf Schlangen
Keyword(s):  
Failure Mechanism ◽  
Integrated Circuit ◽  
Printed Circuit Board ◽  
Hot Spot ◽  
Circuit Board ◽  
Discrete Component ◽  
Printed Circuit ◽  
Thermal Signature ◽  
Lock In

Abstract This paper demonstrates the use of a real time lock-in thermography (LIT) system to non-destructively characterize thermal events prior to the failing of an integrated circuit (IC) device. A case study using a packaged IC mounted on printed circuit board (PCB) is presented. The result validated the failing model by observing the thermal signature on the package. Subsequent analysis from the backside of the IC identified a hot spot in internal circuitry sensitive to varying value of external discrete component (inductor) on PCB.

Temperature and Humidity Dependent Reliability Analysis of RGB LED Chips

2006 ◽  
Author(s):  
Jun-Xian Fu ◽  
Shukri Souri ◽  
James S. Harris
Keyword(s):  
Reliability Analysis ◽  
Printed Circuit Board ◽  
Light Emitting Diode ◽  
Circuit Board ◽  
Light Emitting ◽  
Printed Circuit ◽  
Root Cause ◽  
Micro Cracks ◽  
Temperature And Humidity

Abstract Temperature and humidity dependent reliability analysis was performed based on a case study involving an indicator printed-circuit board with surface-mounted multiple-die red, green and blue light-emitting diode chips. Reported intermittent failures were investigated and the root cause was attributed to a non-optimized reflow process that resulted in micro-cracks and delaminations within the molding resin of the chips.

Materials Characterization of Lead Free Compositions for Minimum Temperature SMT Processes at the SLI-Second Level Interconnect Solder Joint

2004 ◽  
Author(s):  
Norman J. Armendariz ◽  
Prawin Paulraj
Keyword(s):  
Solder Joint ◽  
Printed Circuit Board ◽  
Gold Surface ◽  
Circuit Board ◽  
Lead Free ◽  
Processing Temperature ◽  
The European Union ◽  
Printed Circuit ◽  
Higher Temperature ◽  
Tin Silver Copper

Abstract The European Union is banning the use of Pb in electronic products starting July 1st, 2006. Printed circuit board assemblies or “motherboards” require that planned CPU sockets and BGA chipsets use lead-free solder ball compositions at the second level interconnections (SLI) to attach to a printed circuit board (PCB) and survive various assembly and reliability test conditions for end-use deployment. Intel is pro-actively preparing for this anticipated Pb ban, by evaluating a new lead free (LF) solder alloy in the ternary Tin- Silver-Copper (Sn4.0Ag0.5Cu) system and developing higher temperature board assembly processes. This will be pursued with a focus on achieving the lowest process temperature required to avoid deleterious higher temperature effects and still achieve a metallurgically compatible solder joint. One primary factor is the elevated peak reflow temperature required for surface mount technology (SMT) LF assembly, which is approximately 250 °C compared to present eutectic tin/lead (Sn37Pb) reflow temperatures of around 220 °C. In addition, extended SMT time-above-liquidus (TAL) and subsequent cooling rates are also a concern not only for the critical BGA chipsets and CPU BGA sockets but to other components similarly attached to the same PCB substrate. PCBs used were conventional FR-4 substrates with organic solder preservative on the copper pads and mechanical daisychanged FCBGA components with direct immersion gold surface finish on their copper pads. However, a materials analysis method and approach is also required to characterize and evaluate the effect of low peak temperature LF SMT processing on the PBA SLI to identify the absolute limits or “cliffs” and determine if the minimum processing temperature and TAL could be further lowered. The SLI system is characterized using various microanalytical techniques, such as, conventional optical microscopy, scanning electron microscopy, energy dispersive spectroscopy and microhardness testing. In addition, the SLI is further characterized using macroanalytical techniques such as dye penetrant testing (DPT) with controlled tensile testing for mechanical strength in addition to disbond and crack area mapping to complete the analysis.

Magnetic Emission Mapping for Passive Integrated Components Characterisation

2003 ◽  
Author(s):  
O. Crépel ◽  
Y. Bouttement ◽  
P. Descamps ◽  
C. Goupil ◽  
P. Perdu ◽  
...  
Keyword(s):  
Magnetic Field ◽  
Mobile Phone ◽  
Printed Circuit Board ◽  
Magnetic Sensors ◽  
Circuit Board ◽  
Magnetic Disturbance ◽  
Passive Components ◽  
Printed Circuit ◽  
Integrated Inductor ◽  
The Magnetic Field

Abstract We developed a system and a method to characterize the magnetic field induced by circuit board and electronic component, especially integrated inductor, with magnetic sensors. The different magnetic sensors are presented and several applications using this method are discussed. Particularly, in several semiconductor applications (e.g. Mobile phone), active dies are integrated with passive components. To minimize magnetic disturbance, arbitrary margin distances are used. We present a system to characterize precisely the magnetic emission to insure that the margin is sufficient and to reduce the size of the printed circuit board.

Sign in / Sign up

Export Citation Format

Share Document