Thick Film Resistor Failures

Author(s):  
Anshul Shrivastava ◽  
Ahmed Amin ◽  
Bhanu Sood ◽  
Michael Azarian ◽  
Michael Pecht ◽  
...  

Abstract Thick film resistors are widely used in consumer and industrial products such as timers, motor controls and a broad range of high performance electronic equipment. This article provides information on failures due to copper dendrite growth, silver migration, sulfur atmosphere corrosion, variation of temperature, and crack due to molding compound mechanisms. It presents case studies in which a physical analysis plan was developed and executed to investigate these sites of interest on as-manufactured and failed thick film power resistors. The analysis techniques included X-ray inspection, cross-sectioning, decapsulation, and optical and environmental scanning electron microscopy analysis. A table illustrates different failure modes and mechanisms for thick film resistors, and also potential application and manufacturing factors that cause failure mechanisms, which then describe the failure modes. The article is concluded that by preventing the failure of thick film resistors, printed circuit boards can be kept in service for their full lifetime.

2019 ◽  
Vol 2019 (1) ◽  
pp. 000409-000414
Author(s):  
Masaya Toba ◽  
Shuji Nomoto ◽  
Nobuhito Komuro ◽  
Kazuyuki Mitsukura ◽  
Shinichiro Abe ◽  
...  

Abstract Semiconductor packages for high performance devices with printed circuit boards having multi wiring layers such as FC-BGA have been attracting the attention in order to realize ultra-reliable and low latency communications in 5G networking. Cu wirings for the package are usually fabricated by via formation by laser for dielectric, desmear, electroless Cu seed formation, photoresist patterning, electrolytic Cu plating, resist stripping and seed layer etching. Though a desmear process can obtain enough adhesion between dielectric and Cu seed layer by anchoring effect to secure reliabilities, the interface between dielectric and Cu seed layer should be smooth to achieve low attenuation of electric signals at high frequencies. Here, instead of a desmear process, we applied an UV modification for the surface of dielectric in order to realize a smooth and high adhesive seed layer against dielectric. We obtained 0.8 kN/m of peel strength between dielectric and Cu seed layer in spite of surface roughness (Ra) of dielectric was 45 nm by nano-level anchoring effect at UV modified layer. Due to the smooth interface by UV modification, S21 value of microstrip line was 26 % improved compared to that assembled through desmear process at 60 GHz.


2018 ◽  
Vol 42 (3) ◽  
pp. 268-279
Author(s):  
Chin-Li Kao ◽  
Tei-Chen Chen

The thermal performance of a powered wirebond device with package level and board level test specimens was investigated by both analytical and experiment methods. The effects of thickness and thermal conductivity of the molding compound and heat spreader attached to the top surface of the molding compound on the performance of the Au wire and silicon die were modeled and evaluated by three-dimensional electrothermal coupling analysis. An advanced quad flat no-lead (QFN) sample was selected to experimentally measure the maximum allowable current in Au wire for packages either with or without molding compound. Two failure modes, namely the fusing of the wire and the decomposition temperature of the molding compound, were established in analysis. A board level test specimen with a thermal test die was also employed to measure the real time package thermal performance. The major achievement of this work is in the complete combination of modeling, experiment, and optimization for thermal performance evaluation purpose of a powered wirebond device. Results of this physical analysis can provide a reliable and useful guide to estimate the maximum allowable currents in Au wires for a wirebond device under practical application conditions.


2012 ◽  
Vol 565 ◽  
pp. 442-447 ◽  
Author(s):  
Taiji Funabiki ◽  
Toshiki Hirogaki ◽  
Eiichi Aoyama ◽  
Keiji Ogawa ◽  
Hiroyuki Kodama

This paper describes micro-drilling processes for printed circuit boards (PCBs) containing fillers with high hardness and high thermal conductivity. Inspired primarily by devices such as digital cameras, laptop computers, and wireless communications devices, the electronics field today is continuously demanding smaller, lighter, and more technologically advanced high performance devices. However, that the increase in semiconductor-generated heat tends to affect such devices negatively. Additionally, from the viewpoint of environmental problems, electric vehicles and LEDs are being developed actively. PCBs are one of the principal components for building such devices. In recent years, PCBs containing alumina fillers with high thermal conductivity have been developed and begun to be widely used. However, when processing these PCBs, the drill tools become severely worn because of the filler’s high hardness. We therefore examined the drill wear characteristics. The results show the filler is the main factor that causes drill wear, while the increase in cutting force does not affect it. The cutting force increases with the drill wear linearly. Moreover, the characteristic of PCBs with higher filler content rates is close to that of inorganic material like ceramics.


2020 ◽  
Vol 17 (2) ◽  
pp. 45-51
Author(s):  
Masaya Toba ◽  
Shuji Nomoto ◽  
Nobuhito Komuro ◽  
Kazuyuki Mitsukura ◽  
Shinichiro Abe ◽  
...  

Abstract Semiconductor packages for high-performance devices with printed circuit boards having multiwiring layers such as flip-chip ball grid array have been attracting the attention to realize ultrare-liable and low-latency communications in 5G networking. Cu wirings for the package are usually fabricated by via formation by laser for dielectric, desmear, electroless Cu seed formation, photoresist patterning, electrolytic Cu plating, resist stripping, and seed layer etching. Although a desmear process can obtain enough adhesion between dielectric and Cu seed layer by anchoring effect to secure reliabilities, the interface between dielectric and Cu seed layer should be smooth to achieve low attenuation of electric signals at high frequencies. Here, instead of a desmear process, we applied a UV modification for the surface of dielectric to realize a smooth and high-adhesive seed layer against dielectric. We obtained .8 kN/m of peel strength between dielectric and Cu seed layer in spite of surface roughness of the dielectric being 45 nm by a nanolevel anchoring effect at the UV-modified layer. Because of the smooth interface by UV modification, the S21 value of microstrip line was 26% improved compared with that assembled through the desmear process at 60 GHz.


2018 ◽  
Vol 2018 (1) ◽  
pp. 000620-000627 ◽  
Author(s):  
Samson Shahbazi ◽  
Gregg Berube ◽  
Stephanie Edwards ◽  
Ryan Persons ◽  
Caitlin Shahbazi

Abstract The thick film paste manufacturers are expected to produce conductors which are lead and cadmium free, yet have excellent fired film properties and the same performance and properties as the cadmium and lead containing formulations. The fired film surface of these conductors must be defect free (i.e. imperfections, pills, agglomerates) after multiple firing steps and must perform on dielectric as well as substrates from different suppliers. Typically, the thick film gold conductors are used in high reliability applications such as medical devices, military applications, and high frequency circuits, which require robust performance at high and low temperatures, in chemically aggressive environments, or extremely humid conditions. As circuits decrease in size and become more complex, the thick film gold properties become increasingly critical. The challenge is to develop an alternative gold conductor formulation, which can print and resolve fine features (down to 4 mil lines and spaces) as well as have the ability to be etched for higher density circuit designs (down to 1–2 mil lines and spaces). Gold conductors are typically used in conjunction with other high temperature thick films so good performance after multiple firings was also a targeted requirement. Heraeus has been proactive for the past decade in the development of thick film products that are both RoHS (lead and cadmium free) as well as REACH compliant. This paper discusses the experiments that were performed in order to understand the contribution of gold powder, organic and inorganic system to improve the fired film performance. These formulations were compared against existing gold conductors including the high performance gold conductor options as well as other available standard gold conductor options. Thin wire bonding trials including both gold and aluminum wire are used to compare influences of raw materials which includes high volume wire bonding reliability including failure modes and aged wire bond adhesion at elevated temperature exposures (300°C) for extended periods of time. In order to analyze fired film morphology and link this up to wire bond performance, SEM images of the conductor surface and cross sections were conducted. These studies resulted in a newly developed thick film gold conductor paste for use in a wide variety of applications. We present wire-bonding data with gold and aluminum wire and reliability results on both 96% Al2O3 ceramic substrates as well as on top of standard dielectrics.


1982 ◽  
Vol 1 (1) ◽  
pp. 22-23 ◽  
Author(s):  
F.W. Martin

The electronics industry is facing a situation in which the cost of electronic functions is dropping continuously while the cost of interconnecting the functions by traditional means, especially through the use of printed circuit boards, continues to rise. Polymer thick film is one proven approach to reversing the trend of rising interconnection costs. It is relatively easy for the typical printed circuit board manufacturer to convert to or adapt polymer thick film because he has most of the necessary equipment, technical knowledge and personnel.


2014 ◽  
Vol 77 (10) ◽  
pp. 1760-1767 ◽  
Author(s):  
FATEN KACHOURI ◽  
HAMIDA KSONTINI ◽  
MOKTAR HAMDI

Olives can be contaminated with a wide variety of molds (Aspergillus and/or Penicillium) that can be occurring naturally on fresh and processed olives and could support mycotoxin production. The aim of this work was to investigate aflatoxin B1 (AFB1) production by fungi and its bioaccumulation in olives during storage and to study the impact of the application of Lactobacillus plantarum on the inhibition of mold development and production of AFB1. Two different treatments were applied: (i) olives with natural microflora and (ii) olives inoculated with Aspergillus flavus after elimination of natural microflora. AFB1 has been extracted from olives and quantitated by high-performance liquid chromatography using a fluorescence detector. Results showed the absence of this metabolite in the olives for the season 2008 to 2009. In 2009 to 2010, AFB1 was detected at the level of 11 μg/kg. The application of L. plantarum during the storage of olives favors the reduction of the level of AFB1 to 5.9 μg/kg correlated with a decrease in the amount of molds (86.3%). The images obtained by environmental scanning electron microscopy showed that L. plantarum was able to adhere to the olive surface and probably produce a biofilm that inhibits the multiplication of yeast and fungi by oxygen competition. Results showed an increase of antioxidant activity and amount of total phenolic compounds of olives, respectively, by 24 and 8.6%. In many olives contaminated with A. flavus, AFB1 was present at an initial level of 5.15 μg/kg and increased to 6.55 μg/kg after 8 days of storage. The biological detoxification of AFB1 in olives by L. plantarum is confirmed by the reduction of the level of AFB1 to 2.12 μg/kg on day 0 and its absence after 4 days of storage.


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