Study of Retention Time Variation due to the Change in Adjacent Wordline Voltage of BCAT DRAM Structure

Author(s):  
Dongsuck Kang ◽  
Ilwoo Jung ◽  
Jinsuob Yoon ◽  
Dongin Lee ◽  
Hyeongsun Hong ◽  
...  

Abstract As DRAM design rule (D/R) shrinks, the retention time due to leakage current becomes more important. Retention time failures that arise from gate induced drain leakage (GIDL) or junction leakage are exacerbated by changes in the electrostatic potential between adjacent lines or nodes. This study analyzes the effects of wordline (adjacent line) potential on retention time based on in sub-20nm DRAM technology. Electrical tests have confirmed that cells that fail from GIDL and junction leakage exhibit different behaviors according to the leakage characteristic and changes in adjacent wordline (especially in word-line across STI) potential. Simulations also confirm that these observations are due to the change in electric field. Based on these findings, a new perspective on the mechanism of retention failures is proposed.

2003 ◽  
Vol 784 ◽  
Author(s):  
T. Yoshimura ◽  
D. Ito ◽  
H. Sakata ◽  
N. Shigemitsu ◽  
K. Haratake ◽  
...  

ABSTRACTThe memory retention properties of Pt/YMnO3/Y2O3/Si capacitors were investigated for the application of ferroelectric gate transistors. The epitaxially grown Pt/YMnO3/Y2O3/Si capacitors showed ferroelectric type hysteresis loop on the capacitance-voltage properties. Although the retention time of the as-deposited capacitors was ∼103 s, it was prolonged up to 104 s when the leakage current density was reduced from 4×10-8 A/cm2 to 2×10-9 A/cm2 by the annealing under N2 ambience. To reveal the relationship between the retention time and leakage current, the leakage current mechanism was investigated comparing several conduction mechanisms. It was found that the dominant leakage mechanisms at high and low electric fields were Poole-Frenkel emission from the Y2O3 layer and ohmic conduction, respectively. This result indicates that the leakage current was limited by the Y2O3 layer at high electric field and was mainly dominated by the amount of defects in the YMnO3 layer at low electric field. From the pseudo isothermal capacitance transient spectroscopy (ICTS), it was determined that the trap density was in an order of 1015 cm-3. Since the variation of the leakage current by annealing was observed only in the low electric field region, it is suggested that the retention properties of the Pt/YMnO3/Y2O3/Si capacitors was influenced by the amount of defects in the YMnO3 layer.


2003 ◽  
Vol 786 ◽  
Author(s):  
T. Yoshimura ◽  
D. Ito ◽  
H. Sakata ◽  
N. Shigemitsu ◽  
K. Haratake ◽  
...  

ABSTRACTThe memory retention properties of Pt/YMnO3/Y2O3/Si capacitors were investigated for the application of ferroelectric gate transistors. The epitaxially grown Pt/YMnO3/Y2O3/Si capacitors showed ferroelectric type hysteresis loop on the capacitance-voltage properties. Although the retention time of the as-deposited capacitors was ∼103 s, it was prolonged up to 104 s when the leakage current density was reduced from 4×10−8 A/cm2 to 2×10−9 A/cm2 by the annealing under N2 ambience. To reveal the relationship between the retention time and leakage current, the leakage current mechanism was investigated comparing several conduction mechanisms. It was found that the dominant leakage mechanisms at high and low electric fields were Poole-Frenkel emission from the Y2O3 layer and ohmic conduction, respectively. This result indicates that the leakage current was limited by the Y2O3 layer at high electric field and was mainly dominated by the amount of defects in the YMnO3 layer at low electric field. From the pseudo isothermal capacitance transient spectroscopy (ICTS), it was determined that the trap density was in an order of 1015 cm−3. Since the variation of the leakage current by annealing was observed only in the low electric field region, it is suggested that the retention properties of the Pt/YMnO3/Y2O3/Si capacitors was influenced by the amount of defects in the YMnO3 layer.


2007 ◽  
Vol 997 ◽  
Author(s):  
Hiroshi Ishiwara ◽  
Hiroshi Ishiwara

AbstractIn this paper, ferroelectric materials suitable for realizing high-density 1T1C-type (capacitor-type) FeRAM are first reviewed. It is found in BiFeO3(BFO) films formed by chemical solution deposition that leakage current density at a low electric field increases by substitution of Mn and Cr atoms for Fe atoms. But, it is also found that the breakdown characteristic is much improved by substitution of these atoms. Because of the better breakdown characteristic, the leakage current densities in the 3 and 5% Mn-substituted films are lower than that in an undoped BFO film at an applied electric field of 1MV/cm at room temperature, and thus well saturated hysteresis loops in P-E (polarization vs. electric field) characteristics are observed in these films.Next, recent technological progress in transistor-type FeRAM, in which data are stored in a single ferroelectric-gate FET(field effect transistor), is discussed. It is demonstrated that the data retention time of ferroelectric-gate FETs is much improved by use of HfO2-based buffer layers which are inserted between the ferroelectric film and Si substrate for preventing interdiffusion of constituent elements. Particular attention is paid to FETs with a Pt/SrBi2Ta2O9/HfO2/Si gate structure, in which the data retention time longer than 30 days has been attained. Finally, the cell structure and operation principle of 1T (one transistor)-type FeRAM are discussed.


Author(s):  
Jungil Mok ◽  
Byungki Kang ◽  
Daesun Kim ◽  
Hongsun Hwang ◽  
Sangjae Rhee ◽  
...  

Abstract Systematic retention failure related on the adjacent electrostatic potential is studied with sub 20nm DRAM. Unlike traditional retention failures which are caused by gate induced drain leakage or junction leakage, this failure is influenced by the combination of adjacent signal line and adjacent contact node voltage. As the critical dimension between adjacent active and the adjacent signal line and contact node is scaled down, the effect of electric field caused by adjacent node on storage node is increased gradually. In this paper, we will show that the relationship between the combination electric field of adjacent nodes and the data retention characteristics and we will demonstrate the mechanism based on the electrical analysis and 3D TCAD simulation simultaneously.


2019 ◽  
Vol 8 (4) ◽  
pp. 9487-9492

The outdoor insulator is commonly exposed to environmental pollution. The presence of water like raindrops and dew on the contaminant surface can lead to surface degradation due to leakage current. However, the physical process of this phenomenon is not well understood. Hence, in this study we develop a mathematical model of leakage current on the outdoor insulator surface using the Nernst Planck theory which accounts for the charge transport between the electrodes (negative and positive electrode) and charge generation mechanism. Meanwhile the electric field obeys Poisson’s equation. Method of Lines technique is used to solve the model numerically in which it converts the PDE into a system of ODEs by Finite Difference Approximations. The numerical simulation compares reasonably well with the experimental conduction current. The findings from the simulation shows that the conduction current is affected by the electric field distribution and charge concentration. The rise of the conduction current is due to the distribution of positive ion while the dominancy of electron attachment with neutral molecule and recombination with positive ions has caused a significant reduction of electron and increment of negative ions.


2019 ◽  
Vol 126 (4) ◽  
pp. 045703 ◽  
Author(s):  
Byung-Guon Park ◽  
Reddeppa Maddaka ◽  
Thi Kim Phung Nguyen ◽  
Koteswara Rao Peta ◽  
Young-Kyun Noh ◽  
...  

2013 ◽  
Vol 740-742 ◽  
pp. 881-886 ◽  
Author(s):  
Hiroyuki Okino ◽  
Norifumi Kameshiro ◽  
Kumiko Konishi ◽  
Naomi Inada ◽  
Kazuhiro Mochizuki ◽  
...  

The reduction of reverse leakage currents was attempted to fabricate 4H-SiC diodes with large current capacity for high voltage applications. Firstly diodes with Schottky metal of titanium (Ti) with active areas of 2.6 mm2 were fabricated to investigate the mechanisms of reverse leakage currents. The reverse current of a Ti Schottky barrier diode (SBD) is well explained by the tunneling current through the Schottky barrier. Then, the effects of Schottky barrier height and electric field on the reverse currents were investigated. The high Schottky barrier metal of nickel (Ni) effectively reduced the reverse leakage current to 2 x 10-3 times that of the Ti SBD. The suppression of the electric field at the Schottky junction by applying a junction barrier Schottky (JBS) structure reduced the reverse leakage current to 10-2 times that of the Ni SBD. JBS structure with high Schottky barrier metal of Ni was applied to fabricate large chip-size SiC diodes and we achieved 30 A- and 75 A-diodes with low leakage current and high breakdown voltage of 4 kV.


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