scholarly journals Compact Implementation of ARIA on 16-Bit MSP430 and 32-Bit ARM Cortex-M3 Microcontrollers

Electronics ◽  
2021 ◽  
Vol 10 (8) ◽  
pp. 908
Author(s):  
Hwajeong Seo ◽  
Hyunjun Kim ◽  
Kyoungbae Jang ◽  
Hyeokdong Kwon ◽  
Minjoo Sim ◽  
...  
Keyword(s):  
Block Cipher ◽  
Memory Access ◽  
Security Level ◽  
The Novel ◽  
Pipeline Architecture ◽  
Diffusion Layers ◽  
Mode Of Operation ◽  
Memory Accesses ◽  
And Diffusion ◽  
Code Book

In this paper, we propose the first ARIA block cipher on both MSP430 and Advanced RISC Machines (ARM) microcontrollers. To achieve the optimized ARIA implementation on target embedded processors, core operations of ARIA, such as substitute and diffusion layers, are carefully re-designed for both MSP430 (Texas Instruments, Dallas, TX, USA) and ARM Cortex-M3 microcontrollers (STMicroelectronics, Geneva, Switzerland). In particular, two bytes of input data in ARIA block cipher are concatenated to re-construct the 16-bit wise word. The 16-bit word-wise operation is executed at once with the 16-bit instruction to improve the performance for the 16-bit MSP430 microcontroller. This approach also optimizes the number of required registers, memory accesses, and operations to half numbers rather than 8-bit word wise implementations. For the ARM Cortex-M3 microcontroller, the 8×32 look-up table based ARIA block cipher implementation is further optimized with the novel memory access. The memory access is finely scheduled to fully utilize the 3-stage pipeline architecture of ARM Cortex-M3 microcontrollers. Furthermore, the counter (CTR) mode of operation is more optimized through pre-computation techniques than the electronic code book (ECB) mode of operation. Finally, proposed ARIA implementations on both low-end target microcontrollers (MSP430 and ARM Cortex-M3) achieved (209 and 96 for 128-bit security level, respectively), (241 and 111 for 192-bit security level, respectively), and (274 and 126 for 256-bit security level, respectively). Compared with previous works, the running timing on low-end target microcontrollers (MSP430 and ARM Cortex-M3) is improved by (92.20% and 10.09% for 128-bit security level, respectively), (92.26% and 10.87% for 192-bit security level, respectively), and (92.28% and 10.62% for 256-bit security level, respectively). The proposed ARIA–CTR implementation improved the performance by 6.6% and 4.0% compared to the proposed ARIA–ECB implementations for MSP430 and ARM Cortex-M3 microcontrollers, respectively.

scholarly journals A New Design of Cryptographic Hash Function: Gear

2016 ◽  
Vol 1 (1) ◽  
Author(s):  
Abdulaziz M Alkandari ◽  
Khalil Ibrahim Alkandari ◽  
Imad Fakhri Alshaikhli ◽  
Mohammad A. AlAhmad
Keyword(s):  
Hash Function ◽  
Block Cipher ◽  
Hash Functions ◽  
Fixed Size ◽  
Compression Function ◽  
Cryptographic Hash Function ◽  
Mode Of Operation ◽  
Main Components ◽  
Map Data ◽  
And Diffusion

A hash function is any function that can be used to map data of arbitrary sizeto data of fixed size. A hash function usually has two main components: a permutationfunction or compression function and mode of operation. We will propose a new concretenovel design of a permutation based hash functions called Gear in this paper. It is a hashfunction based on block cipher in Davies-Meyer mode. It uses the patched version ofMerkle-Damgård, i.e. the wide pipe construction as its mode of operation. Thus, theintermediate chaining value has at least twice larger length than the output hash. Andthe permutations functions used in Gear are inspired from the SHA-3 finalist Grøestl hashfunction which is originally inspired from Rijndael design (AES). There is a very strongconfusion and diffusion in Gear as a result.

A Chaos-Based Approach for Correcting the Security Level of a Block Cipher Algorithm

2016 ◽  
Vol 11 (2) ◽  
pp. 92
Author(s):  
Fatma Zayen Sbiaa ◽  
Medien Zeghid ◽  
Sonia Kotel ◽  
Rached Tourki ◽  
Mohsen Machhout ◽  
...  
Keyword(s):  
Block Cipher ◽  
Security Level

scholarly journals Efficient Implementation of PRESENT and GIFT on Quantum Computers

2021 ◽  
Vol 11 (11) ◽  
pp. 4776
Author(s):  
Kyungbae Jang ◽  
Gyeongju Song ◽  
Hyunjun Kim ◽  
Hyeokdong Kwon ◽  
Hyunji Kim ◽  
...  
Keyword(s):  
Block Cipher ◽  
Search Algorithm ◽  
Block Ciphers ◽  
Quantum Circuits ◽  
Security Level ◽  
Symmetric Key ◽  
Grover Search ◽  
Target Block ◽  
Symmetric Key Cryptography ◽  
Grover Search Algorithm

Grover search algorithm is the most representative quantum attack method that threatens the security of symmetric key cryptography. If the Grover search algorithm is applied to symmetric key cryptography, the security level of target symmetric key cryptography can be lowered from n-bit to n2-bit. When applying Grover’s search algorithm to the block cipher that is the target of potential quantum attacks, the target block cipher must be implemented as quantum circuits. Starting with the AES block cipher, a number of works have been conducted to optimize and implement target block ciphers into quantum circuits. Recently, many studies have been published to implement lightweight block ciphers as quantum circuits. In this paper, we present optimal quantum circuit designs of symmetric key cryptography, including PRESENT and GIFT block ciphers. The proposed method optimized PRESENT and GIFT block ciphers by minimizing qubits, quantum gates, and circuit depth. We compare proposed PRESENT and GIFT quantum circuits with other results of lightweight block cipher implementations in quantum circuits. Finally, quantum resources of PRESENT and GIFT block ciphers required for the oracle of the Grover search algorithm were estimated.

Corrosion Behaviours of Mo Modified Ti6Al4V Alloy in Hank’s Solution

2009 ◽  
Vol 610-613 ◽  
pp. 1150-1154
Author(s):  
Ai Lan Fan ◽  
Cheng Gang Zhi ◽  
Lin Hai Tian ◽  
Lin Qin ◽  
Bin Tang
Keyword(s):  
Electrochemical Corrosion ◽  
Optical Emission ◽  
Ti6al4v Alloy ◽  
X Ray Diffraction ◽  
X Ray ◽  
Diffusion Layers ◽  
Modified Layer ◽  
Surface Modified ◽  
Hank’S Solution ◽  
And Diffusion

The Mo surface modified layer on Ti6Al4V alloy was obtained by the plasma surface alloying technique. The structure and composition of the Mo modified Ti6Al4V alloy was investigated by X-ray diffraction (XRD) and glow discharge optical emission spectroscopy (GDOES). The Mo modified layer contains Mo coating on subsurface and diffusion layers between the subsurface and substrate. The X- ray diffraction analysis of the Mo modified Ti6Al4V alloy reveals that the outmost surface of the Mo modified Ti6Al4V alloy is composed of pure Mo. The electrochemical corrosion performance of the Mo modified Ti6Al4V alloy in 25°C Hank’s solution was investigated and compared with that of Ti6Al4V alloy. Results indicate that the self-corroding electric potential and the corrosion-rate of the Mo modified Ti6Al4V alloy are higher than that of Ti6Al4V alloy in 25°C Hank’s solution.

scholarly journals Online Thread and Data Mapping Using a Sharing-Aware Memory Management Unit

2021 ◽  
Vol 5 (4) ◽  
pp. 1-28
Author(s):  
Eduardo H. M. Cruz ◽  
Matthias Diener ◽  
Laércio L. Pilla ◽  
Philippe O. A. Navaux
Keyword(s):  
Energy Efficiency ◽  
Memory Management ◽  
Substantial Reduction ◽  
Management Unit ◽  
Memory Access ◽  
Parallel Applications ◽  
Data Mapping ◽  
Wide Range ◽  
Memory Accesses ◽  
Level Parallelism

Current and future architectures rely on thread-level parallelism to sustain performance growth. These architectures have introduced a complex memory hierarchy, consisting of several cores organized hierarchically with multiple cache levels and NUMA nodes. These memory hierarchies can have an impact on the performance and energy efficiency of parallel applications as the importance of memory access locality is increased. In order to improve locality, the analysis of the memory access behavior of parallel applications is critical for mapping threads and data. Nevertheless, most previous work relies on indirect information about the memory accesses, or does not combine thread and data mapping, resulting in less accurate mappings. In this paper, we propose the Sharing-Aware Memory Management Unit (SAMMU), an extension to the memory management unit that allows it to detect the memory access behavior in hardware. With this information, the operating system can perform online mapping without any previous knowledge about the behavior of the application. In the evaluation with a wide range of parallel applications (NAS Parallel Benchmarks and PARSEC Benchmark Suite), performance was improved by up to 35.7% (10.0% on average) and energy efficiency was improved by up to 11.9% (4.1% on average). These improvements happened due to a substantial reduction of cache misses and interconnection traffic.

scholarly journals Analysis of Neural Network Based Ciphers

2021 ◽  
Author(s):  
Maryam Arvandi
Keyword(s):  
Neural Networks ◽  
Block Cipher ◽  
Statistical Tests ◽  
Back Propagation ◽  
Variable Step Size ◽  
Step Size ◽  
Variable Step ◽  
And Diffusion ◽  
Confusion And Diffusion ◽  
Diffusion Properties

Cryptography can be considered one of the most important aspects of communication security with existence of many threats and attacks to the systems. Unbreakableness is the main feature of a cryptographic cipher. In this thesis, feasibility of using neural networks, due to their computational capabilities is investigated for designing new cryptography methods. A newly proposed block cipher based on recurrent neural networks has also been analysed It is shown that: the new scheme is not a block cipher, and it should be referred to as a symmetric cipher; the simple architecture of the network is compatible with the requirement for confusion, and diffusion properties of a cryptosystem; the back propagation with variable step size without momentum, has the best result among other back propagation algorithms; the output of the network, the ciphertext, is not random, proved by using three statistical tests; the cipher is resistant to some fundamental cryptanalysis attacks, and finally a possible chosen-plaintext attack is presented.

scholarly journals Color Image Encryption using AES and RSA

2020 ◽  
Vol 9 (5) ◽  
pp. 547-550
Keyword(s):  
Data Security ◽  
Block Cipher ◽  
Color Image ◽  
Signal To Noise Ratio ◽  
Security Level ◽  
Change Rate ◽  
The Public ◽  
Key Block ◽  
Symmetric Key ◽  
Encryption Algorithms

Information security is an important task on multimedia and communication world. During storing and sharing maintaining a strategic distance from the outsider access of information is the difficult one. There are many encryption algorithms that can provide data security. In this paper two of the encryption algorithms namely AES and RSA are implemented for color images. AES (Advanced Encryption Standard) is a symmetric key block cipher published in December 2001 by NSIT (National Institute of Standards and Technology). RSA (Rivest-Shamir-Adleman) is an asymmetric key block cipher. It uses two separate keys, one for encryption called the public key and other for decryption called the private key. Both the implementation and analysis are done in Matlab. The quality and security level of both the algorithms is analysed based on various criteria such as Histogram analysis, Correlation analysis, Entropy analysis, NPCR (Number of Pixel Change Rate), UACI (Unified Average Changing Intensity), PSNR (Peak Signal-to-Noise Ratio).

Lightweight Image Encryption: A Chaotic ARX Block Cipher

2020 ◽  
pp. 2150026
Author(s):  
N. Mohananthini ◽  
M. Y. Mohamed Parvees ◽  
J. Abdul Samath
Keyword(s):  
Image Encryption ◽  
Block Cipher ◽  
Chaotic Map ◽  
Encryption Scheme ◽  
Lightweight Cryptography ◽  
Low Resource ◽  
Image Cipher ◽  
Euler Methods ◽  
And Diffusion ◽  
Randomness Tests

Nowadays, lightweight cryptography attracts academicians, scientists and researchers to concentrate on its requisite with the increasing usage of low resource devices. In this paper, a new lightweight image encryption scheme is proposed using the Lorenz 3D super chaotic map. This encryption scheme is an addition–rotation–XOR block cipher designed for its supremacy, efficacy and speed execution. In this addition–rotation–XOR cipher, the equation for Lorenz 3D chaotic map is iteratively solved to generate double valued signals in a speedy manner using the Runge–Kutta and Euler methods. The addition, rotation and diffusion sequences are generated from the double valued signals, and the source pixels of the 8-bit plain test images are manipulated with the addition, rotation and diffusion of the bytes. Finally, the cipher images are constructed from the manipulated pixels and evaluated with various statistical as well as randomness tests. The results from various tests prove that the proposed chaotic addition–rotation–XOR block image cipher is efficient in terms of randomness and speed.

scholarly journals Particle-based model for functional and diffusion layers of solid oxide cells electrodes

2020 ◽  
Vol 367 ◽  
pp. 67-81
Author(s):  
H. Moussaoui ◽  
J. Debayle ◽  
Y. Gavet ◽  
P. Cloetens ◽  
J. Laurencin
Keyword(s):  
Solid Oxide ◽  
Diffusion Layers ◽  
And Diffusion

Design and Implementation of the Block Cipher-SMS4 IP Core

2010 ◽  
Vol 129-131 ◽  
pp. 881-885
Author(s):  
Bin Wang ◽  
Ju Long Lan ◽  
Yun Fei Guo ◽  
Yuan Yang Zhang
Keyword(s):  
Small Area ◽  
Essential Role ◽  
Block Cipher ◽  
Data Path ◽  
Ip Core ◽  
Design And Implementation ◽  
Restrained Condition ◽  
Encryption Decryption ◽  
Code Book ◽  
Block Chaining

Block ciphers play an essential role in securing the wireless communications. In this paper, an FPGA implementation of the new block cipher SMS4 is presented. The SMS4 Intellectual Property (IP) core includes a non-pipelined encryption/decryption data path with an on-the-fly key scheduler and supports both the Electronic Code Book (ECB) and Cipher Block Chaining (CBC) operation modes. Our result shows that the SMS4 IP core can achieve a high throughput using only a relatively small area. It is well suitable for the field of area restrained condition.

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