Wireless Sensor for Oil Leakage Detection of Depots

2013 ◽  
Vol 336-338 ◽  
pp. 244-247 ◽  
Author(s):  
Chao Yin ◽  
Shao Qiang Liu ◽  
Yong Zhou Li ◽  
Xiang Yong Chen
Keyword(s):  
Low Power ◽  
Low Voltage ◽  
Aviation Fuel ◽  
Wireless Sensor ◽  
Leakage Detection ◽  
Integrated Sensor ◽  
Oil Leakage ◽  
Communication Module ◽  
Power Mode ◽  
Fuel Leakage

This paper presents a low-power wireless sensor system scheme for monitoring aviation fuel leakage of depots. Based on MSP430 microcontroller and powered by a combination of lithium battery and solar energy, the system employs the photoionization detection (PID) technology to detect the oil leakage and wirelessly reports the detection results by CC2520 radio-frequency communication module. With a low-voltage PID integrated sensor and a specialized active gas-collecting device, the system can effectively measure the concentration of leakage in low power mode. Furthermore, an integrated temperature sensor is used to compensate environmental temperature influence on the PID sensor. The effectiveness analysis and power estimation of the system show that the proposed scheme is suitable for detecting aviation fuel leakage of depots.

scholarly journals A 219-µW ultra-low power low-noise amplifier for IEEE 802.15.4 based battery powered, portable, wearable IoT applications

2021 ◽  
Vol 3 (4) ◽  
Author(s):  
S. Chrisben Gladson ◽  
Adith Hari Narayana ◽  
V. Thenmozhi ◽  
M. Bhaskar
Keyword(s):  
Low Power ◽  
Ieee 802.15.4 ◽  
Low Voltage ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Cmos Process ◽  
Process Technology ◽  
Ultra Low Power ◽  
Power Mode ◽  
Noise Amplifier

AbstractDue to the increased processing data rates, which is required in applications such as fifth-generation (5G) wireless networks, the battery power will discharge rapidly. Hence, there is a need for the design of novel circuit topologies to cater the demand of ultra-low voltage and low power operation. In this paper, a low-noise amplifier (LNA) operating at ultra-low voltage is proposed to address the demands of battery-powered communication devices. The LNA dual shunt peaking and has two modes of operation. In low-power mode (Mode-I), the LNA achieves a high gain ($$S21$$ S 21 ) of 18.87 dB, minimum noise figure ($${NF}_{min.}$$ NF m i n . ) of 2.5 dB in the − 3 dB frequency range of 2.3–2.9 GHz, and third-order intercept point (IIP3) of − 7.9dBm when operating at 0.6 V supply. In high-power mode (Mode-II), the achieved gain, NF, and IIP3 are 21.36 dB, 2.3 dB, and 13.78dBm respectively when operating at 1 V supply. The proposed LNA is implemented in UMC 180 nm CMOS process technology with a core area of $$0.40{\mathrm{ mm}}^{2}$$ 0.40 mm 2 and the post-layout validation is performed using Cadence SpectreRF circuit simulator.

Low Voltage Low Power Up-Conversion Mixer for Wireless Sensor Networks Node Application

2013 ◽  
Vol 760-762 ◽  
pp. 516-520
Author(s):  
Ge Sun ◽  
Zhi Qun Li ◽  
Chen Jian Wu ◽  
Meng Zhang ◽  
Jia Cao ◽  
...  
Keyword(s):  
Wireless Sensor Networks ◽  
Sensor Networks ◽  
Low Power ◽  
Low Voltage ◽  
Noise Figure ◽  
Cmos Technology ◽  
Negative Resistance ◽  
Wireless Sensor ◽  
Operating Voltage ◽  
Conversion Gain

A low voltage, low power up-conversion mixer is presented here for 2.4GHz wireless sensor networks (WSN). It was based on a double-balanced Gilbert cell type. The current-reuse technique was used to reduce the power consumption and negative-resistance compensation technique was used to improve the conversion gain. The mixer was designed in 0.18μm RF CMOS technology, and was simulated with Cadence SpectreRF. The simulation results indicate that the conversion gain is 6.37dB, the noise figure is 15.36dB and the input 1dB compression point is-10.3dBm, while consuming 1mA current for operating voltage at 1V.

scholarly journals Low-power 3V single supply lock-in amplifier

1970 ◽  
pp. 2
Author(s):  
J. Aguirre ◽  
N. Medrano ◽  
B. Calvo ◽  
S. Celma
Keyword(s):  
Low Power ◽  
Low Voltage ◽  
Flicker Noise ◽  
Average Power ◽  
Wireless Sensor ◽  
Reference Frequency ◽  
Sinusoidal Oscillator ◽  
Average Power Consumption ◽  
Sinusoidal Input ◽  
Lock In

In extreme high noise level environments, linear filtering is not a suitable processing method and special techniques for accurately extracting sensor signal information should be considered. An interesting possibility are lock-in amplifiers (LIA), which use the phase sensitive detection technique (PSD) to take out the data signal at a specific reference frequency fo while noise signals at frequencies other than fo are rejected and do not affect significantly the measurement. Current commercial LIAs are expensive, heavy and power consuming devices, which preclude their use in portable sensing systems. Thus, this work analyses the possibility of exporting this technique to low-power low-voltage (LPLV) embedded applications. In particular, the aim is to implement a signal conditioning lock-in architecture suitable for 3V single battery-operated wireless sensor nodes. This implies to re-design all the processing elements in single supply -most reported LIAs are designed using dual power supply- and compatible with the power requirements of a wireless sensor network node. Further, looking for a compact LPLV solution, instead of a traditional sinusoidal input, a square wave input is considered, which can be directly obtained from the embedded microcontroller, thus avoiding blocks like a sinusoidal oscillator or function generator. Figure 1 shows the proposed block diagram and a photograph of the implemented device. Experimental results for signals buried in white noise, flicker noise, interference contamination and common-mode voltage contamination confirm the capability of the proposed solution to recover information from signal to noise ratios down to 24 dB with errors below 6% with an average power consumption of only 5 mW in full operation, being able to process signals with frequencies up to 43 kHz, as shown in Figure 2.

Analysis of 6T SRAM Cell in Different Technologies

2017 ◽  
Vol MCSP2017 (01) ◽  
pp. 7-10 ◽  
Author(s):  
Subhashree Rath ◽  
Siba Kumar Panda
Keyword(s):  
Low Power ◽  
Data Storage ◽  
Low Voltage ◽  
Random Access ◽  
Storage Device ◽  
Cmos Process ◽  
Process Technology ◽  
Digital Devices ◽  
Noise Margin ◽  
Sram Cell

Static random access memory (SRAM) is an important component of embedded cache memory of handheld digital devices. SRAM has become major data storage device due to its large storage density and less time to access. Exponential growth of low power digital devices has raised the demand of low voltage low power SRAM. This paper presents design and implementation of 6T SRAM cell in 180 nm, 90 nm and 45 nm standard CMOS process technology. The simulation has been done in Cadence Virtuoso environment. The performance analysis of SRAM cell has been evaluated in terms of delay, power and static noise margin (SNM).

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