Analysis of InN/La2O3 Twosome for Double-Gate MOSFETs for Radio Frequency Applications

2022 ◽  
Vol 1048 ◽  
pp. 147-157
Author(s):  
Naveenbalaji Gowthaman ◽  
Viranjay Srivastava
Keyword(s):  
Doping Concentration ◽  
Indium Nitride ◽  
Channel Length ◽  
Double Gate ◽  
Operating Condition ◽  
Electronic Simulator ◽  
Dg Mosfet ◽  
Simulation Results ◽  
And Control ◽  
Nanometer Regime

The channel material of a gate describes the operating condition of the MOSFET. A suitable operating condition prevails in MOSFETs if the transistors are quite enough to observe and control at the nanometer regime. An efficient gate and channel material have been proposed in this work which is based on the electrical properties they exhibit at the temperature of 300K. The doping concentration for the electrons and holes is maintained to be 1Χ1019cm-3 for the entire electronic simulator. The simulation results show that using La2O3 along with Indium Nitride (InN) material for the designing of Double-Gate (DG) MOSFETs provides better controllability over the transistor at a channel length of 50nm. This proposed DG-MOSFET is more compliant than the conventional coplanar MOSFETs based on Silicon.

Projected Performance of Sub-10 nm GaN-based Double Gate MOSFETs

2017 ◽  
Vol 2 (2) ◽  
pp. 15-19 ◽  
Author(s):  
Md. Saud Al Faisal ◽  
Md. Rokib Hasan ◽  
Marwan Hossain ◽  
Mohammad Saiful Islam
Keyword(s):  
High Speed ◽  
Field Effect Transistors ◽  
Cmos Technology ◽  
Channel Length ◽  
Capacitive Coupling ◽  
Oxide Semiconductor ◽  
Double Gate ◽  
Short Channel ◽  
Channel Effects ◽  
Silvaco Atlas

GaN-based double gate metal-oxide semiconductor field-effect transistors (DG-MOSFETs) in sub-10 nm regime have been designed for the next generation logic applications. To rigorously evaluate the device performance, non-equilibrium Green’s function formalism are performed using SILVACO ATLAS. The device is turn on at gate voltage, VGS =1 V while it is going to off at VGS = 0 V. The ON-state and OFF-state drain currents are found as 12 mA/μm and ~10-8 A/μm, respectively at the drain voltage, VDS = 0.75 V. The sub-threshold slope (SS) and drain induced barrier lowering (DIBL) are ~69 mV/decade and ~43 mV/V, which are very compatible with the CMOS technology. To improve the figure of merits of the proposed device, source to gate (S-G) and gate to drain (G-D) distances are varied which is mentioned as underlap. The lengths are maintained equal for both sides of the gate. The SS and DIBL are decreased with increasing the underlap length (LUN). Though the source to drain resistance is increased for enhancing the channel length, the underlap architectures exhibit better performance due to reduced capacitive coupling between the contacts (S-G and G-D) which minimize the short channel effects. Therefore, the proposed GaN-based DG-MOSFETs as one of the excellent promising candidates to substitute currently used MOSFETs for future high speed applications.

Model development and control of an auto-refrigerated polystyrene polymerization reactor

2021 ◽  
pp. 014233122110251
Author(s):  
Reyhane Mokhtarname ◽  
Ali Akbar Safavi ◽  
Leonhard Urbas ◽  
Fabienne Salimi ◽  
Mohammad M Zerafat ◽  
...  
Keyword(s):  
Temperature Control ◽  
Model Development ◽  
Heat Removal ◽  
Superior Performance ◽  
Polymerization Process ◽  
Vacuum System ◽  
Control Scheme ◽  
Simulation Results ◽  
And Control ◽  
Operating Plant

Dynamic model development and control of an existing operating industrial continuous bulk free radical styrene polymerization process are carried out to evaluate the performance of auto-refrigerated CSTRs (continuous stirred tank reactors). One of the most difficult tasks in polymerization processes is to control the high viscosity reactor contents and heat removal. In this study, temperature control of an auto-refrigerated CSTR is carried out using an alternative control scheme which makes use of a vacuum system connected to the condenser and has not been addressed in the literature (i.e. to the best of our knowledge). The developed model is then verified using some experimental data of the real operating plant. To show the heat removal potential of this control scheme, a common control strategy used in some previous studies is also simulated. Simulation results show a faster dynamics and superior performance of the first control scheme which is already implemented in our operating plant. Besides, a nonlinear model predictive control (NMPC) is developed for the polymerization process under study to provide a better temperature control while satisfying the input/output and the heat exchanger capacity constraints on the heat removal. Then, a comparison has been also made with the conventional proportional-integral (PI) controller utilizing some common tuning rules. Some robustness and stability analyses of the control schemes investigated are also provided through some simulations. Simulation results clearly show the superiority of the NMPC strategy from all aspects.

A multigroup model for cholera dynamics and control

2015 ◽  
Vol 09 (01) ◽  
pp. 1650001 ◽  
Author(s):  
Drew Posny ◽  
Chairat Modnak ◽  
Jin Wang
Keyword(s):  
Reproduction Number ◽  
Vaccination Strategy ◽  
Sharp Threshold ◽  
Indirect Transmission ◽  
Dynamics And Control ◽  
Simulation Results ◽  
Transmission Pathways ◽  
And Control ◽  
Control Study ◽  
The Basic Reproduction Number

We propose a general multigroup model for cholera dynamics that involves both direct and indirect transmission pathways and that incorporates spatial heterogeneity. Under biologically feasible conditions, we show that the basic reproduction number R0 remains a sharp threshold for cholera dynamics in multigroup settings. We verify the analysis by numerical simulation results. We also perform an optimal control study to explore optimal vaccination strategy for cholera outbreaks.

scholarly journals Kinematic Analysis of Three-Wire-Driven Parallel (TWDP) Robot

2011 ◽  
Vol 2-3 ◽  
pp. 302-307 ◽  
Author(s):  
Tao Yu ◽  
Qing Kai Han
Keyword(s):  
Static Analysis ◽  
Parallel Robot ◽  
Analytical Models ◽  
Kinematics Analysis ◽  
Mechanism Model ◽  
Good Movement ◽  
Dynamics And Control ◽  
Movement Stability ◽  
Simulation Results ◽  
And Control

In the paper, a novel new gravity-constrained (GC) three-wire-driven (TWD) parallel robot is proposed. With its mechanism model, three typical kinematics analytical models, including horizontal up-down motion, pitching motion and heeling motion and their corresponding simulations are given in detail. In static analysis, the change of tensions in the wires is calculated based on previous kinematics analysis. The simulation results show the robot has good movement stability. The paper can provide useful materials to study of dynamics and control on wire-driven robot.

Methodology for Wheelchair Design Based on Simulation Analyses

2021 ◽  
Author(s):  
Grzegorz Dobrzynski ◽  
Michal Abramowski
Keyword(s):  
Modeling And Simulation ◽  
Control Systems ◽  
Simulation Results ◽  
And Control

The article presents the stages of modeling and simulation of a new design of a wheelchair with the option of moving up and down stairs. These analyzes were aimed at the synthesis of the de-sign parameters and parameters of the sensor and control systems. The simulation results were verified by experimentally testing the prototype.

Fractal analysis and control of the competition model

2016 ◽  
Vol 09 (03) ◽  
pp. 1650045 ◽  
Author(s):  
Mianmian Zhang ◽  
Yongping Zhang
Keyword(s):  
Feedback Control ◽  
Mathematical Models ◽  
Fractal Analysis ◽  
Fractal Geometry ◽  
Julia Set ◽  
Julia Sets ◽  
Competition Model ◽  
Simulation Results ◽  
Population Competition ◽  
And Control

Lotka–Volterra population competition model plays an important role in mathematical models. In this paper, Julia set of the competition model is introduced by use of the ideas and methods of Julia set in fractal geometry. Then feedback control is taken on the Julia set of the model. And synchronization of two different Julia sets of the model with different parameters is discussed, which makes one Julia set change to be another. The simulation results show the efficacy of these methods.

Decoupling Control for Unwinding Tension Control Systems

2012 ◽  
Vol 262 ◽  
pp. 367-371
Author(s):  
Min Bian ◽  
Mei Yang
Keyword(s):  
Control Systems ◽  
Strong Coupling ◽  
Control Process ◽  
Tension Control ◽  
Decoupling Control ◽  
Driver Model ◽  
Control Performance ◽  
Printing Quality ◽  
Simulation Results ◽  
And Control

During the printing process, invariable tension is very important to make sure the high printing quality. It’s well known that the relation of tension and tape velocity is strong-coupling based on the model of tension control, the modeling of tension possesses varies a lot in the control process, and various disturbances are inevitable during printing. All of these make the tension control systems unstable and affect the printing quality. This paper purposes a method to decrease the strong-coupling relation between speed and tension and control the speed-tension accurately. Based on the shaft-less printing press, the unwinding tension model and servo driver model are given. Decoupling controller is designed in this paper, and simulation results show that this method can improve the coupling degree and control performance.

A 10T Cell Design without Half Select Problem for Bit-Interleaving Architecture in 65nm CMOS

2013 ◽  
Vol 373-375 ◽  
pp. 1607-1611
Author(s):  
Hong Gang Zhou ◽  
Shou Biao Tan ◽  
Qiang Song ◽  
Chun Yu Peng
Keyword(s):  
Error Correction ◽  
Low Voltage ◽  
Cmos Technology ◽  
Soft Error ◽  
Error Correction Codes ◽  
Cell Design ◽  
Low Voltage Operation ◽  
Sram Cell ◽  
Simulation Results ◽  
Nanometer Regime

With the scaling of process technologies into the nanometer regime, multiple-bit soft error problem becomes more serious. In order to improve the reliability and yield of SRAM, bit-interleaving architecture which integrated with error correction codes (ECC) is commonly used. However, this leads to the half select problem, which involves two aspects: the half select disturb and the additional power caused by half-selected cells. In this paper, we propose a new 10T cell to allow the bit-interleaving array while completely eliminating the half select problem, thus allowing low-power and low-voltage operation. In addition, the RSNM and WM of our proposed 10T cell are improved by 21% and nearly one times, respectively, as compared to the conventional 6T SRAM cell in SMIC 65nm CMOS technology. We also conduct a comparison with the conventional 6T cell about the leakage simulation results, which show 14% of leakage saving in the proposed 10T cell.

scholarly journals 3D Double Gate FinFET Construction of 30 nm Technology Node Impact Towards Short Channel Effect

2018 ◽  
Vol 12 (3) ◽  
pp. 1358
Author(s):  
Ameer F. Roslan ◽  
F. Salehuddin ◽  
A.S. M.Zain ◽  
K.E. Kaharudin ◽  
H. Hazura ◽  
...  
Keyword(s):  
Leakage Current ◽  
Electrical Characterization ◽  
Channel Length ◽  
Double Gate ◽  
Short Channel ◽  
3D Design ◽  
Drive Current ◽  
Minimum Requirement ◽  
Technology Roadmap ◽  
Low Performance

<p>This paper presents an investigation on properties of Double Gate FinFET (DGFinFET) and impact of physical properties of FinFET towards short channel effects (SCEs) for 30 nm device, where depletion-layer widths of the source-drain corresponds to the channel length aside from constant fin height (HFIN) and the fin thickness (TFIN). Virtual fabrication process of 3-dimensional (3D) design is applied throughout the study and its electrical characterization is employed and substantial is shown towards the FinFET design whereby in terms of the ratio of drive current against the leakage current (ION/IOFF ratio) at 563138.35 compared to prediction made by the International Technology Roadmap Semiconductor (ITRS) 2013. Conclusively, the incremental in ratio has fulfilled the desired in incremental on the drive current as well as reductions of the leakage current. Threshold voltage (VTH) meanwhile has also achieved the nominal requirement predicted by the International Technology Roadmap Semiconductor (ITRS) 2013 for which is at 0.676±12.7% V. The ION , IOFF and VTH obtained from the device has proved to meet the minimum requirement by ITRS 2013 for low performance Multi-Gate technology.</p>

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