Post Metallization Annealing Characterization of Interface Properties of High-κ Dielectrics Stack on Silicon Carbide

2008 ◽  
Vol 600-603 ◽  
pp. 771-774 ◽  
Author(s):  
Ming Hung Weng ◽  
Rajat Mahapatra ◽  
Nicolas G. Wright ◽  
Alton B. Horsfall
Keyword(s):  
Elevated Temperatures ◽  
Gate Dielectric ◽  
Flat Band ◽  
Interface Properties ◽  
Temperature Dependent ◽  
Oxide Charge ◽  
Before And After ◽  
Mis Capacitors ◽  
The Ideal

The interface properties of TiO2/SiO2/SiC metal-insulator-semiconductor (MIS) capacitors were investigated by C-V and G-V measurements over a range of frequencies between 10 kHz and 1 MHz from room temperature up to 500°C. Ledges from multiple traps were observed during high frequency (1 MHz) sweeps from inversion to accumulation during measurements at elevated temperatures. The high measuring temperature resulted in the annealing of the sample, where the existence of trap ledges was observed to be temperature dependent. For n-type substrate negative Qf causes the shift of the C-V curve to more negative gate bias with respect to the ideal C-V curve. These fixed oxide charge is substantially reduced after post metallization annealing (PMA). We report the flat band voltage, detail in reducing fixed oxide charge and temperature dependence of density of interface traps before and after annealing of TiO2 high-κ gate dielectric stacks on a 4H-SiC based device.

The Temperature-Dependent Ideal Shear Strength of Solid Single Crystals

2018 ◽  
Vol 85 (3) ◽  
Author(s):  
Tianbao Cheng ◽  
Daining Fang ◽  
Yazheng Yang
Keyword(s):  
Shear Strength ◽  
Theoretical Model ◽  
Melting Point ◽  
Single Crystals ◽  
Elevated Temperatures ◽  
Absolute Zero ◽  
Temperature Dependent ◽  
Temperature Changes ◽  
First Time ◽  
The Ideal

Knowledge of the ideal shear strength of solid single crystals is of fundamental importance. However, it is very hard to determine this quantity at finite temperatures. In this work, a theoretical model for the temperature-dependent ideal shear strength of solid single crystals is established in the view of energy. To test the drawn model, the ideal shear properties of Al, Cu, and Ni single crystals are calculated and compared with that existing in the literature. The study shows that the ideal shear strength first remains approximately constant and then decreases almost linearly as temperature changes from absolute zero to melting point. As an example of application, the “brittleness parameter” of solids at elevated temperatures is quantitatively characterized for the first time.

Improved SiO2/ 4H-SiC Interface Defect Density Using Forming Gas Annealing

2019 ◽  
Vol 963 ◽  
pp. 465-468
Author(s):  
Stephan Wirths ◽  
Giovanni Alfieri ◽  
Alyssa Prasmusinto ◽  
Andrei Mihaila ◽  
Lukas Kranz ◽  
...  
Keyword(s):  
Defect Density ◽  
Deep Level ◽  
Flat Band ◽  
Temperature Dependent ◽  
Mos Capacitors ◽  
Interface Defect ◽  
Before And After ◽  
Oxide Deposition ◽  
Transient Spectroscopy ◽  
Post Deposition

We investigated the influence of forming gas annealing (FGA) before and after oxide deposition on the SiO2/4H-SiC interface defect density (Dit). For MOS capacitors (MOSCAPs) that were processed using FGAs at temperatures above 1050°C, CV characterization revealed decreased flat band voltage shifts and stretch-out for different sweep directions and frequencies. Moreover, constant-capacitance deep level transient spectroscopy (CC-DLTS) was performed and showed Dit levels below 1012 cm-2eV-1 for post deposition FGA at 1200°C. Finally, lateral MOSFETs were fabricated to analyze the temperature-dependent threshold voltage (Vth) shift.

Electrical and Optical Characterization of InSb Grown on GaAs by MBE

1989 ◽  
Vol 160 ◽  
Author(s):  
Phillip E. Thompson ◽  
James Waterman ◽  
D. Kurtgaskill ◽  
Robert Stahlbush ◽  
Daniel Gammon ◽  
...  
Keyword(s):  
Room Temperature ◽  
Lattice Mismatch ◽  
Optical Characterization ◽  
Layer Growth ◽  
Temperature Dependent ◽  
Carrier Lifetimes ◽  
Capacitance Voltage ◽  
Ir Transmission ◽  
Mis Capacitors

AbstractInSb has been grown on semi-insulating GaAs substrates by molecular beam epitaxy. By growing an InSb buffer layer at 300 C prior to the main InSb layer growth at 420 C, the effect of the 14% lattice mismatch between GaAs and InSb was minimized. A typical 5 µrn InSb film had a room temperature carrier concentration and electron Hall mobility of 2 × 1016/cm3 and 6×104 cm2/Vs, respectively. At 77 K these values became 2 × 1015/cm3 and 1.1 ×105 cm2/Vs. Temperature dependent Hall measurements revealed a peak in the mobility at 85 K and 70 K for the 5 and 10 µm samples. Capacitance-voltage measurements using MIS capacitors produced 77 K carrier concentrations in agreement with the low fieldHall measurements. Carrier lifetimes were determined by photoconductive response measurements. Lifetimes of 20 ns and 50 ns were determined for the 5 and 10 µm films. For comparison, the carrier lifetime in bulk n-type InSb was found to be 200 ns. Optical characterization by room temperature IR transmission spectroscopy showed a broad absorption edge, with an absorption coefficient of 1.4 × 103/cm at a wavelength of 6 µm. Epilayer thickness was determined from observed interference fringes. Raman spectroscopy showed that each epitaxial layer had a spectrum equivalent to that of bulk InSb.

Surface Characterization of the Spinel LixMn2O4Cathode before and after Storage at Elevated Temperatures

2001 ◽  
Vol 13 (11) ◽  
pp. 4207-4212 ◽  
Author(s):  
Forest T. Quinlan ◽  
Keiichiro Sano ◽  
Trevor Willey ◽  
Ruxandra Vidu ◽  
Ken Tasaki ◽  
...  
Keyword(s):  
Surface Characterization ◽  
Elevated Temperatures ◽  
Before And After

Temperature Dependent Characterization of Bipolar Injection Field-Effect-Transistors (BiFET) for Determining the Short-Circuit-Capability

2015 ◽  
Vol 821-823 ◽  
pp. 806-809
Author(s):  
Andreas Hürner ◽  
Tobias Erlbacher ◽  
Heinz Mitlehner ◽  
Anton J. Bauer ◽  
Lothar Frey
Keyword(s):  
Field Effect ◽  
Elevated Temperatures ◽  
Field Effect Transistors ◽  
Short Circuit ◽  
Junction Temperature ◽  
Electrical Performance ◽  
Saturation Current ◽  
Temperature Dependent ◽  
First Time

In this study, the electrical performance of Bipolar-Injection Field-Effect-Transistors (BiFET) in dependence on the junction temperature is presented for the first time. Based on these results, the short circuit capability of the BiFET is discussed. Thereby, the saturation current is estimated to be approximately 150mA at 300K and it increases by a factor of 5 by rising the temperature up to 450K as analyzed in this study. Furthermore, the reduction of the gate-voltage window of the BiFET at elevated temperatures is comparable to unipolar JFETs, and indicates a very good controllability over a wide temperature range. Finally, numerical simulations demonstrate the potential to improve the electrical performance of the BiFET drastically by adjusting the doping concentration in the control region and increasing the ambipolar lifetime in the p-doped drift layer without influencing the dependency on the junction temperature.

Study of the Interface Properties of TiO2/SiO2/SiC by Photocapacitance

2011 ◽  
Vol 679-680 ◽  
pp. 350-353 ◽  
Author(s):  
Ming Hung Weng ◽  
Simon Barker ◽  
Rajat Mahapatra ◽  
Benjamin J.D. Furnival ◽  
Nicolas G. Wright ◽  
...  
Keyword(s):  
High Temperature ◽  
Elevated Temperatures ◽  
Temperature Measurements ◽  
Mis Structure ◽  
Interface Properties ◽  
Post Deposition Annealing ◽  
Oxide Charge ◽  
Real Time Measurement ◽  
Capacitance Voltage ◽  
Post Deposition

We have investigated the annealing of fixed oxide charge and interfacial traps in MISiC strucures by means of the photo capacitance voltage technique at temperatures up to 500°C. Elevated temperature measurements show reduced hysteresis and reduced fixed oxide charge at the interface. The photo capacitance technique shows a real-time measurement at elevated temperatures, in which electrons are populated by photo energy, in a 4H-SiC MIS structure. We also confirm the reduction of fixed oxide charge at the interface by means of high temperature post deposition annealing, which occurs during the high temperature measurements.

scholarly journals Oxidation of MBE-Grown ZnTe and ZnTe/Zn Nanowires and Their Structural Properties

Materials ◽  
2021 ◽  
Vol 14 (18) ◽  
pp. 5252
Author(s):  
Katarzyna Gas ◽  
Slawomir Kret ◽  
Wojciech Zaleszczyk ◽  
Eliana Kamińska ◽  
Maciej Sawicki ◽  
...  
Keyword(s):  
Electron Microscopy ◽  
Elevated Temperatures ◽  
Atmospheric Conditions ◽  
Zno Nanocrystals ◽  
Transmission Electron ◽  
Before And After ◽  
Fine Crystalline Structure ◽  
And Performance ◽  
Comparative Structural Characterization

Results of comparative structural characterization of bare and Zn-covered ZnTe nanowires (NWs) before and after thermal oxidation at 300 °C are presented. Scanning electron microscopy, energy-dispersive X-ray spectroscopy, high-resolution transmission electron microscopy, and Raman scattering not only unambiguously confirm the conversion of the outer layer of the NWs into ZnO, but also demonstrate the influence of the oxidation process on the structure of the inner part of the NWs. Our study shows that the morphology of the resulting ZnO can be improved by the deposition of thin Zn shells on the bare ZnTe NWs prior to the oxidation. The oxidation of bare ZnTe NWs results in the formation of separated ZnO nanocrystals which decorate crystalline Te cores of the NWs. In the case of Zn-covered NWs, uniform ZnO shells are formed, however they are of a fine-crystalline structure or partially amorphous. Our study provides an important insight into the details of the oxidation processes of ZnTe nanostructures, which could be of importance for the preparation and performance of ZnTe based nano-devices operating under normal atmospheric conditions and at elevated temperatures.

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