Impact of a Treatment Combining Nitrogen Plasma Exposure and Forming Gas Annealing on Defect Passivation of SiO2/SiC Interfaces

2009 ◽  
Vol 615-617 ◽  
pp. 525-528 ◽  
Author(s):  
Heiji Watanabe ◽  
Yuu Watanabe ◽  
Makoto Harada ◽  
Yusuke Kagei ◽  
Takashi Kirino ◽  
...  

We propose a treatment combining nitrogen plasma exposure and forming gas annealing (FGA) to improve the electrical properties of SiO2/SiC interfaces. Although conventional FGA at 450°C alone is not effective for reducing interface traps and fixed charges, our combination treatment effectively reduces both even at moderate temperatures. We achieved further improvement by applying our treatment at higher (over 900°C) FGA temperatures, including lower interface state density (Dit) values for both deep and shallow energy levels (1 - 4 x 1011 cm-2eV-1). Considering that nitrogen incorporation promotes hydrogen passivation of interface defects, a possible mechanism for the improved electrical properties is that interface nitridation eliminates carbon clusters or Si-O-C bonds, which leads to the formation of simple Si and C dangling bonds that can be readily terminated by hydrogen. We therefore believe that our treatment is a promising method for improving the performance of SiC-based MOS devices.

2013 ◽  
Vol 740-742 ◽  
pp. 741-744 ◽  
Author(s):  
Heiji Watanabe ◽  
Daisuke Ikeguchi ◽  
Takashi Kirino ◽  
Shuhei Mitani ◽  
Yuki Nakano ◽  
...  

We report on the harmful impact of ultraviolet (UV) light irradiation on thermally grown SiO2/4H-SiC(0001) structures and its use in subsequent thermal annealing for improving electrical properties of SiC-MOS devices. As we previously reported [1], significant UV-induced damage, such as positive flatband voltage shift and hysteresis in capacitance-voltage curves as well as increased interface state density, was observed for SiC-MOS devices with thermally grown oxides. Interestingly, the subsequent annealing of damaged SiO2/SiC samples resulted in superior electrical properties to those for untreated (fresh) devices. These findings imply that UV irradiation of the SiO2/SiC structure is effective for eliciting pre-existing carbon-related defects and transforming them into a simple configuration that can be easily passivated by thermal treatment.


2003 ◽  
Vol 18 (1) ◽  
pp. 88-96 ◽  
Author(s):  
Seok-Hyun Yoon ◽  
Hwan Kim

A series of coarse-grained BaTiO3 specimens with different dopant (Nb) concentrations were prepared by adjusting the oxygen partial pressure during sintering. They were again heat-treated in air, and the behavior of the grain boundary electrical properties with the increase of Nb concentration was investigated under the conditions of the same microstructure and heat treatment. The interface states of the grain boundaries were estimated using the grain boundary R (resistance) and C (capacitance) values at each temperature that were obtained from impedance analysis. An increase in the interface state density at certain energy levels with increasing Nb concentration was verified experimentally. One type of interface state was observed for specimens with low Nb concentrations and another for specimens with high Nb concentrations. It is proposed that the changes in the interface state with increasing Nb concentration are related to the transition of the compensating defect mode and differences in the extent of oxygen adsorption at the grain boundaries.


1989 ◽  
Vol 146 ◽  
Author(s):  
Paihung Pan ◽  
Ahmad Kermani ◽  
Wayne Berry ◽  
Jimmy Liao

ABSTRACTElectrical properties of thin (12 nm) SiO2 films with and without in-situ deposited poly Si electrodes have been studied. Thin SiO2 films were grown by the rapid thermal oxidation (RTO) process and the poly Si films were deposited by the rapid thermal chemical vapor deposition (RTCVD) technique at 675°C and 800°C. Good electrical properties were observed for SiO2 films with thin in-situ poly Si deposition; the flatband voltage was ∼ -0.86 V, the interface state density was < 2 × 1010/cm2/eV, and breakdown strength was > 10 MV/cm. The properties of RTCVD poly Si were also studied. The grain size was 10-60 rim before anneal and was 50-120 rim after anneal. Voids were found in thin (< 70 nm) RTCVD poly Si films. No difference in either SiO2 properties or poly Si properties was observed for poly Si films deposited at different temperatures.


2013 ◽  
Vol 740-742 ◽  
pp. 695-698 ◽  
Author(s):  
Tsuyoshi Akagi ◽  
Hiroshi Yano ◽  
Tomoaki Hatayama ◽  
Takashi Fuyuki

Metal-oxide-semiconductor (MOS) capacitors with phosphorus localized near the SiO2/SiC interface were fabricated on 4H-SiC by direct POCl3treatment followed by SiO2deposition. Post-deposition annealing (PDA) temperature affected MOS device properties and phosphorus distribution in the oxide. The sample with PDA at 800 °C showed narrow phosphorus-doped oxide region, resulting in low interface state density near the conduction band edge and small flatband voltage shift after FN injection. The interfacial localization of phosphorus improved both interface properties and reliability of 4H-SiC MOS devices.


2016 ◽  
Vol 858 ◽  
pp. 663-666
Author(s):  
Marilena Vivona ◽  
Patrick Fiorenza ◽  
Tomasz Sledziewski ◽  
Alexandra Gkanatsiou ◽  
Michael Krieger ◽  
...  

In this work, the electrical properties of SiO2/SiC interfaces onto a 2°-off axis 4H-SiC layer were studied and validated through the processing and characterization of metal-oxide-semiconductor (MOS) capacitors. The electrical analyses on the MOS capacitors gave an interface state density in the low 1×1012 eV-1cm-2 range, which results comparable to the standard 4°-off-axis 4H-SiC, currently used for device fabrication. From Fowler-Nordheim analysis and breakdown measurements, a barrier height of 2.9 eV and an oxide breakdown of 10.3 MV/cm were determined. The results demonstrate the maturity of the 2°-off axis material and pave the way for the fabrication of 4H-SiC MOSFET devices on this misorientation angle.


2017 ◽  
Vol 897 ◽  
pp. 340-343 ◽  
Author(s):  
Atthawut Chanthaphan ◽  
Yoshihito Katsu ◽  
Takuji Hosoi ◽  
Takayoshi Shimura ◽  
Heiji Watanabe

Surface morphology and electrical properties of silicon dioxide (SiO2) on 4H-SiC substrates formed by metal-enhanced oxidation (MEO) using barium (Ba) atoms were systematically investigated. It was found that severe surface roughening caused by Ba-MEO can be suppressed by using SiO2 capping prior to MEO. The Ba atoms at the SiO2/SiC interface were found to diffuse to the oxide surface through the deposited SiO2 capping layer, and then the Ba density reduced to ~1014 cm-2 before stable MEO. The resulting SiO2/SiC interface showed the reduced interface state density but the insulating property of the oxides was significantly degraded.


2019 ◽  
Vol 963 ◽  
pp. 469-472 ◽  
Author(s):  
Teruaki Kumazawa ◽  
Mitsuo Okamoto ◽  
Miwako Iijima ◽  
Yohei Iwahashi ◽  
Shinji Fujikake ◽  
...  

The SiO2/SiC interface quality has a significant effect on the performance of 4H-SiC MOS devices. The introduction of nitrogen to the SiO2/SiC interface is a well-known method for reducing the interface state density (Dit). In this study, we introduced nitrogen to the SiO2/SiC interface by forming SiNx films using atomic layer deposition (ALD) and thus improved the interface quality. O2 annealing with a SiNx interface layer of optimal thickness enhanced the field effect mobility.


2010 ◽  
Vol 645-648 ◽  
pp. 991-994 ◽  
Author(s):  
Takuji Hosoi ◽  
Yusuke Kagei ◽  
Takashi Kirino ◽  
Yuu Watanabe ◽  
Kohei Kozono ◽  
...  

We investigated the impact of a combination treatment of nitrogen plasma exposure and forming gas annealing (FGA) for a thermally grown SiO2 layer on channel electron mobility in 4H-SiC metal-insulator-semiconductor field-effect-transistors (MISFETs) with and without deposited aluminum oxynitride (AlON) overlayers. This treatment was effective for improving the interface properties of nitrided SiO2/SiC structures formed by thermal oxidation in NOx ambient as well as pure SiO2/SiC structures. A channel mobility enhancement was perfectly consistent with a reduction in interface state density depending on the process conditions of the combination treatment, and a peak mobility of 26.9 cm2/Vs was achieved for the MISFETs with the nitrided SiO2 single dielectric layer. Comparable channel mobility was obtained with a gate insulator consisting of the AlON stacked on a thin nitrided SiO2 interlayer, indicating that both the combination treatment and the AlON/SiO2 stacked dielectrics can be integrated into the SiC MISFET fabrication processes.


2009 ◽  
Vol 615-617 ◽  
pp. 789-792
Author(s):  
Masato Noborio ◽  
Jun Suda ◽  
Tsunenobu Kimoto

P-channel MOSFETs have been fabricated on 4H-SiC (0001) face as well as on 4H-SiC (03-38) and (11-20) faces. The gate oxides were formed by thermal oxidation in dry N2O ambient, which is widely accepted to improve the performance of n-channel SiC MOSFETs. The p-channel SiC MOSFETs with N2O-grown oxides on 4H-SiC (0001), (03-38), and (11-20) faces show a channel mobility of 7 cm2/Vs, 11 cm2/Vs, and 17 cm2/Vs, respectively. From the quasi-static C-V curves measured by using gate-controlled diodes, the interface state density was calculated by an original method. The interface state density was the lowest at the SiO2/4H-SiC (03-38) interface (about 1x1012 cm-2eV-1 at EV + 0.2 eV). The authors have applied deposited oxides to the 4H-SiC p-channel MOSFETs. The (0001), (03-38), and (11-20) MOSFETs with deposited oxides exhibit a channel mobility of 10 cm2/Vs, 13 cm2/Vs, and 17 cm2/Vs, respectively. The deposited oxides are one of effective approaches to improve both n-channel and p-channel 4H-SiC MOS devices.


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