Improved Characteristics of 4H-SiC MISFET with AlON/Nitrided SiO2 Stacked Gate Dielectrics

2010 ◽  
Vol 645-648 ◽  
pp. 991-994 ◽  
Author(s):  
Takuji Hosoi ◽  
Yusuke Kagei ◽  
Takashi Kirino ◽  
Yuu Watanabe ◽  
Kohei Kozono ◽  
...  
Keyword(s):  
Combination Treatment ◽  
Field Effect Transistors ◽  
Interface State ◽  
Nitrogen Plasma ◽  
State Density ◽  
Gate Insulator ◽  
Process Conditions ◽  
Aluminum Oxynitride ◽  
Channel Mobility ◽  
The Impact

We investigated the impact of a combination treatment of nitrogen plasma exposure and forming gas annealing (FGA) for a thermally grown SiO2 layer on channel electron mobility in 4H-SiC metal-insulator-semiconductor field-effect-transistors (MISFETs) with and without deposited aluminum oxynitride (AlON) overlayers. This treatment was effective for improving the interface properties of nitrided SiO2/SiC structures formed by thermal oxidation in NOx ambient as well as pure SiO2/SiC structures. A channel mobility enhancement was perfectly consistent with a reduction in interface state density depending on the process conditions of the combination treatment, and a peak mobility of 26.9 cm2/Vs was achieved for the MISFETs with the nitrided SiO2 single dielectric layer. Comparable channel mobility was obtained with a gate insulator consisting of the AlON stacked on a thin nitrided SiO2 interlayer, indicating that both the combination treatment and the AlON/SiO2 stacked dielectrics can be integrated into the SiC MISFET fabrication processes.

Improved Inversion Channel Mobility in Si-face 4H-SiC MOSFETs by Phosphorus Incorporation Technique

2010 ◽  
Vol 1246 ◽  
Author(s):  
Dai Okamoto ◽  
Hiroshi Yano ◽  
Shinya Kotake ◽  
Kenji Hirata ◽  
Tomoaki Hatayama ◽  
...  
Keyword(s):  
Conduction Band ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Band Edge ◽  
Conduction Band Edge ◽  
Channel Mobility ◽  
Inversion Channel

AbstractWe propose a new technique to fabricate 4H-SiC metal–oxide–semiconductor field-effect transistors (MOSFETs) with high inversion channel mobility. P atoms were incorporated into the SiO2/4H-SiC(0001) interface by post-oxidation annealing using phosphoryl chloride (POCl3). The interface state density at 0.2 eV from the conduction band edge was reduced to less than 1 × 1011 cm−2eV−1 by the POCl3 annealing at 1000 °C. The peak field-effect mobility of 4H-SiC MOSFETs on (0001) Si-face processed with POCl3 annealing at 1000 °C was approximately 90 cm2/Vs. The high channel mobility is attributed to the reduced interface state density near the conduction band edge.

Investigation of the off-current in amorphous silicon thin film transistors for SiO2 and SiNx. gate insulators

1996 ◽  
Vol 424 ◽  
Author(s):  
Jeong Hyun Kim ◽  
Woong Sik Choi ◽  
Chan Hee Hong ◽  
Hoe Sup Soh
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Thin Film Transistors ◽  
Chemical Vapor ◽  
Interface State ◽  
State Density ◽  
Gate Insulator ◽  
Defect States ◽  
Silicon Thin Film ◽  
Pressure Chemical

AbstractThe off current behavior of hydrogenated amorphous silicon (a-Si:H) thin film transistors (TFTs) with an atmospheric pressure chemical vapor deposition (APCVD) silicon dioxide (SiO2) gate insulator were investigated at negative gate voltages. The a-Si:H TFT with SiO2 gate insulator has small off currents and large activation energy (Ea) of the off current compared to the a-Si:H TFT with SiNx gate insulator. The holes induced in the channel by negative gate voltage seem to be trapped in the defect states near the a-Si:H/SiO2 interface. The interface state density in the lower half of the band gap of a-Si:H/SiO2 appears to be much higher than that for a-Si:H/SiNx.

scholarly journals Inversion channel mobility and interface state density of diamond MOSFET using N-type body with various phosphorus concentrations

2019 ◽  
Vol 114 (24) ◽  
pp. 242101 ◽  
Author(s):  
Tsubasa Matsumoto ◽  
Hiromitsu Kato ◽  
Toshiharu Makino ◽  
Masahiko Ogura ◽  
Daisuke Takeuchi ◽  
...  
Keyword(s):  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Channel Mobility ◽  
Inversion Channel

Reduced interface state densities for remote microwave plasma silicon nitride

1992 ◽  
Vol 70 (10-11) ◽  
pp. 795-798 ◽  
Author(s):  
D. Landheer ◽  
J. A. Bardwell ◽  
I. Sproule ◽  
J. Scott-Thomas ◽  
W. Kwok ◽  
...  
Keyword(s):  
Microwave Plasma ◽  
Field Effect Transistors ◽  
Chemical Vapour ◽  
Depth Profiling ◽  
Interface State ◽  
State Density ◽  
Fixed Charge ◽  
Silicon Substrates ◽  
Plasma Chemical Vapour Deposition ◽  
State Densities

The interface state density and fixed charge density of films of a-Si3N4:H deposited on silicon substrates by remote microwave plasma chemical vapour deposition have been studied as a function of deposition and annealing temperature. Interface state densities (Dit as low as 9 × 1010 cm−2 eV−1 have been obtained for films deposited at 215 °C and annealed for 15 min at 500 °C. The films exhibited positive fixed charge levels (QN/q)> 1013 cm−2, increasing slightly with deposition temperature and decreasing slightly with annealing at temperatures from 500 to 700 °C. Fourier transform infrared spectroscopy and Auger depth profiling were used to study the impurities in the films and at the interface. Metal–insulator–silicon field effect transistors made with these films showed room temperature effective channel hole mobilities of 37 cm2 V−1 s−1.

Electrical Properties of High-K LaLuO3 Gate Oxide for SOI MOSFETs

2011 ◽  
Vol 276 ◽  
pp. 87-93
Author(s):  
Y.Y. Gomeniuk ◽  
Y.V. Gomeniuk ◽  
A. Nazarov ◽  
P.K. Hurley ◽  
Karim Cherkaoui ◽  
...  
Keyword(s):  
Electrical Characterization ◽  
Gate Oxide ◽  
Interface State ◽  
Channel Length ◽  
State Density ◽  
Interface State Density ◽  
Mos Capacitors ◽  
Channel Mobility ◽  
Threshold Voltages

The paper presents the results of electrical characterization of MOS capacitors and SOI MOSFETs with novel high-κ LaLuO3 dielectric as a gate oxide. The energy distribution of interface state density at LaLuO3/Si interface is presented and typical maxima of 1.2×1011 eV–1cm–2 was found at about 0.25 eV from the silicon valence band. The output and transfer characteristics of the n- and p-MOSFET (channel length and width were 1 µm and 50 µm, respectively) are presented. The front channel mobility appeared to be 126 cm2V–1s–1 and 70 cm2V–1s–1 for n- and p-MOSFET, respectively. The front channel threshold voltages as well as the density of states at the back interface are presented.

Analysis of Interface Trap Density and Channel Mobility in 4H-SiC NMOS Capacitors and Lateral MOSFETs

2017 ◽  
Vol 897 ◽  
pp. 115-118
Author(s):  
Martin Domeij ◽  
Jimmy Franchi ◽  
Krister Gumaelius ◽  
K. Lee ◽  
Fredrik Allerstam
Keyword(s):  
Threshold Voltage ◽  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Trap Density ◽  
Interface Trap Density ◽  
Interface Trap ◽  
Subthreshold Slope ◽  
Gate Oxides ◽  
Channel Mobility

Lateral implanted SiC MOSFETs and NMOS capacitors were fabricated and used to extract channel mobility and interface state density DIT for three different gate oxides. DIT values were extracted using the high(1 MHz)-low(1 kHz) method for NMOS capacitors and the subthreshold slope for MOSFETs. The subthreshold slope extraction gave 6-20 times higher DIT values compared to the high-low method, presumably because the high-low method cannot capture the fastest traps [1]. None of the methods resulted in clear proportionality between the inverse channel mobility and DIT. The subthreshold slope gave similar DIT values for samples with different surface p-doping concentrations indicating that the method is not sensitive to the threshold voltage.

Improved Dielectric and Interface Properties of 4H-SiC MOS Structures Processed by Oxide Deposition and N2O Annealing

2006 ◽  
Vol 527-529 ◽  
pp. 987-990 ◽  
Author(s):  
Tsunenobu Kimoto ◽  
H. Kawano ◽  
Masato Noborio ◽  
Jun Suda ◽  
Hiroyuki Matsunami
Keyword(s):  
Breakdown Strength ◽  
Oxide Thickness ◽  
Interface State ◽  
State Density ◽  
Interface Properties ◽  
Gate Oxides ◽  
Channel Mobility ◽  
Oxide Deposition ◽  
Mos Structures

Oxide deposition followed by high-temperature annealing in N2O has been investigated to improve the quality of 4H-SiC MOS structures. Annealing of deposited oxides in N2O at 1300oC significantly enhances the breakdown strength and decreases the interface state density to 3x1011 cm-2eV-1 at EC – 0.2 eV. As a result, high channel mobility of 34 cm2/Vs and 52 cm2/Vs has been attained for inversion-type MOSFETs fabricated on 4H-SiC(0001)Si and (000-1)C faces, respectively. The channel mobility shows a maximum when the increase of oxide thickness during N2O annealing is approximately 5 nm. A lateral RESURF MOSFET with gate oxides formed by the proposed process has blocked 1450 V and showed a low on-resistance of 75 mcm2, which is one of the best performances among lateral SiC MOSFETs reported.

Enhanced Channel Mobility in 4H-SiC MISFETs by Utilizing Deposited SiN/SiO2 Stack Gate Structures

2008 ◽  
Vol 600-603 ◽  
pp. 679-682 ◽  
Author(s):  
Masato Noborio ◽  
Jun Suda ◽  
Tsunenobu Kimoto
Keyword(s):  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Post Deposition Annealing ◽  
Interface Quality ◽  
Channel Mobility ◽  
Capacitance Voltage ◽  
Mis Capacitors ◽  
Post Deposition ◽  
Time Lead

Deposited SiN/SiO2 stack gate structures have been investigated to improve the 4H-SiC MOS interface quality. Capacitance-voltage measurements on fabricated SiN/SiO2 stack gate MIS capacitors have indicated that the interface state density is reduced by post-deposition annealing in N2O at 1300°C. The usage of thin SiN and increase in N2O-annealing time lead to a low interface state density of 1×1011 cm-2eV-1 at EC – 0.2 eV. Oxidation of the SiN during N2O annealing has resulted in improvement of SiC MIS interface. The fabricated SiN/SiO2 stack gate MISFETs demonstrate a high channel mobility of 32 cm2/Vs on (0001)Si face and 40 cm2/Vs on (000-1)C face.

Fabrication and Characterization of 4H-SiC MOSFET with MOCVD-Grown Al2O3 Gate Insulator

2007 ◽  
Vol 556-557 ◽  
pp. 787-790 ◽  
Author(s):  
Shiro Hino ◽  
Tomohiro Hatayama ◽  
Naruhisa Miura ◽  
Tatsuo Oomori ◽  
Eisuke Tokumitsu
Keyword(s):  
Photoelectron Spectroscopy ◽  
Chemical Vapor ◽  
Drain Current ◽  
Interface State ◽  
State Density ◽  
Gate Insulator ◽  
Organic Chemical ◽  
Mos Capacitors ◽  
Significant Difference ◽  
Metal Organic

We have fabricated and characterized MOS capacitors and lateral MOSFETs using Al2O3 as a gate insulator. Al2O3 films were deposited by metal-organic chemical vapor deposition (MOCVD) at temperatures as low as 190 oC using tri-ethyl-aluminum and H2O as precursors. We first demonstrate from the capacitance – voltage (C-V) measurements that the Al2O3/SiC interface has lower interface state density than the thermally-grown SiO2/SiC interface. No significant difference was observed between X-ray photoelectron spectroscopy (XPS) Si 2p spectrum from the Al2O3/SiC interface and that from the SiC substrate, which means the SiC substrate was not oxidized during the Al2O3 deposition. Next, we show that the fabricated lateral SiC-MOSFETs with Al2O3 gate insulator have good drain current – drain voltage (ID-VD) and drain current – gate voltage (ID-VG) characteristics with normally-off behavior. The obtained peak values of field-effect mobility (μFE) are between 68 and 88 cm2/Vs.

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