Conduction Loss Reduction for Bipolar Injection Field-Effect-Transistors (BIFET)

2016 ◽  
Vol 858 ◽  
pp. 917-920 ◽  
Author(s):  
Andreas Hürner ◽  
Heinz Mitlehner ◽  
Tobias Erlbacher ◽  
Anton J. Bauer ◽  
Lothar Frey
Keyword(s):  
Numerical Simulations ◽  
Field Effect ◽  
Room Temperature ◽  
Doping Concentration ◽  
Field Effect Transistors ◽  
Loss Reduction ◽  
Conduction Loss ◽  
Blocking Voltage ◽  
Optimum Doping Concentration ◽  
Channel Region

In this study, the potential of forward conduction loss reduction of Bipolar-Injection Field-Effect-Transistors (SiC-p-BIFET) with an intended blocking voltage of 10kV by adjusting the doping concentration in the channel-region is analyzed. For the optimization of the SiC-p-BIFET, numerical simulations were carried out. Regarding a desired turn-off voltage of approximately 25V, the optimum doping concentration in the channel-region was found to be 1.4x1017cm-3. Based on these results, SiC-p-BIFETs were fabricated and electrically characterized in the temperature range from 25°C up to 175°C. In this study, the differential on-resistance was found to be 110mΩcm2 for a temperature of 25°C and 55mΩcm2 for a temperature of 175°C. In comparison to our former results, a reduction of the differential on-resistance of about 310mΩcm2 at room temperature is demonstrated.

1360 V, 5.0 mΩcm2 Double-Implanted MOSFETs Fabricated on 4H-SiC(000-1)

2010 ◽  
Vol 645-648 ◽  
pp. 987-990 ◽  
Author(s):  
Hiroshi Kono ◽  
Takuma Suzuki ◽  
Makoto Mizukami ◽  
Chiharu Ota ◽  
Shinsuke Harada ◽  
...  
Keyword(s):  
Silicon Carbide ◽  
Field Effect ◽  
Room Temperature ◽  
Field Effect Transistors ◽  
Drain Current ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Gate Bias ◽  
Drain Voltage ◽  
Blocking Voltage

Silicon carbide Double-Implanted Metal-Oxide-Semiconductor Field-Effect Transistors (DIMOSFETs) were fabricated on 4H-SiC (000-1) carbon face. The DIMOSFETs were characterized from room temperature to 250°C. At room temperature, they showed a specific on-resistance of 4.9 mΩcm2 at a gate bias of 20 V and a drain voltage of 1.0 V. The specific on-resistance taken at a drain current (Id) of 260 A/cm2 was 5.0 mΩcm2. The blocking voltage of this device was higher than 1360 V at room temperature. At 250°C, the specific on-resistance increased from 5.0 mΩcm2 to 12.5 mΩcm2 and the threshold voltage determined at Id = 26 mA/cm2 decreased from 5.5 V to 4.3 V.

14.6 mΩcm2 3.3 kV DIMOSFET on 4H-SiC (000-1)

2014 ◽  
Vol 778-780 ◽  
pp. 935-938 ◽  
Author(s):  
Hiroshi Kono ◽  
Masaru Furukawa ◽  
Keiko Ariyoshi ◽  
Takuma Suzuki ◽  
Yasunori Tanaka ◽  
...  
Keyword(s):  
Silicon Carbide ◽  
Field Effect ◽  
Room Temperature ◽  
Field Effect Transistors ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Gate Bias ◽  
Drain Voltage ◽  
Current Spread ◽  
Blocking Voltage

Silicon carbide double-implanted metal-oxide-semiconductor field-effect transistors (DIMOSFETs) were fabricated on 4H-SiC (000-1) carbon face. The effect of current spread layer (CSL) structure was studied. 1.9 mm × 1.9 mm DIMOSFETs were characterized from room temperature to 200°C. At room temperature, the specific on-resistance of this MOSFET was 14.8 mΩcm2 at a gate bias of 20 V and a drain voltage of 0.5 V. The blocking voltage of this MOSFET was 3300 V. At 300 °C, the specific on-resistance increased from 14.8 mΩcm2 to 83.9 mΩcm2 and the threshold voltage decreased from 5.3 V to 3.4 V.

scholarly journals Effects of Doping Concentration on Device Performance of GaN-based Nano-regime MOSFETs

2017 ◽  
Vol 16 (1) ◽  
pp. 69-74
Author(s):  
Md Iktiham Bin Taher ◽  
Md. Tanvir Hasan
Keyword(s):  
Field Effect ◽  
Doping Concentration ◽  
Field Effect Transistors ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Device Performance ◽  
Gate Length ◽  
Drain Voltage ◽  
Switching Device ◽  
Device Applications

Gallium nitride (GaN) based metal-oxide semiconductor field-effect transistors (MOSFETs) are promising for switching device applications. The doping of n- and p-layers is varied to evaluate the figure of merits of proposed devices with a gate length of 10 nm. Devices are switched from OFF-state (gate voltage, VGS = 0 V) to ON-state (VGS = 1 V) for a fixed drain voltage, VDS = 0.75 V. The device with channel doping of 1×1016 cm-3 and source/drain (S/D) of 1×1020 cm-3 shows good device performance due to better control of gate over channel. The ON-current (ION), OFF-current (IOFF), subthreshold swing (SS), drain induce barrier lowering (DIBL), and delay time are found to be 6.85 mA/μm, 5.15×10-7 A/μm, 87.8 mV/decade, and 100.5 mV/V, 0.035 ps, respectively. These results indicate that GaN-based MOSFETs are very suitable for the logic switching application in nanoscale regime.

scholarly journals The gamma-ray irradiation sensitivity and dosimetric information instability of RADFET dosimeter

2013 ◽  
Vol 28 (4) ◽  
pp. 415-421 ◽  
Author(s):  
Milic Pejovic
Keyword(s):  
Threshold Voltage ◽  
Field Effect ◽  
Room Temperature ◽  
Gamma Ray ◽  
Field Effect Transistors ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Threshold Voltage Shift ◽  
Voltage Shift ◽  
Gamma Ray Irradiation

The gamma-ray irradiation sensitivity to radiation dose range from 0.5 Gy to 5 Gy and post-irradiation annealing at room and elevated temperatures have been studied for p-channel metal-oxide-semiconductor field effect transistors (also known as radiation sensitive field effect transistors or pMOS dosimeters) with gate oxide thicknesses of 400 nm and 1 mm. The gate biases during the irradiation were 0 and 5 V and 5 V during the annealing. The radiation and the post-irradiation sensitivity were followed by measuring the threshold voltage shift, which was determined by using transfer characteristics in saturation and reader circuit characteristics. The dependence of threshold voltage shift DVT on absorbed radiation dose D and annealing time was assessed. The results show that there is a linear dependence between DVT and D during irradiation, so that the sensitivity can be defined as DVT/D for the investigated dose interval. The annealing of irradiated metal-oxide-semiconductor field effect transistors at different temperatures ranging from room temperature up to 150?C was performed to monitor the dosimetric information loss. The results indicated that the dosimeters information is saved up to 600 hours at room temperature, whereas the annealing at 150?C leads to the complete loss of dosimetric information in the same period of time. The mechanisms responsible for the threshold voltage shift during the irradiation and the later annealing have been discussed also.

Silicene field-effect transistors operating at room temperature

2015 ◽  
Vol 10 (3) ◽  
pp. 227-231 ◽  
Author(s):  
Li Tao ◽  
Eugenio Cinquanta ◽  
Daniele Chiappe ◽  
Carlo Grazianetti ◽  
Marco Fanciulli ◽  
...  
Keyword(s):  
Field Effect ◽  
Room Temperature ◽  
Field Effect Transistors

Controllable gas selectivity at room temperature based on Ph5T2-modified CuPc nanowire field-effect transistors

2017 ◽  
Vol 48 ◽  
pp. 68-76 ◽  
Author(s):  
Zhiqi Song ◽  
Guoming Liu ◽  
Qingxin Tang ◽  
Xiaoli Zhao ◽  
Yanhong Tong ◽  
...  
Keyword(s):  
Field Effect ◽  
Room Temperature ◽  
Field Effect Transistors ◽  
Gas Selectivity

scholarly journals Understanding of Feedback Field-Effect Transistor and Its Applications

2020 ◽  
Vol 10 (9) ◽  
pp. 3070 ◽  
Author(s):  
Changhoon Lee ◽  
Juho Sung ◽  
Changhwan Shin
Keyword(s):  
Power Consumption ◽  
Positive Feedback ◽  
Field Effect ◽  
Feedback Loop ◽  
Field Effect Transistors ◽  
Memory Device ◽  
Device Structure ◽  
Saturation Region ◽  
Effect Transistor ◽  
Channel Region

Feedback field-effect transistors (FBFETs) are devices based on a positive feedback loop in which the electrons and holes in the channel region act on the energy states of the potential barrier and wall. Owing to the positive feedback phenomenon, FBFETs have an excellent subthreshold swing (~0 mV/decade at 300 K), a high on-/off current ratio (~1010), and a clear saturation region. The power consumption of both the turn-on state and turn-off state is significantly low until operation commences. In addition, the hysteresis caused by the carriers accumulated in the potential wall allows the FBFET to act as a memory device. Moreover, the power consumption of neuromorphic devices can be suppressed by ~100 times with the use of FBFETs. In this work, we analyze the device structure and operating principle of the FBFET and summarize its applications.

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