Advancements in Through Glass Via (TGV) Technology

2015 ◽  
Vol 2015 (DPC) ◽  
pp. 001343-001363
Author(s):  
Aric Shorey ◽  
Rachel Lu ◽  
Scott Pollard ◽  
Ekatarina Kuksenkova ◽  
Gene Smith
Keyword(s):  
Technology Development ◽  
Coefficient Of Thermal Expansion ◽  
Cost Effective ◽  
Mechanical Reliability ◽  
Fabrication Technology ◽  
High Frequencies ◽  
Advanced Packaging ◽  
Downstream Processes ◽  
Electrical Loss ◽  
Made In

Glass provides many opportunities for advanced packaging. The material properties give many opportunities. As an insulator, glass provides advantages in providing low electrical loss, particularly at high frequencies. The relatively high stiffness and ability to adjust coefficient of thermal expansion gives advantages to manage warp in glass core substrates and bonded stacks. Forming processes allow the potential to both form in panel format as well as to form at thicknesses as low as 100 um, giving opportunities to provide cost-effective solutions for the industry. Via fabrication technology development continues to advance providing via diameters < 20 um in size in production ready environment. [1–5] As the industry adopts glass solutions, significant advancements have been made in downstream processes such as glass handling and via/surface metallization. We will provide an update on advancements in these areas as well as handling techniques to achieve desired process flows. There also continues to be increasing amounts of data showing the ability to achieve electrical and thermo-mechanical reliability of substrates with TGV and latest data here will also be provided.

Glass Solutions for Packaging and IoT

2017 ◽  
Vol 2017 (1) ◽  
pp. 000473-000476
Author(s):  
Rachel Lu ◽  
Aric Shorey
Keyword(s):  
Technology Development ◽  
Coefficient Of Thermal Expansion ◽  
Cost Effective ◽  
High Frequencies ◽  
The Past ◽  
Advanced Packaging ◽  
Downstream Processes ◽  
Semiconductor Packaging ◽  
Electrical Loss ◽  
Made In

Abstract The interest in glass as a semiconductor packaging material has continually grown over the past several years. Glass, and its material properties, provides many opportunities for application in advanced packaging. As an insulator, glass is well-suited due to its low electrical loss, particularly at high frequencies. The relatively high stiffness and ability to adjust coefficient of thermal expansion gives the opportunity to better manage warp in glass core substrates as well as bonded stacks, either in carrier or interposer applications. Forming processes allow the potential to both manufacture in a panel format as well as at thicknesses as low as 100 um. Both of these give real opportunity to provide cost-effective packaging solutions. Via fabrication technology development continues to advance providing via diameters < 20 um in size in a production ready environment. As the industry adopts glass solutions, significant advancements have been made in downstream processes such as glass handling and both via and surface metallization. Additionally, data showing the ability to achieve electrical and thermo-mechanical reliability is readily available. Here we provide the latest data on reliability and new product applications for glass-based solutions.

Leveraging Glass Properties for Advanced Packaging

2015 ◽  
Vol 2015 (1) ◽  
pp. 000370-000374
Author(s):  
A.B. Shorey ◽  
Y.J. Lu ◽  
G.A. Smith
Keyword(s):  
Coefficient Of Thermal Expansion ◽  
Cost Effective ◽  
High Frequencies ◽  
Glass Substrates ◽  
Glass Forming ◽  
Cost Structures ◽  
Advanced Packaging ◽  
Downstream Processes ◽  
Electrical Loss ◽  
Made In

Glass provides many opportunities for advanced packaging. The most obvious advantage is given by the material properties. As an insulator, glass has low electrical loss, particularly at high frequencies. The relatively high stiffness and ability to adjust the coefficient of thermal expansion gives advantages to manage warp in glass core substrates and bonded stacks for both through glass vias (TGV) and carrier applications. Glass also gives advantages for developing cost effective solutions. Glass forming processes allow the potential to form both in panel format as well as at thicknesses as low as 100 um, giving opportunities to optimize or eliminate current manufacturing methods. As the industry adopts glass solutions, significant advancements have been made in downstream processes such as glass handling and via/surface metallization. Of particular interest is the ability to leverage tool sets and processes for panel fabrication to enable cost structures desired by the industry. By utilizing the stiffness and adjustable CTE of glass substrates, as well as continuously reducing via size that can be made in a panel format, opportunities to manufacture glass TGV substrates in a panel format increase. We will provide an update on advancements in these areas as well as handling techniques to achieve desired process flows. We will also provide the latest demonstrations of electrical, thermal and mechanical reliability.

Advancements in Glass for Packaging Applications

2016 ◽  
Vol 2016 (DPC) ◽  
pp. 001879-001892
Author(s):  
Kevin Adriance ◽  
Gene Smith ◽  
Aric Shorey ◽  
Rachel Lu ◽  
Gene Smith
Keyword(s):  
Coefficient Of Thermal Expansion ◽  
Cost Effective ◽  
High Frequencies ◽  
Glass Substrates ◽  
Glass Forming ◽  
Cost Structures ◽  
Advanced Packaging ◽  
Downstream Processes ◽  
Electrical Loss ◽  
Made In

Glass provides many opportunities for advanced packaging. The most obvious advantage is given by the material properties. As an insulator, glass has low electrical loss, particularly at high frequencies. The relatively high stiffness and ability to adjust coefficient of thermal expansion gives advantages to manage warp in glass core substrates and bonded stacks for both through glass vias (TGV) and carrier applications. Glass also gives advantages for developing cost effective solutions. Glass forming processes allow the potential to both form in panel format as well as to at thicknesses as low as 100 um, giving opportunities to optimize or eliminate current manufacturing methods. As the industry adopts glass solutions, significant advancements have been made in downstream processes such as glass handling and via/surface metallization. Of particular interest is the ability to leverage tool sets and processes for panel fabrication to enable cost structures desired by the industry. By utilizing the stiffness and adjustable CTE of glass substrates, as well as continuously reducing via size that can be made in a panel format, opportunities to manufacture glass TGV substrates in a panel format increase. We will provide an update on advancements in these areas as well as handling techniques to achieve desired process flows. We will also provide the latest demonstrations of electrical, thermal and mechanical reliability.

Addressing Next Generation Packaging and IoT with Glass Solutions

2017 ◽  
Vol 2017 (DPC) ◽  
pp. 1-19 ◽  
Author(s):  
Aric Shorey ◽  
Rachel Lu ◽  
Gene Smith
Keyword(s):  
Mobile Communications ◽  
Mechanical Performance ◽  
Coefficient Of Thermal Expansion ◽  
Cost Effective ◽  
Electronics Packaging ◽  
Next Generation ◽  
High Frequencies ◽  
Glass Forming ◽  
The Internet Of Things ◽  
Electrical Loss

New requirements are emerging in electronics packaging. The ever-growing need for solutions for mobile communications and sensors that address the Internet of Things (IoT) provide interesting new challenges. RF applications strive to move to higher frequency bands, fan-out technology is being leveraged as an effective way to address interconnect demands, and there is a continuous search for more cost-effective solutions for difficult packaging challenges. Glass provides numerous opportunities to address these needs. As an insulator, glass has low electrical loss, particularly at high frequencies. The relatively high stiffness and ability to adjust coefficient of thermal expansion helps optimize warp in glass core substrates, bonded stacks leveraging TGV and in carrier applications. Glass forming processes allow the potential to both form in panel format as well as at thicknesses as low as 100 um, giving opportunities to optimize or eliminate current manufacturing methods and address packaging challenges in a cost effective way. We will provide the latest demonstrations of electrical, thermal and mechanical performance and reliability, describe areas where glass is being leveraged to achieve goals of next generation products and how properties of different glass types are leveraged by application.

Addressing Next Generation Packaging and IoT with Glass Solutions

2016 ◽  
Vol 2016 (1) ◽  
pp. 000277-000281 ◽  
Author(s):  
Aric Shorey ◽  
Rachel Lu ◽  
Kevin Adriance ◽  
Gene Smith
Keyword(s):  
Mobile Communications ◽  
Mechanical Performance ◽  
Coefficient Of Thermal Expansion ◽  
Cost Effective ◽  
Next Generation ◽  
Glass Forming ◽  
Cost Structures ◽  
Downstream Processes ◽  
The Internet Of Things ◽  
Made In

Abstract New requirements are emerging in electronics packaging. The ever-growing need for solutions for mobile communications and sensors that address the Internet of Things (IoT) brings about interesting new challenges. RF applications strive to move to higher frequency bands, fan-out technology is being leveraged as an effective way to address interconnect demands, and there is a continuous search for more cost-effective solutions for difficult packaging challenges. Glass provides numerous opportunities to address these needs. As an insulator, glass has low electrical loss, particularly at high frequencies. The relatively high stiffness and ability to adjust coefficient of thermal expansion helps optimize warp in glass core substrates, and manage bonded stacks leveraging TGV and carrier applications. Glass forming processes allow to form in a panel format as well as wafer format at thicknesses as low as 100 μm, giving opportunities to optimize or eliminate current polishing type manufacturing methods and address packaging challenges in a cost effective way. As the industry adopts glass solutions, significant advancements have been made in downstream processes such as glass handling and via/surface metallization. Of particular interest is the ability to leverage tool sets and processes for panel fabrication to enable cost structures desired by the industry. We will provide the latest demonstrations of electrical, thermal and mechanical performance and reliability as well as describe areas where glass is being leveraged to achieve goals of next generation products.

Glass Interposer Substrates: Fabrication, Characterization and Modeling

2013 ◽  
Vol 2013 (1) ◽  
pp. 000625-000630 ◽  
Author(s):  
Aric Shorey ◽  
Satish Chaparala ◽  
Scott Pollard ◽  
Garrett Piech ◽  
John Keech
Keyword(s):  
Economies Of Scale ◽  
Functional Performance ◽  
Positive Impact ◽  
Coefficient Of Thermal Expansion ◽  
Electrical Characterization ◽  
Electrical Performance ◽  
Patterned Wafers ◽  
Downstream Processes ◽  
3D Applications ◽  
Made In

There is growing interest in applying glass as a substrate for 2.5D/3D applications. Glass has many material properties that make it well suited for interposer substrates. Glass based solutions provide significant opportunities for cost reduction by leveraging economies of scale as well as forming substrates at design thickness. A lot of work is being done to validate the value of glass as an interposer substrate. One important area is the electrical performance of glass relative to silicon. Because glass is an insulator, an interposer made with glass should have better electrical performance than one made with silicon. Electrical characterization and electrical models confirm this advantage, and its positive impact on functional performance. Further advantages are anticipated in reliability, driven by the ability to tailor thermal properties such as coefficient of thermal expansion (CTE) of glass. Modeling results will be presented that show how the proper choice of CTE can significantly lower stack warpage. Additionally, significant progress has been made in the demonstration of glass interposer fabrication. Fully patterned wafers and panels with through holes and blind holes are being fabricated today. It is equally important to be able to demonstrate the ability to leverage existing downstream processes for metallization of these substrates. The ability to apply existing downstream processes to make functional glass interposers using both through and blind via technology will be presented.

Parallel-Path Compliant Structures as Electrical Interconnects

2010 ◽  
Author(s):  
Raphael Okereke ◽  
Karan Kacker ◽  
Suresh K. Sitaraman
Keyword(s):  
Coefficient Of Thermal Expansion ◽  
Cost Effective ◽  
Dielectric Materials ◽  
High Yield ◽  
Mechanical Reliability ◽  
Parallel Path ◽  
Fine Pitch ◽  
Solder Bumps ◽  
Compliant Interconnect ◽  
Low K

The coefficient of thermal expansion (CTE) mismatch between a die and an organic substrate generates high stresses in the die when underfilled solder bumps are used. These high stresses could crack or delaminate low-K dielectric materials in the next-generation flip-chip devices. In addition to such on-chip failures, the solder interconnects could fail due to thermo-mechanical fatigue, especially when the interconnect dimensions are scaled down to meet fine-pitch requirements. To address these reliability issues, compliant interconnects have been proposed to alleviate the thermo-mechanical stresses in the chip assembly. Some of the challenges to be addressed with compliant interconnects are: higher electrical parasitic compared to solder bumps, cost-effective fabrication, and high-yield, fine-pitch assembly process. This paper presents a study on a parallel-path compliant interconnect design which attempts to balance between mechanical compliance and electrical parasitics by using multiple electrical paths in place of a single electrical path. The high compliance of the parallel-path compliant interconnect structure will ensure the reliability of low-K dies. Also, these interconnects can be cost effective by using a wafer-level process and by eliminating the underfill process. Although an underfill is not required for thermo-mechanical reliability purposes, an underfill may be used for reducing contamination and oxidation of the interconnects and also to provide additional rigidity against mechanical loads. Therefore, this paper also examines the role of an underfill on the thermo-mechanical reliability of a parallel-path compliant interconnect.

Signal Processing Enhanced Fiber Vibration Sensors

2013 ◽  
Vol 543 ◽  
pp. 302-305
Author(s):  
Daniele Tosi ◽  
Massimo Olivero ◽  
Alberto Vallan ◽  
Guido Perrone
Keyword(s):  
Signal Processing ◽  
Optical Fibers ◽  
Adaptive Filters ◽  
Spectral Estimation ◽  
Cost Effective ◽  
Fiber Sensors ◽  
High Frequencies ◽  
Vibration Sensors ◽  
Signal Processing Algorithms ◽  
Plastic Optical Fibers

The paper analyzes the feasibility of cost-effective fiber sensors for the measurement of small vibrations, from low to medium-high frequencies, in which the complexity of the measurement is moved from expensive optics to cheap electronics without losing too much performance thanks to signal processing algorithms. Two optical approaches are considered: Bragg gratings in standard telecom fibers, which represent the most common type of commercial fiber sensors, and specifically developed sensors made with plastic optical fibers. In both cases, to keep the overall cost low, vibrations are converted into variations of the light intensity, although this makes the received signal more sensitive to noise. Then, adaptive filters and advanced spectral estimation techniques are used to mitigate noise and improve the sensitivity. Preliminary results have demonstrated that the combined effect of these techniques can yield to a signal-to-noise improvement of about 30 dB, bringing the proposed approaches to the level of the most performing sensors for the measurement of vibrations.

scholarly journals NOD: a web server to predict New use of Old Drugs to facilitate drug repurposing

2021 ◽  
Vol 11 (1) ◽  
Author(s):  
Tarun Jairaj Narwani ◽  
Narayanaswamy Srinivasan ◽  
Sohini Chakraborti
Keyword(s):  
Chemical Space ◽  
Web Server ◽  
Drug Repurposing ◽  
Cost Effective ◽  
Evolutionary Information ◽  
Cost Effective Alternative ◽  
Similarity Searches ◽  
Old Drugs ◽  
Control Study ◽  
Made In

AbstractComputational methods accelerate the drug repurposing pipelines that are a quicker and cost-effective alternative to discovering new molecules. However, there is a paucity of web servers to conduct fast, focussed, and customized investigations for identifying new uses of old drugs. We present the NOD web server, which has the mentioned characteristics. NOD uses a sensitive sequence-guided approach to identify close and distant homologs of a protein of interest. NOD then exploits this evolutionary information to suggest potential compounds from the DrugBank database that can be repurposed against the input protein. NOD also allows expansion of the chemical space of the potential candidates through similarity searches. We have validated the performance of NOD against available experimental and/or clinical reports. In 65.6% of the investigated cases in a control study, NOD is able to identify drugs more effectively than the searches made in DrugBank. NOD is freely-available at http://pauling.mbu.iisc.ac.in/NOD/NOD/.

Neonatal Cholestasis: Updates on Diagnostics, Therapeutics, and Prevention

NeoReviews ◽  
2021 ◽  
Vol 22 (12) ◽  
pp. e819-e836
Author(s):  
Amy G. Feldman ◽  
Ronald J. Sokol
Keyword(s):  
Liver Disease ◽  
Biliary Atresia ◽  
Young Infant ◽  
Management Strategies ◽  
Bloodstream Infections ◽  
Cost Effective ◽  
Central Line ◽  
Primary Indication ◽  
Effective Diagnosis ◽  
Made In

Cholestatic jaundice is a common presenting feature of hepatobiliary and/or metabolic dysfunction in the newborn and young infant. Timely detection of cholestasis, followed by rapid step-wise evaluation to determine the etiology, is crucial to identify those causes that are amenable to medical or surgical intervention and to optimize outcomes for all infants. In the past 2 decades, genetic etiologies have been elucidated for many cholestatic diseases, and next-generation sequencing, whole-exome sequencing, and whole-genome sequencing now allow for relatively rapid and cost-effective diagnosis of conditions not previously identifiable via standard blood tests and/or liver biopsy. Advances have also been made in our understanding of risk factors for parenteral nutrition–associated cholestasis/liver disease. New lipid emulsion formulations, coupled with preventive measures to decrease central line–associated bloodstream infections, have resulted in lower rates of cholestasis and liver disease in infants and children receiving long-term parental nutrition. Unfortunately, little progress has been made in determining the exact cause of biliary atresia. The median age at the time of the hepatoportoenterostomy procedure is still greater than 60 days; consequently, biliary atresia remains the primary indication for pediatric liver transplantation. Several emerging therapies may reduce the bile acid load to the liver and improve outcomes in some neonatal cholestatic disorders. The goal of this article is to review the etiologies, diagnostic algorithms, and current and future management strategies for infants with cholestasis.

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