Meander Delay Compensation in High-Speed Digital Multilayer Packages

2012 ◽  
Vol 2012 (1) ◽  
pp. 000334-000339 ◽  
Author(s):  
Robert Frye ◽  
Kai Liu
Keyword(s):  
High Speed ◽  
Printed Circuit Boards ◽  
Printed Circuit Board ◽  
Circuit Board ◽  
Propagation Time ◽  
Design Tools ◽  
Delay Compensation ◽  
Printed Circuit ◽  
Bga Packages ◽  
Timing Skew

The routing of multi-trace digital signal buses in printed circuit boards often results in mismatches in the lengths of the lines. This results in mismatched propagation time, referred to as “timing skew” in a digital system. A common method that is used to compensate for this is to add meander sections of line to lengthen the signal path length. Many advanced circuit board design tools have the capability to perform this compensation automatically. Advanced Ball Grid Array (BGA) packages are fabricated using fine-line multilayer laminate substrates or they are built up using multilayer wafer-scale processes. The design tools for these types of packages have evolved from printed circuit board tools and typically use the same methods and principles. It is very common in BGA packages for high-speed digital applications to use meander trace patterns to match the trace lengths of high speed bus interconnections either from the chip to the solder balls or between chips in a multi-chip package. However, electromagnetic simulation of these packages shows that despite the use of these techniques to match the physical length of the traces, electrical lengths often vary by as much as a factor of two. Examples of such packages are presented and analyzed. The resulting timing skew is not a significant problem in most current applications, since the overall delay is small compared with the clock interval. But with emerging applications pushing well beyond 10Gb/s, timing skew in packages will be an important consideration. The reasons for the ineffectiveness of meander delay compensation are discussed, and are demonstrated by some simple simulations.

Excimer Laser Drill for Multilayer Printed Circuit Boards: From Advanced Development to Factory Floor

MRS Bulletin ◽  
1989 ◽  
Vol 14 (12) ◽  
pp. 49-53 ◽  
Author(s):  
Friedrich Bachmann
Keyword(s):  
Excimer Laser ◽  
High Speed ◽  
Large Scale ◽  
Printed Circuit Boards ◽  
Printed Circuit Board ◽  
Circuit Board ◽  
Multichip Module ◽  
Circuit Boards ◽  
Printed Circuit ◽  
Delay Times

A novel excimer laser process has been developed for generating cylindrical via holes with an aspect ratio of about one. The fabrication process is being successfully run on a production line for a highly miniaturized printed circuit board used for the multichip module in the new Siemens 7500 H 90 mainframe computer. The process is outstanding in terms of reliability and reproducibility. To the best of our knowledge, this is the first that that excimer lasers have been put into large-scale use in an industrial environment.Since signal delay times for chips have decreased much more rapidly than delay times for packaging, the computing speed of high-speed computers is restricted by the packaging techniques used. Therefore, further development of packaging technology became a prime objective for those developing high-performance computers. Packaging delay times had to be reduced drastically to keep up with increasingly shorter chip delay times. This, in effect, meant that a greater packaging density had to be implemented.A novel planar packaging technique has lead to considerable progress in solving this problem. This technique has been described in detail elsewhere. A key component in this technology is a multichip module, which can take in each of 16 areas, either an LSI module with 320 leads or 9 MSI modules with 52 leads as “bare” ICs. This means that a micro-wiring printed circuit board of this kind can accomodate between 16 (LSI) and 144 (MSI) chips. This article describes how these printed circuit boards are manufactured.As the specifications (Table I) show, blind vias 80 μm in diameter at a pitch of 0.5 mm have to be made in a 16-layer printed circuit board. It is intended that these blind vias will provide the through-contact for neighboring layers. The excimer laser plays a major role in this process.

An Analysis of the Errors Involved in Component Pick Up and Registration for Automated Printed Circuit Board Assembly

1991 ◽  
Vol 113 (1) ◽  
pp. 101-107 ◽  
Author(s):  
T. Radhakrishnan ◽  
S. M. Hegde
Keyword(s):  
High Speed ◽  
Printed Circuit Boards ◽  
Printed Circuit Board ◽  
General Purpose ◽  
Circuit Board ◽  
Intermediate Step ◽  
Printed Circuit Board Assembly ◽  
Critical System ◽  
Printed Circuit ◽  
Circuit Board Assembly

In the high-speed, automated assembly of printed circuit boards, sufficient accuracy of the assembler system is required to enable proper component insertion without jamming. An important intermediate step in the assembly process, particularly with a general-purpose (flexible) assembler, is the registration of a component. The various error sources contributing to component mis-registration are identified and mathematical relationships between them are developed in this study. Using these relationships in a computer program, appropriate sizes and tolerances for the critical system parameters can be determined for successful component registration and assembly.

scholarly journals Comparative Study of Crosstalk Reduction Techniques in RF Printed Circuit Board Using FDTD Method

2015 ◽  
Vol 2015 ◽  
pp. 1-9
Author(s):  
Rajeswari Packianathan ◽  
Raju Srinivasan
Keyword(s):  
High Speed ◽  
Printed Circuit Boards ◽  
Printed Circuit Board ◽  
Electromagnetic Coupling ◽  
Fdtd Method ◽  
Numerical Results ◽  
Circuit Board ◽  
Good Correspondence ◽  
Printed Circuit ◽  
Simulation Results

Miniaturization of the feature size in modern electronic circuits results from placing interconnections in close proximity with a high packing density. As a result, coupling between the adjacent lines has increased significantly, causing crosstalk to become an important concern in high-performance circuit design. In certain applications, microstriplines may be used in printed circuit boards for propagating high-speed signals, rather than striplines. Here, the electromagnetic coupling effects are analyzed for various microstrip transmission line structures, namely, microstriplines with a guard trace, double stub microstriplines, and parallel serpentine microstriplines using the finite-difference time-domain method. The numerical results are compared with simulation results, where the variants are simulated using an Ansoft high-frequency structure simulator. The analysis and simulation results are experimentally validated by fabricating a prototype and establishing a good correspondence between them. Numerical results are compared with simulation and experimental results, showing that double stub microstriplines reduce the far end crosstalk by 7 dB and increase the near end crosstalk by about 2 dB compared with the parallel microstriplines. Parallel serpentine microstriplines reduce the far end crosstalk by more than 10 dB and also reduce more than 15 mV of peak far end crosstalk voltage, compared with parallel microstriplines.

Dielectric Breakdown in Printed Circuit Boards at Elevated Temperatures

1996 ◽  
Author(s):  
P. Singh ◽  
G.T. Galyon ◽  
J. Obrzut ◽  
W.A. Alpaugh
Keyword(s):  
Experimental Data ◽  
Thermal Degradation ◽  
Printed Circuit Boards ◽  
Printed Circuit Board ◽  
Elevated Temperatures ◽  
Dielectric Breakdown ◽  
Circuit Board ◽  
Circuit Boards ◽  
Printed Circuit ◽  
Data Matching

Abstract A time delayed dielectric breakdown in printed circuit boards, operating at temperatures below the epoxy resin insulation thermo-electrical limits, is reported. The safe temperature-voltage operating regime was estimated and related to the glass-rubber transition (To) of printed circuit board dielectric. The TG was measured using DSC and compared with that determined from electrical conductivity of the laminate in the glassy and rubbery state. A failure model was developed and fitted to the experimental data matching a localized thermal degradation of the dielectric and time dependency. The model is based on localized heating of an insulation resistance defect that under certain voltage bias can exceed the TG, thus, initiating thermal degradation of the resin. The model agrees well with the experimental data and indicates that the failure rate and truncation time beyond which the probability of failure becomes insignificant, decreases with increasing glass-rubber transition temperature.

scholarly journals Estimating Recycling Return of Integrated Circuits Using Computer Vision on Printed Circuit Boards

2021 ◽  
Vol 11 (6) ◽  
pp. 2808
Author(s):  
Leandro H. de S. Silva ◽  
Agostinho A. F. Júnior ◽  
George O. A. Azevedo ◽  
Sergio C. Oliveira ◽  
Bruno J. T. Fernandes
Keyword(s):  
Integrated Circuits ◽  
Printed Circuit Boards ◽  
Printed Circuit Board ◽  
Electronic Waste ◽  
Decision Criterion ◽  
Economic Feasibility ◽  
Electronic Equipment ◽  
Circuit Board ◽  
Mechanical Recycling ◽  
Printed Circuit

The technological growth of the last decades has brought many improvements in daily life, but also concerns on how to deal with electronic waste. Electrical and electronic equipment waste is the fastest-growing rate in the industrialized world. One of the elements of electronic equipment is the printed circuit board (PCB) and almost every electronic equipment has a PCB inside it. While waste PCB (WPCB) recycling may result in the recovery of potentially precious materials and the reuse of some components, it is a challenging task because its composition diversity requires a cautious pre-processing stage to achieve optimal recycling outcomes. Our research focused on proposing a method to evaluate the economic feasibility of recycling integrated circuits (ICs) from WPCB. The proposed method can help decide whether to dismantle a separate WPCB before the physical or mechanical recycling process and consists of estimating the IC area from a WPCB, calculating the IC’s weight using surface density, and estimating how much metal can be recovered by recycling those ICs. To estimate the IC area in a WPCB, we used a state-of-the-art object detection deep learning model (YOLO) and the PCB DSLR image dataset to detect the WPCB’s ICs. Regarding IC detection, the best result was obtained with the partitioned analysis of each image through a sliding window, thus creating new images of smaller dimensions, reaching 86.77% mAP. As a final result, we estimate that the Deep PCB Dataset has a total of 1079.18 g of ICs, from which it would be possible to recover at least 909.94 g of metals and silicon elements from all WPCBs’ ICs. Since there is a high variability in the compositions of WPCBs, it is possible to calculate the gross income for each WPCB and use it as a decision criterion for the type of pre-processing.

Evaluation of new technologies and materials for printed circuit boards with improved heat dissipation properties

Circuit World ◽  
2016 ◽  
Vol 42 (1) ◽  
pp. 32-36 ◽  
Author(s):  
Michal Baszynski ◽  
Edward Ramotowski ◽  
Dariusz Ostaszewski ◽  
Tomasz Klej ◽  
Mariusz Wojcik ◽  
...  
Keyword(s):  
Thermal Properties ◽  
Printed Circuit Boards ◽  
Heat Dissipation ◽  
Printed Circuit Board ◽  
New Technologies ◽  
Electronic Device ◽  
Circuit Board ◽  
New Materials ◽  
Content Type ◽  
Printed Circuit

Purpose – The purpose of this paper is to evaluate thermal properties of printed circuit board (PCB) made with use of new materials and technologies. Design/methodology/approach – Four PCBs with the same layout but made with use of different materials and technologies have been investigated using thermal camera to compare their thermal properties. Findings – The results show how important the thermal properties of PCBs are for providing effective heat dissipation, and how a simple alteration to the design can help to improve the thermal performance of electronic device. Proper layout, new materials and technologies of PCB manufacturing can significantly reduce the temperature of electronic components resulting in higher reliability of electronic and power electronic devices. Originality/value – This paper shows the advantages of new technologies and materials in PCB thermal management.

scholarly journals A Study on the Radiated Susceptibility of Printed Circuit Boards and the Effects of Via Fencing

Electronics ◽  
2021 ◽  
Vol 10 (5) ◽  
pp. 539
Author(s):  
Ryan P. Tortorich ◽  
William Morell ◽  
Elizabeth Reiner ◽  
William Bouillon ◽  
Jin-Woo Choi
Keyword(s):  
Printed Circuit Boards ◽  
Printed Circuit Board ◽  
Ground Plane ◽  
Circuit Board ◽  
Electronic Systems ◽  
Coupling Mechanism ◽  
Electromagnetic Modeling ◽  
Printed Circuit ◽  
Edge Radiation ◽  
Area Of Concern

Because modern electronic systems are likely to be exposed to high intensity radiated fields (HIRF) environments, there is growing interest in understanding how electronic systems are affected by such environments. Backdoor coupling in particular is an area of concern for all electronics, but there is limited understanding about the mechanisms behind backdoor coupling. In this work, we present a study on printed circuit board (PCB) backdoor coupling and the effects of via fencing. Existing work focuses on ideal stackups and indicates that edge radiation is significantly reduced by via fencing. In this study, both full wave electromagnetic modeling and experimental verification are used to investigate both ideal and practical PCB stackups. In the ideal scenario, we find that via fencing substantially reduces coupling, which is consistent with prior work on emissions. In the practical scenario, we incorporate component footprints and traces which naturally introduce openings in the top ground plane. Both simulation and experimental data indicate that via fencing in the practical scenario does not substantially mitigate coupling, suggesting that PCB edge coupling is not the dominant coupling mechanism, even at varying angles of incidence and polarization.

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