Analysis of the Wire Bonding Joints of an IGBT Module

2003 ◽  
Author(s):  
Takayoshi Kuriyama ◽  
Nobuaki Inagaki ◽  
Mikio Shirai ◽  
Masaaki Tada
Keyword(s):  
2019 ◽  
Vol 36 (1) ◽  
pp. 47-54
Author(s):  
C. C. Yang ◽  
Y. F. Su ◽  
Steven Y. Liang ◽  
K. N. Chiang

ABSTRACTThermosonic wire bonding is a common fabrication process for connecting devices in electronic packaging. However, when the free air ball (FAB) is compressed onto the I/O pad of the chip during bonding procedure, chip cracking may occur if the contact pressure is too large. This study proposes an effective simulation technique that can predict the wire ball geometry after bonding in an accurate range. The contact force obtained in the simulation can be used for possible die cracking behavior evaluation. The simulation in this study used the explicit time integration scheme to deal with the time marching problem, and the second-order precision arbitrary Lagrangian-Eulerian (ALE) algorithm was used to deal with the large deformation of the wire ball during the bonding process. In addition, the equilibrium smoothing algorithm in LS-DYNA can make the contact behavior and geometry of the bonding wire almost the same as the experiment, which can also significantly reduce the distortion of the mesh geometry after remeshing.


1994 ◽  
Vol 116 (1) ◽  
pp. 44-48 ◽  
Author(s):  
M. A. Jog ◽  
I. M. Cohen ◽  
P. S. Ayyaswamy

We have analyzed an electric discharge between wire and planar electrodes with wire diameter and current densities that are typically used in upscaled experimental simulations of the wire bonding process employed in microelectronic manufacturing. A set of continuum conservation equations has been solved to obtain the variation of electric potential, temperature distributions, and the electrode heat fluxes. Results indicate that the main body of the discharge is quasineutral bounded by space charge sheaths at both electrodes. Strong electric fields are concentrated in the electrode sheaths. The heat flux to the wire is sharply peaked near the wire tip but on the plane it decays slowly away from the discharge axis. The model studied here may be used to establish optimum discharge parameters for wire bonding.


2014 ◽  
Vol 609-610 ◽  
pp. 1153-1158
Author(s):  
Dong Rui Wang ◽  
Mei Liu

The wire bonding process in the package of MEMS accelerometer is analyzed by the finite element software ANSYS/LS-DYNA. Impact on the bonding strength of the ultrasonic amplitude, ultrasonic frequency and the friction between wire bond and bond pad are studied. The strength of wire bond is evaluated through the bond pull test experiment. The test result shows that the analysis on the wire bonding is helpful for improving the quality of wire bonding.


Author(s):  
Valentina Korchnoy

Abstract Bond-pad integrity directly affects the performance of microelectronic devices. Bond-pad cracking and the related sub-pad cracking of Inter-Metal Dielectric (IMD) may introduce a high reliability risk and cause units to fail at environmental stress. Bond-pad cracks may be initiated by probing during wafer sort and the wire bonding process during assembly. This paper presents a comparative analysis of the various chemistries used for exposure and decoration of pad cracks. The investigation showed that a tri-iodine etch provides clean and artifact-free exposure of the TiN barrier layer of the pad and is the best (of the methods tried herein) for pad crack observation.


Author(s):  
Wentao Qin ◽  
Tom Anderson ◽  
George Chang ◽  
Harold Anderson ◽  
Denise Barrientos

Abstract Coating of the Cu bond wire with Pd has been a rather widely accepted method in semiconductor packaging to improve the wire bonding reliability. Based on comparison of a Cu bond wire and a Pd-coated Cu bond wire on AlCu pads that had passed HAST, new insight into the mechanism of the reliability improvement is gained. Our analysis showed the dominant Cu-rich intermetallics (IMC) were Cu3Al2 for the Cu wire, and (CuPdx)Al for the Pd-coated wire. The results have verified the Cu-rich IMC being suppressed by the Pd-coating, which has been extensively reported in literature. Binary phase diagrams of Al, Cu, and Pd indicate that the addition of Pd elevates the melting point and bond strength of (CuPdx)Al compared with CuAl that formed with the bare Cu wire. The improvements are expected to decrease the kinetics of phase transformation toward the more Cu-rich IMC. With the suppression of the Cu-rich IMC, the corrosion resistance of the wire bonding is enhanced and the wire bonding reliability improved. We find that Ni behaves thermodynamically quite similar to Pd in the ternary system of Cu wire bonding, and therefore possesses the potential to improve the corrosion resistance.


2006 ◽  
Vol 3 (1) ◽  
pp. 1-11 ◽  
Author(s):  
Chu-Chung (Stephen) Lee ◽  
Tu Anh Tran ◽  
Bill Williams ◽  
Jody Ross

The drive for enhanced electrical performance and reduced silicon area has triggered significant changes in wafer fabrication, wafer level testing, and packaging technologies. In the wafer fabrication era, copper is quickly replacing aluminum as the interconnect metal of choice for technologies 0.13μm and below. To overcome the difficulty of wire bonding onto readily oxidized copper bond pads, capping copper bond pads with aluminum has been the industry standard method for wire bonding. In terms of wafer level testing and packaging, the resulting fine pitch geometry has created challenges for both cantilever probe and wire bond processes. Pad damage due to probe marks during probe process has been shown to cause “non-sticks” and “lifted bonds” at the wire bonding process. The wire bond yield loss due to pad damage is aggravated for fine pitch since increasingly smaller bonded ball diameters are formed on top of the same damage area caused by the probe mark. Wire Bond parameter optimization can minimize wire bond yield loss but cannot eliminate the problem. One logical solution is to lengthen the bond pad to create separate regions for probing and wire bonding. However, this method can result in a larger die size. This paper will reveal a unique bond pad structure that provides separate regions but yet results in no impact to the existing die size. This bond pad structure utilizes the aluminum cap layer to create a longer bond pad without changing the size of the underlying copper last metal, resulting in no impact to the existing die size. Evaluations were conducted on 0.13μm CMOS technology, with cantilever probing and wire bonding on 52μm bond pad size. Failure analysis and test methods to detect failures will be discussed. Designs of experiments for probing and wire bonding processes, characterization studies, and reliability results will be presented. Furthermore, a unique Extended Armored Pad (EAP) has been introduced for the purpose of reducing the Ta-Cu interface area under the Aluminum bond pad region because the Ta-Cu adhesion is known to be one of the weakest interfaces for Cu-interconnect BEOL processes.


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