scholarly journals Performance of a 2048 × 2048 Pixel Three-Side-Buttable CCD Designed for Large Focal Planes in Astronomy

1995 ◽  
Vol 167 ◽  
pp. 295-296
Author(s):  
J. A. Cortiula
Keyword(s):  
Conversion Factor ◽  
Event Rate ◽  
Operating Mode ◽  
Packaging Material ◽  
Low Noise ◽  
Low Power Consumption ◽  
New Device ◽  
On Chip ◽  
Specific Care ◽  
Better Than

TH78997M is a 2048 × 2048 pixel full-frame CCD sensor featuring 15 × 15 micron pixels, MPP operating mode, four parallel outputs and buttability on three sides. This new device makes it possible to build very large focal plane detectors for telescopes (two × n butted CCDs) with less than a 25 dead pixel zone between adjacent sensors. Other features are high full-well capacity (typically 180 Ke−) and very low dark current thanks to four phase MPP clocking which allows a very long exposure time together with a high S/N ratio.The readout of a complete frame is achieved through four parallel outputs running at frequencies ranging from ten KHz up to five MHz per output. The four on-chip amplifiers have been designed to be completely user controlled and to meet most of terrestrial and spaceborne astronomy requirements: very low noise (less than 4e− at 50 KHz, −40 degrees C), very low power consumption (150 micro-W/amplifier at 10 KHz/output), linearity better than 0.5% together with high conversion factor (4.2 micro-V/e−) over 2.5 V output range. The packaging of the device is compatible with the good flatness of the chip and with the low parasitic “cosmic event” rate thanks to specific care in selecting the packaging material.

scholarly journals A SiGe 3-stage LNA for automotive radar application from 76 to 81 GHz

2019 ◽  
Vol 30 ◽  
pp. 01004
Author(s):  
Vadim Budnyaev ◽  
Valeriy Vertegel
Keyword(s):  
Noise Figure ◽  
Low Noise ◽  
Low Power Consumption ◽  
Automotive Radar ◽  
W Band ◽  
Bicmos Technology ◽  
Sige Bicmos ◽  
Noise Amplifier ◽  
Layout Area ◽  
Better Than

This paper presents the simulation results of the W-band 3-stage low noise amplifier which is designed in 0.13 μm SiGe BiCMOS technology. The LNA achieves a peak S21 of 24.1 dB and noise figure of 6 dB at 80 GHz with 3 dB bandwidth of 14 GHz from 73 to 87 GHz. S11 is better than 11 dB. The simulated input 1 dB compression point is –23 dBm at 80 GHz with low power consumption of 26 mW from 1.2 V voltage supply. Layout area is 0.36 mm2.

A Low Power and Low Noise On-Chip Active RF Tracking Filter for Digital TV Tuner ICs

2011 ◽  
Vol E94-C (10) ◽  
pp. 1698-1701
Author(s):  
Yang SUN ◽  
Chang-Jin JEONG ◽  
In-Young LEE ◽  
Sang-Gug LEE
Keyword(s):  
Low Power ◽  
Digital Tv ◽  
Low Noise ◽  
On Chip ◽  
Tracking Filter

scholarly journals Ultracompact and low-power-consumption silicon thermo-optic switch for high-speed data

Nanophotonics ◽  
2020 ◽  
Vol 10 (2) ◽  
pp. 937-945
Author(s):  
Ruihuan Zhang ◽  
Yu He ◽  
Yong Zhang ◽  
Shaohua An ◽  
Qingming Zhu ◽  
...  
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
High Speed ◽  
High Performance ◽  
Pulse Amplitude ◽  
Telecommunication Networks ◽  
Low Power Consumption ◽  
Power Efficient ◽  
High Speed Data ◽  
On Chip

AbstractUltracompact and low-power-consumption optical switches are desired for high-performance telecommunication networks and data centers. Here, we demonstrate an on-chip power-efficient 2 × 2 thermo-optic switch unit by using a suspended photonic crystal nanobeam structure. A submilliwatt switching power of 0.15 mW is obtained with a tuning efficiency of 7.71 nm/mW in a compact footprint of 60 μm × 16 μm. The bandwidth of the switch is properly designed for a four-level pulse amplitude modulation signal with a 124 Gb/s raw data rate. To the best of our knowledge, the proposed switch is the most power-efficient resonator-based thermo-optic switch unit with the highest tuning efficiency and data ever reported.

Pigmented aqueous barrier coatings

TAPPI Journal ◽  
2020 ◽  
Vol 19 (11) ◽  
pp. 551-558
Author(s):  
ANTHONY V. LYONS ◽  
GREGG REED
Keyword(s):  
Barrier Function ◽  
Packaging Material ◽  
Physical Characteristics ◽  
Packaging Materials ◽  
Functional Coatings ◽  
Barrier Coatings ◽  
Coating Performance ◽  
Fundamental Understanding ◽  
Sustainable Packaging ◽  
Better Than

The desire for more sustainable packaging has led to the development of new packaging materials that are fiber based. Aqueous coatings are a pathway to improve the recyclability of these materials. Pigments used in these coatings can improve the performance of the coating and reduce cost while further improving the recyclability. Mineral pigments are also considered to be compost neutral. In this paper, we provide the reader a better fundamental understanding of the mechanisms by which pigments work in barrier coatings. A pigment’s mineralogy and physical characteristics are important to how it will perform, and there have been recent pigment developments that improve coating performance. This paper shows that some pigments are better than others in particular barrier applications. Also, pigmented base or pre-coats can be used to prepare the surface for more highly functional coatings that go on top, improving the barrier function of packaging material and reducing overall cost. Finally, the converting operation is of major importance in driving formulation choices for barrier applications.

scholarly journals A 2.4 GHz low noise amplifier design at 130nm CMOS technology using common gate topology for WiFi / WiMAX application

2017 ◽  
Vol 7 (1.3) ◽  
pp. 69
Author(s):  
M. Ramana Reddy ◽  
N.S Murthy Sharma ◽  
P. Chandra Sekhar
Keyword(s):  
Noise Figure ◽  
Cmos Technology ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Low Power Consumption ◽  
Common Gate ◽  
Chip Size ◽  
Overall Performance ◽  
Amplifier Design ◽  
Noise Amplifier

The proposed work shows an innovative designing in TSMC 130nm CMOS technology. A 2.4 GHz common gate topology low noise amplifier (LNA) using an active inductor to attain the low power consumption and to get the small chip size in layout design. By using this Common gate topology achieves the noise figure of 4dB, Forward gain (S21) parameter of 14.7dB, and the small chip size of 0.26 mm, while 0.8mW power consuming from a 1.1V in 130nm CMOS gives the better noise figure and improved the overall performance.

scholarly journals Reconfigurable on-chip communication link for efficient communication

2018 ◽  
Vol 7 (2-1) ◽  
pp. 417
Author(s):  
Beulah Hemalatha S ◽  
Vigneswaran T
Keyword(s):  
Genetic Algorithm ◽  
Power Consumption ◽  
Low Power ◽  
Optimization Problems ◽  
Research Area ◽  
Low Power Consumption ◽  
Communication Link ◽  
Simulated System ◽  
Efficient Communication ◽  
On Chip

Application specific reconfiguration of On-chip communication link is a fast growing research area in system on chip (SoC) based system design. Optimization of the communication link is important to achieve a trade-off between efficient communication and low power consumption. So achieving both efficient communication and low power consumption requires a special optimization mechanism. Such Optimization problems can be solved using a genetic algorithm. Here, in this paper genetic algorithm based On-chip communication link reconfiguration is presented. The algorithm will optimize efficiency of communication link with constrain of low power consumption. The parameters involved in power consumption and efficient communication link are coded in the chromosomes. By evolutionary iteration the optimal parameters of the communication link are derived that is used for the communication link successfully in the simulated system. The performance of the simulated system is analyzed which shows the out performance of the proposed system.

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