Impact of Substrate and Process on the Electrical Performance of Screen-Printed Nickel Electrodes: Fundamental Mechanism of Ink Film Roughness

2018 ◽  
Vol 1 (12) ◽  
pp. 7164-7173 ◽  
Author(s):  
Bilge Nazli Altay ◽  
Jerome Jourdan ◽  
Vikram S. Turkani ◽  
Hervé Dietsch ◽  
Dinesh Maddipatla ◽  
...  

2021 ◽  
Vol 130 (11) ◽  
pp. 115304
Author(s):  
G. Cahn ◽  
O. N. Pierron ◽  
A. Antoniou


2016 ◽  
Vol 33 (3) ◽  
pp. 172-175 ◽  
Author(s):  
Kazimierz Drabczyk ◽  
Jaroslaw Domaradzki ◽  
Grazyna Kulesza-Matlak ◽  
Marek Lipinski ◽  
Danuta Kaczmarek

Purpose The purpose of this paper was investigation and comparison of electrical and optical properties of crystalline silicon solar cells with ITO or TiO2 coating. The ITO, similar to TiO2, is very well transparent in the visible part of optical radiation; however, its low resistivity (lower that 10-3 Ohm/cm) makes it possible to use simultaneously as a transparent electrode for collection of photo-generated electrical charge carriers. This might also invoke increasing the distance between screen-printed metal fingers at the front of the solar cell that would increase of the cell’s active area. Performed optical investigation showed that applied ITO thin film fulfill standard requirements according to antireflection properties when it was deposited on the surface of silicon solar cell. Design/methodology/approach Two sets of samples were prepared for comparison. In the first one, the ITO thin film was deposited directly on the crystalline silicon substrate with highly doped emitter region. In the second case, the TCO film was deposited on the same type of silicon substrate but with additional ultrathin SiO2 passivation. The fingers lines of 80 μm width were then screen-printed on the ITO layer with two different spaces between fingers for each set. The influence of application of the ITO electrode and the type of metal electrodes patterns on the electrical performance of the prepared solar cells was investigated through optical and electrical measurements. Findings The electrical parameters such as short-circuit current (Jsc), open circuit voltage (Voc), fill factor (FF) and conversion efficiency were determined on a basis of I-V characteristics. Short-circuit current density (Jsc) was equal to 32 mA/cm2 for a solar cell with a typical antireflection layer and 31.5 mA/cm2 for the cell with ITO layer, respectively. Additionally, electroluminescence of prepared cells was measured and analysed. Originality/value The influence of the properties of ITO electrode on the electrical performance of crystalline silicon solar cells was investigated through complex optical, electrical and electroluminescence measurements.



2010 ◽  
Vol 518 (24) ◽  
pp. e111-e113 ◽  
Author(s):  
Yaping Zhang ◽  
Yunxia Yang ◽  
Jianhua Zheng ◽  
Guorong Chen ◽  
Chen Cheng ◽  
...  


2021 ◽  
Vol 11 (1) ◽  
Author(s):  
Bilge Nazli Altay ◽  
Vikram S. Turkani ◽  
Alexandra Pekarovicova ◽  
Paul D. Fleming ◽  
Massood Z. Atashbar ◽  
...  

AbstractPhotonic curing has shown great promise in maintaining the integrity of flexible thin polymer substrates without structural degradation due to shrinkage, charring or decomposition during the sintering of printed functional ink films in milliseconds at high temperatures. In this paper, single-step photonic curing of screen-printed nickel (Ni) electrodes is reported for sensor, interconnector and printed electronics applications. Solid bleached sulphate paperboard (SBS) and polyethylene terephthalate polymer (PET) substrates are employed to investigate the electrical performance, ink transfer and ink spreading that directly affect the fabrication of homogeneous ink films. Ni flake ink is selected, particularly since its effects on sintering and rheology have not yet been examined. The viscosity of Ni flake ink yields shear-thinning behavior that is distinct from that of screen printing. The porous SBS substrate is allowed approximately 20% less ink usage. With one-step photonic curing, the electrodes on SBS and PET exhibited electrical performances of a minimum of 4 Ω/sq and 16 Ω/sq, respectively, at a pulse length of 1.6 ms, which is comparable to conventional thermal heating at 130 °C for 5 min. The results emphasize the suitability of Ni flake ink to fabricate electronic devices on flexible substrates by photonic curing.



2019 ◽  
Vol 90 (11-12) ◽  
pp. 1212-1223
Author(s):  
Hong Hong ◽  
Jiyong Hu ◽  
Xiong Yan

Conductive lines are essential for the integration of electronic devices into fabrics, and their direct screen printing on fabrics is a promising, simple and low-cost method for mass-manufactured textile-based conductive lines. However, the intrinsic porous structures and texture characteristic of textiles complicate the diffusion and penetration of conductive ink, and will deteriorate the printing precision and electrical performance of conductive lines. To establish the relationship between the surface characteristics (i.e. porosity, roughness, contact angle) and printing precision as well as electrical performance, the screen-printed conductive lines on six different nylon woven lining fabrics were examined and compared. Moreover, to study the printing precision and the minimum printable line width on woven lining fabric, conductive lines with different widths were screen printed. The results showed that the fabric substrate with the smallest pore size and roughness shows a higher printing precision and lower electrical resistance of screen-printed conductive lines. Relatively, the dynamic contact angle and wetting time of ink on the surface of the fabric have a significant effect on the printing precision. Therefore, the surface structure of the fabric substrate determines to some degree the printing precision of conductive lines, the printable minimum line width and its electrical properties. It is believed that these findings will provide some important support for screen printing flexible electronic devices on woven textiles.



2021 ◽  
Author(s):  
◽  
Patrick L. Rassek

Fully screen-printed zinc-manganese dioxide (Zn|MnO2) batteries can power printed electronics devices. However, large-scale market implementation of such batteries has been impeded due to complexity in manufacturing and insufficient long-term stability. This work looks at key production parameters of current collector passivation, calendering of electrodes, electrode spacing and interfacial area and evaluates their effect on battery performance. Many commercially available conductive inks used to screen-print current collectors were developed for other applications and suffer power consuming parasitic side reactions inside electrochemical cells. A practical strategy to avoid corrosion of metallic current collectors adversely affecting battery performance is to print carbon black passivation layers, which is employed in this work. The stability of printed current collectors and passivation layers in common electrolyte solutions has been addressed using cyclic voltammetry (CV) experiments to identify pinhole-related anodic peak currents. Current integration over time enabled quantification and comparison of the passivation capability of individually fabricated protective carbon black layers. Printed layer thicknesses of at least 7 µm were required for the avoidance of pinholes in the protective passivation layers. The protective functionality was further enhanced by printing of passivation layer thicknesses of up to 25 µm and modification of the printing process to double prints wet-on-dry. Coplanar Zn|MnO2 batteries have a lower manufacturing complexity than stack-type batteries but lower interest in coplanar batteries can be attributed to reduced electrical and electrochemical performance due to layout-specific issues. Batteries comprising series connections or smaller gap widths between electrodes are typically printed to overcome these limitations. The focus of this study is the optimisation of battery performance characteristics by process and layout modification while enhancing processability on a wide range of screen printing machines. Thus, coplanar batteries prepared were calendered as part of the systematic electrode post-treatment. Battery layouts were modified by incremental gap width enlargement and a gap length extension. Individual effects of the electrical performance were monitored by electrochemical impedance spectroscopy (EIS) measurements and discharge experiments. Calendering of zinc anodes reduced charge transfer resistances of the batteries. Gap width extensions in a range between 1 mm and 5 mm showed only marginal impact on discharge performance metrics. Increase of the electrode interfacial area resulted in an improved current capability, raised short circuit currents by 45 %, and enhanced the durability against mechanical stress and thermal intake during battery activation and encapsulation. This work contributes to the optimisation of fully screen-printed coplanar Zn|MnO2 batteries by a predictable stability of passivation layers and an improved battery performance by Zn electrode calendering. Reduced requirements on registration due to increased electrode spacing and an enhanced process stability during encapsulation enable production of printed batteries at industrial-scale.



Author(s):  
L. M. Gignac ◽  
K. P. Rodbell

As advanced semiconductor device features shrink, grain boundaries and interfaces become increasingly more important to the properties of thin metal films. With film thicknesses decreasing to the range of 10 nm and the corresponding features also decreasing to sub-micrometer sizes, interface and grain boundary properties become dominant. In this regime the details of the surfaces and grain boundaries dictate the interactions between film layers and the subsequent electrical properties. Therefore it is necessary to accurately characterize these materials on the proper length scale in order to first understand and then to improve the device effectiveness. In this talk we will examine the importance of microstructural characterization of thin metal films used in semiconductor devices and show how microstructure can influence the electrical performance. Specifically, we will review Co and Ti silicides for silicon contact and gate conductor applications, Ti/TiN liner films used for adhesion and diffusion barriers in chemical vapor deposited (CVD) tungsten vertical wiring (vias) and Ti/AlCu/Ti-TiN films used as planar interconnect metal lines.



2020 ◽  
Vol 91 (3) ◽  
pp. 30201
Author(s):  
Hang Yu ◽  
Jianlin Zhou ◽  
Yuanyuan Hao ◽  
Yao Ni

Organic thin film transistors (OTFTs) based on dioctylbenzothienobenzothiophene (C8BTBT) and copper (Cu) electrodes were fabricated. For improving the electrical performance of the original devices, the different modifications were attempted to insert in three different positions including semiconductor/electrode interface, semiconductor bulk inside and semiconductor/insulator interface. In detail, 4,4′,4′′-tris[3-methylpheny(phenyl)amino] triphenylamine (m-MTDATA) was applied between C8BTBTand Cu electrodes as hole injection layer (HIL). Moreover, the fluorinated copper phthalo-cyanine (F16CuPc) was inserted in C8BTBT/SiO2 interface to form F16CuPc/C8BTBT heterojunction or C8BTBT bulk to form C8BTBT/F16CuPc/C8BTBT sandwich configuration. Our experiment shows that, the sandwich structured OTFTs have a significant performance enhancement when appropriate thickness modification is chosen, comparing with original C8BTBT devices. Then, even the low work function metal Cu was applied, a normal p-type operate-mode C8BTBT-OTFT with mobility as high as 2.56 cm2/Vs has been fabricated.



2002 ◽  
Vol 716 ◽  
Author(s):  
Yi-Mu Lee ◽  
Yider Wu ◽  
Joon Goo Hong ◽  
Gerald Lucovsky

AbstractConstant current stress (CCS) has been used to investigate the Stress-Induced Leakage Current (SILC) to clarify the influence of boron penetration and nitrogen incorporation on the breakdown of p-channel devices with sub-2.0 nm Oxide/Nitride (O/N) and oxynitride dielectrics prepared by remote plasma enhanced CVD (RPECVD). Degradation of MOSFET characteristics correlated with soft breakdown (SBD) and hard breakdown (HBD), and attributed to the increased gate leakage current are studied. Gate voltages were gradually decreased during SBD, and a continuous increase in SILC at low gate voltages between each stress interval, is shown to be due to the generation of positive traps which are enhanced by boron penetration. Compared to thermal oxides, stacked O/N and oxynitride dielectrics with interface nitridation show reduced SILC due to the suppression of boron penetration and associated positive trap generation. Devices stressed under substrate injection show harder breakdown and more severe degradation, implying a greater amount of the stress-induced defects at SiO2/substrate interface. Stacked O/N and oxynitride devices also show less degradation in electrical performance compared to thermal oxide devices due to an improved Si/SiO2 interface, and reduced gate-to-drain overlap region.



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