Noise figure measurement of three-port differential low-noise amplifiers

2012 ◽  
Vol 48 (10) ◽  
pp. 578 ◽  
Author(s):  
D.S. Prinsloo ◽  
P. Meyer
Keyword(s):  
Noise Figure ◽  
Low Noise ◽  
Low Noise Amplifiers

scholarly journals Technologies, Design, and Applications of Low-Noise Amplifiers at Millimetre-Wave: State-of-the-Art and Perspectives

Electronics ◽  
2019 ◽  
Vol 8 (11) ◽  
pp. 1222 ◽  
Author(s):  
Longhi ◽  
Pace ◽  
Colangeli ◽  
Ciccognani ◽  
Limiti
Keyword(s):  
Integrated Circuit ◽  
Noise Figure ◽  
State Of The Art ◽  
Low Noise ◽  
Low Noise Amplifiers ◽  
Wave State ◽  
Millimetre Wave ◽  
Monolithic Microwave Integrated Circuit ◽  
V Band ◽  
And Performance

An overview of applicable technologies and design solutions for monolithic microwave integrated circuit (MMIC) low-noise amplifiers (LNAs) operating at millimeter-wave are provided in this paper. The review starts with a brief description of the targeted applications and corresponding systems. Advanced technologies are presented highlighting potentials and drawbacks related to the considered possibilities. Design techniques, applicable to different requirements, are presented and analyzed. An LNA operating at V-band (59–66 GHz) is designed and tested following the presented guidelines, demonstrating state-of-the-art results in terms of noise figure (average NF < 2 dB). A state-of-the-art table, reporting recent results available in open literature on this topic, is provided and examined, focusing on room temperature operation and performance in cryogenic environment. Finally, trends versus frequency and perspectives are outlined.

ON-CHIP INDUCTORS OPTIMIZATION FOR ULTRA WIDE BAND LOW NOISE AMPLIFIERS

2011 ◽  
Vol 20 (07) ◽  
pp. 1231-1242 ◽  
Author(s):  
J. DEL PINO ◽  
SUNIL L. KHEMCHANDANI ◽  
ROBERTO DÍAZ-ORTEGA ◽  
R. PULIDO ◽  
H. GARCÍA-VÁZQUEZ
Keyword(s):  
Quality Factor ◽  
Noise Figure ◽  
Impedance Matching ◽  
Broad Band ◽  
Wide Band ◽  
Design Guidelines ◽  
Low Noise ◽  
Low Noise Amplifiers ◽  
Integrated Inductor ◽  
On Chip

In this work, the influence of the inductor quality factor in wide band low noise amplifiers has been studied. Electromagnetic simulations have been used to model the integrated inductor broad band response. The influence of the quality factor on LNA performance of the inductors that compound the impedance matching networks, inductive degeneration and broadband load has been studied, obtaining design guidelines for optimizing the amplifier gain flatness. Using this guidelines, an LNA with wideband input matching, shunt-peaking load, and an output buffer was designed. Using Austria Mikro Systems BiCMOS 0.35 m process, a prototype has been fabricated achieving the following measured specifications: maximum gain of 12.5 dB at 3.4 GHz with a -3 dB bandwidth of 1.7–5.3 GHz, noise figure from 4.3 to 5.2 dB, and unity gain at 9.4 GHz.

scholarly journals Metamodelling Techniques for the Optimal Design of Low-Noise Amplifiers

Electronics ◽  
2020 ◽  
Vol 9 (5) ◽  
pp. 787
Author(s):  
Amel Garbaya ◽  
Mouna Kotti ◽  
Mourad Fakhfakh ◽  
Esteban Tlelo-Cuautle
Keyword(s):  
Particle Swarm Optimization ◽  
Optimal Design ◽  
Noise Figure ◽  
Low Noise ◽  
Low Noise Amplifiers ◽  
Scattering Parameters ◽  
Perfect Agreement ◽  
Swarm Optimization ◽  
The Third ◽  
Intercept Point

In this article we deal with the optimal sizing of low-noise amplifiers (LNAs) using newly proposed metamodeling techniques. The main objective is to construct metamodels of main performances of the LNAs (namely, the third intercept point (IIP3), the scattering parameters (Sij), and the noise figure (NF)) and use them inside an optimization kernel for maximizing the circuits’ performances. The kriging surrogate modelling technique is used for constructing these models. The particle swarm optimization (PSO) technique is considered as the optimization metaheuristic. Two CMOS amplifiers are considered: a UMTS LNA and a multistandard LNA. Obtained results show that, at the considered working frequencies, the first LNA exhibits at 2.14 GHz a noise figure of 1.30 dB, an S21 of 16.01 dB, an S11 of −12.60 dB, and an IIP3 of 8.30 dBm. At 2 GHz, the second LNA has a noise figure of 1.24 dB, an S21 of 17.16 dB, an S11 of −13.74 dB, and an IIP3 of 4.30 dBm. Comparisons between results obtained using the constructed models and those of the simulation are presented to show the perfect agreement between them.

scholarly journals Bandwidth Analysis of a Broadband Amplifier with Two-Stage Matching System Using the Smith Chart

2021 ◽  
Vol 24 (3) ◽  
pp. 53-60
Author(s):  
A.A. Sherstneva
Keyword(s):  
Noise Figure ◽  
Impedance Matching ◽  
Low Noise ◽  
Low Noise Amplifiers ◽  
Matching Problem ◽  
Two Stage ◽  
Analysis And Design ◽  
Design Variables ◽  
Stage Matching ◽  
Smith Chart

This paper describes a novel trace structure for the analysis and design of two-stage Broadband Frequency Low Noise Amplifiers based on standard Smith chart procedures and program algorithm realization. The method allows to put the transistor's S-parameters and details of the source and load networks and to interactively explore the effects of these quantities on design variables such as gain, noise figure and stability. It also facilitates the design of two-element matching networks to transform the source and load impedances to optimum values to achieve the desired gain and noise performance. The extended Smith chart concept is proposed to enable the advanced graphical interpretation of devices containing complex properties. This methodology is based on the Smith chart concept, and makes it easy to deal with devices containing signal sources, nonlinearity, very high Q factors and negative resistances. The concept of explaining the use of the Smith chart in combination with using modern tools as MATLAB scripts is exemplified in graphical forms. Phyton-based program contains the algorithm for parameters calculation. It explains the procedure that must be used to solve the two-stage impedance-matching problem. The point of this proposal is using of Smith chart plane for the graphical processing for its application to oscillator analysis. To demonstrate the effective usage of this methodology an interpretation and analysis of the oscillator, especially in terms of gain, noise and stability, are provided. The practical relevance concludes results of multistage design using impedance matching LC networks for the intersection level. The values of the parameters of the integrated microcircuit confirm the possibility of using the calculation methodology considered in the paper. The proposed solution is validated with extensive RF measurements at 3.5 GHz and is benchmarked against several frequency ranges for noise, stability and gain values. The methodology shown in the paper can be used in the development and design of modern microwave amplifiers, as well as for research and analysis of the efficiency of existing devices.

scholarly journals Study of Linearity and Power Consumption Requirements of CMOS Low Noise Amplifiers in Context of LTE Systems and Beyond

2014 ◽  
Vol 2014 ◽  
pp. 1-11 ◽  
Author(s):  
Grzegorz Szczepkowski ◽  
Ronan Farrell
Keyword(s):  
Power Consumption ◽  
Antenna Arrays ◽  
Noise Figure ◽  
Low Noise ◽  
Base Stations ◽  
Small Cells ◽  
Handheld Devices ◽  
Low Noise Amplifiers ◽  
Budget Planning

This paper presents a study of linearity in wideband CMOS low noise amplifiers (LNA) and its relationship to power consumption in context of Long Term Evolution (LTE) systems and its future developments. Using proposed figure of merit (FoM) to compare 35 state-of-the-art LNA circuits published over the last decade, the paper explores a dependence between amplifier performance (i.e., combined linearity, noise figure, and gain) and power consumption. In order to satisfy stringent linearity specifications for LTE standard (and its likely successors), the paper predicts that LNA FoM increase in the range of +0.2 dB/mW is expected and will inevitably translate into a significant increase in power consumption—a critical budget planning aspect for handheld devices, active antenna arrays, and base stations operating in small cells.

scholarly journals Computation of Constant Gain and NF Circles for 60 GHz Ultra-low noise Amplifiers

2021 ◽  
Vol 3 (3) ◽  
pp. 146-156
Author(s):  
Christina Gnanamani ◽  
Shanthini Pandiaraj
Keyword(s):  
Noise Figure ◽  
Low Noise ◽  
Low Noise Amplifiers ◽  
Communication Link ◽  
60 Ghz ◽  
Output Impedance ◽  
Maximum Value ◽  
Input Module ◽  
Ultra Low Noise ◽  
Constant Source

Wireless communication is a constantly evolving and forging domain. The action of the RF input module is critical in the radio frequency signal communication link. This paper discusses the design of a RF high frequency transistor amplifier for unlicensed 60 GHz applications. The Transistor used for analysis is a FET amplifier, operated at 60GHz with 10 mA at 6.0 V. The simulation of the amplifier is made with the Open Source Scilab 6.0.1 console software. The MESFET is biased such that Sll = 0.9<30°, S12 = 0.21<-60°, S21= 2.51<-80°, and S22 = 0.21<-15o. It is found that the transistor is unconditionally stable and hence unilateral approximation can be employed. With these assumptions, the maximum value of source gain of the amplifier is found to be at 7.212 dB and the various constant source gain circles and noise figure circles are computed. The transistor has the following noise parameters: Fmin = 3 dB, Rn = 4 Ω, and Γopt = 0.485<155°. The amplifier is designed to have an input and output impedance of 50 ohms which is considered as the reference impedance.

RECENT ADVANCES AND DESIGN TRENDS IN CMOS RADIO FREQUENCY INTEGRATED CIRCUITS

2005 ◽  
Vol 15 (02) ◽  
pp. 377-428
Author(s):  
DAVID J. ALLSTOT ◽  
SANKARAN ANIRUDDHAN ◽  
MIN CHU ◽  
JEYANANDH PARAMESH ◽  
SUDIP SHEKHAR
Keyword(s):  
Integrated Circuits ◽  
Phase Noise ◽  
Noise Figure ◽  
Building Blocks ◽  
Intermediate Frequency ◽  
Direct Conversion ◽  
Low Noise ◽  
Low Noise Amplifiers ◽  
Common Source ◽  
Lower Phase

Several state-of-the-art wireless receiver architectures are presented including the traditional super-heterodyne, the image-reject heterodyne, the direct-conversion, and the very-low intermediate frequency (VLIF). The case studies are followed by a detailed view of receiver building blocks: low-noise amplifiers (LNA), mixers, and voltage-controlled oscillators (VCO). Two popular topologies currently exist for LNAs: the common-gate configuration, which offers low power consumption with superior stability, robustness and linearity performance, and its common-source counterpart, which provides comparatively higher gain and lower noise figure. Aside from the traditional passive and active Gilbert mixers, the even-harmonic and masking-quadrature mixers are developed to combat second-order non-linearity and improve image-rejection, respectively. For quadrature carrier generation, the degeneration-injected QVCO is superior to the cascode-injected QVCO both in terms of phase noise and tuning range. The Colpitts QVCO is attractive as a low-noise alternative as it does not disturb the output voltage as much as its traditional LC counterpart and thus offers lower phase noise.

scholarly journals A Novel Design and Optimization Approach for Low Noise Amplifiers (LNA) Based on MOST Scattering Parameters and the gm/ID Ratio

Electronics ◽  
2020 ◽  
Vol 9 (5) ◽  
pp. 785
Author(s):  
Juan L. Castagnola ◽  
Fortunato C. Dualibe ◽  
Agustín M. Laprovitta ◽  
Hugo García-Vázquez
Keyword(s):  
Integrated Circuits ◽  
Noise Figure ◽  
Low Noise ◽  
Low Noise Amplifiers ◽  
Optimization Approach ◽  
Scattering Parameters ◽  
Rf Integrated Circuits ◽  
Design And Optimization ◽  
Noise Amplifier

This work presents a new design methodology for radio frequency (RF) integrated circuits based on a unified analysis of the scattering parameters of the circuit and the gm/ID ratio of the involved transistors. Since the scattering parameters of the circuits are parameterized by means of the physical characteristics of transistors, designers can optimize transistor size and biasing to comply with the circuit specifications given in terms of S-parameters. A complete design of a cascode low noise amplifier (LNA) in MOS 65 nm technology is taken as a case study in order to validate the approach. In addition, this methodology permits the identification of the best trade-off between the minimum noise figure and the maximum gain for the LNA in a very simple way.

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