Improved inversion channel mobility for 4H-SiC MOSFETs following high temperature anneals in nitric oxide

2001 ◽  
Vol 22 (4) ◽  
pp. 176-178 ◽  
Author(s):  
G.Y. Chung ◽  
C.C. Tin ◽  
J.R. Williams ◽  
K. McDonald ◽  
R.K. Chanana ◽  
...  
2014 ◽  
Vol 778-780 ◽  
pp. 513-516 ◽  
Author(s):  
Yogesh K. Sharma ◽  
Ayayi C. Ahyi ◽  
Tamara Isaacs-Smith ◽  
Aaron Modic ◽  
Yi Xu ◽  
...  

The use of phosphorous as a passivating agent for the SiO2/4H-SiC interface increases the field effect channel mobility of 4H-SiC MOSFET to twice the value, 30-40cm2/V-s, that is obtained with a high temperature anneal in nitric oxide (NO). A solid SiP2O7planar diffusion source is used to produce P2O5for the passivation of the interface. Incorporation of phosphorous into SiO2leads to formation of phosphosilicate glass (PSG) which is known to be a polar material causes device instability. With a new modified thin phosphorous (P) passivation process, as described in this abstract, we can improve the stability of MOSFETs significantly with mobility around 75cm2/V.s.


2000 ◽  
Vol 622 ◽  
Author(s):  
G.Y. Chung ◽  
C.C. Tin ◽  
J. R. Williams ◽  
K. McDonald ◽  
M. Di Ventra ◽  
...  

ABSTRACTResults are reported for the passivation of interface states near the conduction band edge in n-4H-SiC using post-oxidation anneals in nitric oxide, ammonia and forming gas (N2/5%H2). Anneals in nitric oxide and ammonia reduce the interface state density significantly, while forming gas anneals are largely ineffective. Results suggest that interface states in SiO2/SiC and SiO2/Si have different origins, and a model is described for interface state passivation by nitrogen in the SiO2/SiC system. The inversion channel mobility of 4H-SiC MOSFETs increases with the NO annealing.


2007 ◽  
Vol 556-557 ◽  
pp. 835-838 ◽  
Author(s):  
Amador Pérez-Tomás ◽  
Michael R. Jennings ◽  
Philip A. Mawby ◽  
James A. Covington ◽  
Phillippe Godignon ◽  
...  

In prior work we have proposed a mobility model for describing the mobility degradation observed in SiC MOSFET devices, suitable for being implemented into a commercial simulator, including Coulomb scattering effects at interface traps. In this paper, the effect of temperature and doping on the channel mobility has been modelled. The computation results suggest that the Coulomb scattering at charged interface traps is the dominant degradation mechanism. Simulations also show that a temperature increase implies an improvement in field-effect mobility since the inversion channel concentration increases and the trapped charge is reduced due to bandgap narrowing. In contrast, increasing the substrate impurity concentration further degrades the fieldeffect mobility since the inversion charge concentration decreases for a given gate bias. We have good agreement between the computational results and experimental mobility measurements.


2002 ◽  
Vol 23 (1) ◽  
pp. 13-15 ◽  
Author(s):  
J. Senzaki ◽  
K. Kojima ◽  
S. Harada ◽  
R. Kosugi ◽  
S. Suzuki ◽  
...  

2016 ◽  
Vol 858 ◽  
pp. 671-676 ◽  
Author(s):  
Daniel J. Lichtenwalner ◽  
Vipindas Pala ◽  
Brett A. Hull ◽  
Scott Allen ◽  
John W. Palmour

Alkaline earth elements Sr and Ba provide SiO2/SiC interface conditions suitable for obtaining high channel mobility metal-oxide-semiconductor field-effect-transistors (MOSFETs) on the Si-face (0001) of 4H-SiC, without the standard nitric oxide (NO) anneal. The alkaline earth elements Sr and Ba located at/near the SiO2/SiC interface result in field-effect mobility (μFE) values as high as 65 and 110 cm2/V.s, respectively, on 5×1015 cm-3 Al-doped p-type SiC. As the SiC doping increases, peak mobility decreases as expected, but the peak mobility remains higher for Ba interface layer (Ba IL) devices compared to NO annealed devices. The Ba IL MOSFET field-effect mobility decreases as the temperature is increased to 150 °C, as expected when mobility is phonon-scattering-limited, not interface-trap-limited. This is in agreement with measurements of the interface state density (DIT) using the high-low C-V technique, indicating that the Ba IL results in lower DIT than that of samples with nitric oxide passivation. Vertical power MOSFET (DMOSFET) devices (1200V, 15A) fabricated with the Ba IL have a 15% lower on-resistance compared to devices with NO passivation. The DMOSFET devices with a Ba IL maintain a stable threshold voltage under NBTI stress conditions of-15V gate bias stress, at 150 °C for 100hrs, indicating no mobile ions. Secondary-ion mass-spectrometry (SIMS) analysis confirms that the Sr and Ba remain predominantly at the SiO2/SiC interface, even after high temperature oxide annealing, consistent with the observed high channel mobility after these anneals. The alkaline earth elements result in enhanced SiC oxidation rate, and the resulting gate oxide breakdown strength is slightly reduced compared to NO annealed thermal oxides on SiC.


2019 ◽  
Vol 963 ◽  
pp. 226-229
Author(s):  
Kidist Moges ◽  
Mitsuru Sometani ◽  
Takuji Hosoi ◽  
Takayoshi Shimura ◽  
Shinsuke Harada ◽  
...  

We demonstrated an x-ray photoelectron spectroscopy (XPS)-based technique to reveal the detailed nitrogen profile in nitrided SiO2/4H-SiC structures with sub-nanometer-scale-resolution. In this work, nitric oxide (NO)- and pure nitrogen (N2)-annealed SiO2/4H-SiC(0001) structures were characterized. The measured results of NO-annealed samples with various annealing duration indicate that preferential nitridation just at the SiO2/SiC interfaces (~0.3 nm) proceeds in the initial stage of NO annealing and a longer duration leads to the distribution of nitrogen in the bulk SiO2 within few nanometers of the interface. The high-temperature N2 annealing was found to induce not only SiO2/SiC interface nitridation similarly to NO annealing but also SiO2 surface nitridation.


2019 ◽  
Vol 114 (24) ◽  
pp. 242101 ◽  
Author(s):  
Tsubasa Matsumoto ◽  
Hiromitsu Kato ◽  
Toshiharu Makino ◽  
Masahiko Ogura ◽  
Daisuke Takeuchi ◽  
...  

Energies ◽  
2020 ◽  
Vol 13 (10) ◽  
pp. 2479
Author(s):  
Hsiang-Chun Wang ◽  
Hsien-Chin Chiu ◽  
Chong-Rong Huang ◽  
Hsuan-Ling Kao ◽  
Feng-Tso Chien

A high threshold voltage (VTH) normally off GaN MISHEMTs with a uniform threshold voltage distribution (VTH = 4.25 ± 0.1 V at IDS = 1 μA/mm) were demonstrated by the selective area ohmic regrowth technique together with an Si-rich LPCVD-SiNx gate insulator. In the conventional GaN MOSFET structure, the carriers were induced by the inversion channel at a high positive gate voltage. However, this design sacrifices the channel mobility and reliability because a huge number of carriers are beneath the gate insulator directly during operation. In this study, a 3-nm ultra-thin Al0.25Ga0.75N barrier was adopted to provide a two-dimensional electron gas (2DEG) channel underneath the gate terminal and selective area MOCVD-regrowth layer to improve the ohmic contact resistivity. An Si-rich LPCVD-SiNx gate insulator was employed to absorb trace oxygen contamination on the GaN surface and to improve the insulator/GaN interface quality. Based on the breakdown voltage, current density, and dynamic RON measured results, the proposed LPCVD-MISHEMT provides a potential candidate solution for switching power electronics.


2010 ◽  
Vol 430 (1) ◽  
pp. 70-71 ◽  
Author(s):  
D. R. Yarullina ◽  
O. A. Smolentseva ◽  
A. I. Kolpakov ◽  
O. N. Ilinskaya

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