Low-Power EDA Technologies: State-of-the-Art and Beyond

2006 ◽  
Author(s):  
Enrico Macii ◽  
Roberto Zafalon
Keyword(s):  
Low Power ◽  
State Of The Art

State-of-the-Art Master Slave Flip-Flop Designs for Low Power VLSI Systems

2016 ◽  
pp. 166-198
Author(s):  
Kunwar Singh ◽  
Satish Chandra Tiwari ◽  
Maneesha Gupta
Keyword(s):  
Low Power ◽  
State Of The Art ◽  
Relative Power ◽  
Power Budget ◽  
Comprehensive Overview ◽  
Feedback Strategy ◽  
Flip Flop ◽  
Simulation Results

This chapter presents a comprehensive overview of the conventional fully static master slave flip-flops used in low power VLSI systems where power budget is critical. In addition, the chapter also presents alternative realization of fully static master-slave flip-flops utilizing a modified feedback strategy. The flip-flops designed on the basis of modified architecture have been explained in detail and compared with state-of-the-art master slave flip-flop designs available in the literature. Extensive capacitance calculations have been performed in terms of clock load and capacitance at internal nodes has also been estimated for all the flip-flop configurations. This is executed in order to compare their relative power and delay characteristics which are well supported by simulation results.

A novel measurement strategy to evaluate the human head as a transition medium for inductive ear-to-ear communication

2019 ◽  
Vol 64 (2) ◽  
pp. 233-241
Author(s):  
Jan-Christoph Edelmann ◽  
Dominik Mair ◽  
Thomas Ussmueller
Keyword(s):  
Low Power ◽  
Hearing Aids ◽  
State Of The Art ◽  
Near Field ◽  
Human Head ◽  
International Telecommunication Union ◽  
International Telecommunication ◽  
Channel Characteristics ◽  
Coupling Factors ◽  
Novel Concept

Abstract This manuscript introduces a novel concept for measuring coil coupling for extremely loose-coupled coils (coupling factors k<10−6; mutual inductance values M<10−10 H). Such a coupling is found everywhere where the ratio of solenoid diameter to coil spacing is >50. Measuring these quantities with a low-power technology requires a sophisticated setup that goes beyond the sensitivity of state-of-the art approaches. The methodology is validated using laboratory measurements with three sets of solenoids (two ferrite-cored, one air-cored) and numerical simulations with COMSOL Multiphysics 5.2a, Stockholm, Sweden. The concept is then employed to investigate the channel characteristics for inductive through-the-head communication within the 3.155–3.195 MHz band. This selected part of the spectrum is in accordance with International Telecommunication Union Radio Regulation 5.116 for low-power wireless hearing aids. By applying a phantom solution, we demonstrate that human tissue layers are transparent for magnetic fields within these frequencies. However, the influence from the relative coil arrangement is evaluated in detail as it restricts the communication range significantly. The coupling results for off-the-shelf Sonion, Roskilde, Denmark, RF 02 AA 10 solenoids considering both lateral and axial displacements might be of special interest for a number of near-field applications.

scholarly journals Tag Localization with Asynchronous Inertial-Based Shifting and Trilateration

Sensors ◽  
2019 ◽  
Vol 19 (23) ◽  
pp. 5204
Author(s):  
Alma’aitah ◽  
Eslim ◽  
Hassanein
Keyword(s):  
Low Power ◽  
Indoor Localization ◽  
State Of The Art ◽  
Location Estimation ◽  
Object Localization ◽  
Personal Area Networks ◽  
Matlab Simulation ◽  
Tag Localization ◽  
Simulation Results ◽  
Localization Data

Personal Area Networks (PAN) are key topologies in pervasive Internet of Things (IoT) localization applications. In the numerous object localization techniques, centralization and synchronization between the elements are assumed. In this paper, we leverage crowdsourcing from multiple fixed and mobile elements to enhance object localization. A cooperative crowdsourcing scheme is proposed to localize mobile low power tags using distributed and mobile/fixed readers for GPS assisted environments (i.e., outdoor) and fixed readers for indoors. We propose Inertial-Based Shifting and Trilateration (IBST) technique to provide an accurate reckoning of the absolute location of mobile tags. The novelty in our technique is its capability to estimate tag locations even when the tag is not covered by three readers to perform trilateration. In addition, IBST provides scalability since no processing is required by the low power tags. IBST technique is validated through extensive simulations using MATLAB. Simulation results show that IBST consistently estimates location, while other indoor localization solutions fail to provide such estimates as the state-of-the-art techniques require localization data to be available simultaneously to provide location estimation.

scholarly journals Low power network on chip architectures: A survey

2020 ◽  
Vol 2 (3) ◽  
pp. 158-168
Author(s):  
Muhammad Raza Naqvi
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Network Architecture ◽  
High Performance ◽  
State Of The Art ◽  
Network On Chip ◽  
System On Chip ◽  
Power Network ◽  
Network Routers ◽  
On Chip

Mostly communication now days is done through SoC (system on chip) models so, NoC (network on chip) architecture is most appropriate solution for better performance. However, one of major flaws in this architecture is power consumption. To gain high performance through this type of architecture it is necessary to confirm power consumption while designing this. Use of power should be diminished in every region of network chip architecture. Lasting power consumption can be lessened by reaching alterations in network routers and other devices used to form that network. This research mainly focusses on state-of-the-art methods for designing NoC architecture and techniques to reduce power consumption in those architectures like, network architecture, network links between nodes, network design, and routers.

scholarly journals Compact Galvanically Isolated Architectures for Low-Power DC-DC Converters with Data Transmission

Electronics ◽  
2021 ◽  
Vol 10 (19) ◽  
pp. 2328
Author(s):  
Egidio Ragonese ◽  
Alessandro Parisi ◽  
Nunzio Spina ◽  
Giuseppe Palmisano
Keyword(s):  
Low Power ◽  
Data Transmission ◽  
Power Efficiency ◽  
Lower Cost ◽  
State Of The Art ◽  
Effective Strategy ◽  
Power Regulation ◽  
Pros And Cons ◽  
Isolation Device ◽  
Isolated Systems

This paper reviews state-of-the-art architectures for galvanically isolated DC–DC converters with data transmission for low-power applications. Such applications do not have stringent requirements, in terms of power efficiency, but ask for very compact, highly integrated implementations. To this aim, architecture simplicity is crucial, especially when data transmission and/or output power regulation are required. Since the bottleneck of galvanically isolated systems is the isolation device (i.e., typically a stacked thick oxide or polyimide transformer), the reduction of the number of isolated links, while preserving both power and data functionalities, is the more effective strategy to increase the level of integration, reduce the form factor, and have a lower cost per channel. Specifically, this review compares the pros and cons of different architectures that address this challenge differently from traditional solutions.

Design and Analysis of Multiple Parameters Optimized n-Bit Reversible Magnitude Comparators

2016 ◽  
Vol 25 (09) ◽  
pp. 1650112
Author(s):  
A. N. Nagamani ◽  
S. Ashwin ◽  
B. Abhishek ◽  
K. V. Arjun ◽  
V. K. Agrawal
Keyword(s):  
Low Power ◽  
Design Methodology ◽  
State Of The Art ◽  
Digital System ◽  
Digital Design ◽  
Quantum Cost ◽  
Multiple Parameters ◽  
Digital System Design ◽  
Ancilla Inputs ◽  
Reversible Comparator

Reversible logic has gained its importance in the field of low power digital design. In any digital system, the comparator plays an important role in determining whether the two referenced numbers are either equal, greater or lesser. This work deals with optimization of existing reversible comparator designs and also proposes a new multiplexer-based logic for the design of reversible comparator along with design methodology for [Formula: see text]-bit comparators. The proposed design is optimized for multiple performance parameters compared to the existing state-of-the-art designs. The proposed multiplexer-based design has 51.9% improvement in quantum cost, 50% in garbage outputs and 62% in ancilla inputs. These optimized designs find application predominantly in the field of quantum computing for low power signal processing, parallel computing, memories, digital system design and multi-processing.

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