Identifying of Delamination in Integrated Circuits using Surface Acoustic Microscopy

2021 ◽  
Author(s):  
George Angelov ◽  
Radostin Rusev ◽  
Dimitar Nikolov ◽  
Rostislav Rusev
Keyword(s):  
Integrated Circuits ◽  
Acoustic Microscopy

Interfacial Delamination in Plastic Encapsulated Integrated Circuits (Pics)

1996 ◽  
Vol 445 ◽  
Author(s):  
Nickolaos Strifas ◽  
Aris Christou
Keyword(s):  
Integrated Circuits ◽  
Failure Analysis ◽  
Stress Corrosion ◽  
Integrated Circuit ◽  
Point Of View ◽  
Acoustic Microscopy ◽  
Electrical Performance ◽  
Premature Failure ◽  
Interfacial Delamination ◽  
Die Surface

AbstractThe reliability of plastic packaged integrated circuits was assessed from the point of view of interfacial mechanical integrity. It is shown that the effect of structural weaknesses caused by poor bonding, voids, microcracks or delamination may not be evident in the electrical performance characteristics, but may cause premature failure. Acoustic microscopy (C-SAM) was selected for nondestructive failure analysis of the plastic integrated circuit (IC) packages. Integrated circuits in plastic dual in line packages were initially subjected to temperature (25 °C to 85 °C) and humidity cycling (50 to 85 %) where each cycle was of one hour duration and for over 100 cycles and then analyzed. Delamination at the interfaces between the different materials within the package, which is a major cause of moisture ingress and subsequent premature package failure, was measured. The principal areas of delamination were found along the leads extending from the chip to the edge of the molded body and along the die surface itself. Images of the 3-D internal structure were produced that were used to determine the mechanism for a package failure. The evidence of corrosion and stress corrosion cracks in the regions of delamination was identified.

Subsurface Imaging of Multi-Level Integrated Circuits Using Scanning Electron Acoustic Microscopy

2009 ◽  
Author(s):  
L. Meng ◽  
J.C.H. Phang ◽  
A.G. Street
Keyword(s):  
Integrated Circuits ◽  
Integrated Circuit ◽  
Modulation Frequency ◽  
Acoustic Microscopy ◽  
Subsurface Imaging ◽  
Phase Images ◽  
Different Depths ◽  
Multi Level ◽  
Electron Acoustic ◽  
Scanning Electron

Abstract The capability of the Scanning Electron Acoustic Microscopy (SEAM) technique for high resolution non-destructive subsurface imaging at different depths for a multi-level integrated circuit is assessed. Experimental results using a beveled DRAM IC sample are used to quantify the effect of the electron beam energy and modulation frequency on contrast, spatial resolution and depth of focus of SEAM amplitude and phase images.

Frequency Domain Imaging: Acoustic Microscopy Technique for Die Stacking Application

2004 ◽  
Author(s):  
France B. Aspera ◽  
Christopher Flores ◽  
Ma. Cristina Salvador
Keyword(s):  
Fourier Transform ◽  
Integrated Circuits ◽  
Frequency Domain ◽  
Time Domain ◽  
Acoustic Microscopy ◽  
Cause Analysis ◽  
Packaging Technology ◽  
Root Cause ◽  
Microscopy Technique ◽  
Die Stacking

Abstract Die stacking package technology continues to become the trend of manufacturing integrated circuits (IC) today. This primary design offers smaller and thinner packages that would optimize board space and assembly cost. Consequently, this packaging technology has posed challenges in conducting failure analysis. Nondestructive techniques like acoustic microscopy are bound for advancement to make them feasible for use in this packaging technology. This paper will present frequency domain imaging in the field of acoustic microscopy as applied in the detection of delamination defect on a stacked die package. Fast Fourier Transform (FFT) was used as an algorithm to reconstruct and reveal the delamination defect which was not clearly detected in time domain imaging of the package. Frequency domain imaging was found to offer a better image contrast of delamination. This gives the failure analyst another approach to characterize the location and extent of delamination defect, a set of information that is substantial in the root cause analysis of adhesion related failures in stacked die packages.

A Case Study of the Reliability of Copper Bond Wires In Plastic Encapsulated Integrated Circuits

2014 ◽  
Vol 2014 (1) ◽  
pp. 000804-000809
Author(s):  
Ken Turner
Keyword(s):  
Integrated Circuits ◽  
Acoustic Microscopy ◽  
Temperature Sensitive ◽  
Lead Frame ◽  
Root Cause ◽  
Failure Investigation ◽  
Mechanical Removal ◽  
Bond Wires ◽  
Scanning Electron

Sixteen plastic encapsulated integrated circuits were initially received as part of a root-cause failure investigation, twelve of which contained copper bond wires and the other four containing gold bond wires. It was reported that eight of the integrated circuits had failed in the field with intermittent or complete malfunction of the components. Electrical testing confirmed the reported failure and found temperature sensitive, intermittent open circuits on various pins coinciding with the sample history. C-Mode scanning acoustic microscopy (CSAM) was performed on the devices, with each sample exhibiting varying degrees of delamination between the lead-frame and the plastic encapsulant. The backside of the package was polished into the underside of the lead-frame to preclude the introduction of any contamination due to chemical decapsulation. This allowed the mechanical removal of the leads from the package and inspection of the stitch bonds. Scanning electron microscope (SEM) inspection revealed that the copper stitch bonds had corroded to some extent (ranging from mild corrosion to complete consumption of the stitch bond) in each of the examined bonds, whereas the gold stitch bonds were unaffected. Overall inspection of the leads identified chlorine contamination along the delaminated interface.

Inspection of Electronics Components for Cryogenic Temperature Operations

2020 ◽  
pp. 1-5
Author(s):  
Navaneeth Poonthottathil ◽  
Frank Krennrich ◽  
Amanda Weinstein ◽  
Jonathan Eisch ◽  
Leonard J. Bond ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Structural Changes ◽  
Critical Role ◽  
Control Process ◽  
Liquid Argon ◽  
Acoustic Microscopy ◽  
Neutrino Experiment ◽  
Cryogenic Temperatures ◽  
Main Challenge ◽  
Quality Control Process

Abstract Electronics operating at cryogenic temperatures play a critical role in several future science experiments, and space exploration programs. The Deep Underground Neutrino Experiment (DUNE) uses a cold electronics system for data taking. Specifically, it utilizes custom-designed ASICs (Application Specific Integrated Circuits) chips. The main challenge is that these circuits will be immersed in liquid Argon and that they need to function reliability for 20+ years without access. Ensuring quality is critical, and issues may arise due to thermal stress, packaging, and manufacturing-related defects: if undetected, these could lead to long-term reliability and performance problems. The paper reports an investigation into non-destructive evaluation techniques to assess their potential use in a comprehensive quality control process during prototyping, testing, and commissioning of the DUNE cold electronics system. Scanning Acoustic Microscopy (SAM) was used to investigate permanent structural changes in the ASICs chips associated with thermal cycling between the room and cryogenic temperatures. Data are assessed using a novel correlation analysis strategy, which can detect even minimal changes happening inside the ASICs.

Rapid Cure Of Liquid Encapsulants And Structural Adhesives For Electronics Packaging Using Variable Frequency Microwave (Vfm) Energy

1996 ◽  
Vol 445 ◽  
Author(s):  
Zak Fathi ◽  
Denise A. Tucker ◽  
Billy J. Wei ◽  
Richard S. Garard ◽  
Patricia F. Mead ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Electronic Packaging ◽  
Flip Chip ◽  
Coefficient Of Thermal Expansion ◽  
Acoustic Microscopy ◽  
Variable Frequency ◽  
Scanning Calorimetry ◽  
Cycle Times ◽  
Process Technique ◽  
Field Uniformity

AbstractThis paper reports on the use of an emerging process technique for curing of polymer encapsulants as used in the electronic packaging industry. Previous work performed in the area of materials processing has demonstrated the usefulness of sweeping operating frequencies in order to achieve high levels of electric field uniformity and process control. The use of controlled variable frequency microwave energy has been evaluated as a process technique compatible with electronic packaging requirements. The heating of a series of integrated circuits (ICs) and their subsequent characterization was performed. IC integrity was investigated using X‐Ray, Acoustic Microscopy, Decapsulation and Bond Pull. Processing of liquid encapsulants, underfills and glob‐tops, used in Flip Chip and Chip On Board (COB) applications, was performed. Differential Scanning Calorimetry was used to study cure extent. Further studies show that variable frequency microwave processing leads to fast curing of encapsulants. A reduction in cycle times from 15 to 20 times over conventional curing has been observed. Also, results have showed a reduction in the stresses induced by mismatches in coefficient of thermal expansion.

Some applications of electron beam microanalysis techniques in VLSI process evaluation

1983 ◽  
Vol 41 ◽  
pp. 160-161
Author(s):  
Simon Thomas
Keyword(s):  
Integrated Circuits ◽  
Process Evaluation ◽  
Large Scale ◽  
Technology Development ◽  
Analytical Techniques ◽  
Successful Implementation ◽  
Analysis Of Failures ◽  
Characterization Of Materials ◽  
Circuits Vlsi

Trends in the technology development of very large scale integrated circuits (VLSI) have been in the direction of higher density of components with smaller dimensions. The scaling down of device dimensions has been not only laterally but also in depth. Such efforts in miniaturization bring with them new developments in materials and processing. Successful implementation of these efforts is, to a large extent, dependent on the proper understanding of the material properties, process technologies and reliability issues, through adequate analytical studies. The analytical instrumentation technology has, fortunately, kept pace with the basic requirements of devices with lateral dimensions in the micron/ submicron range and depths of the order of nonometers. Often, newer analytical techniques have emerged or the more conventional techniques have been adapted to meet the more stringent requirements. As such, a variety of analytical techniques are available today to aid an analyst in the efforts of VLSI process evaluation. Generally such analytical efforts are divided into the characterization of materials, evaluation of processing steps and the analysis of failures.

The study of interfacial reactions of nickel thin films on GaAs

1983 ◽  
Vol 41 ◽  
pp. 156-157
Author(s):  
L.J. Chen ◽  
Y.F. Hsieh
Keyword(s):  
Thin Films ◽  
Integrated Circuits ◽  
Interfacial Reactions ◽  
Metal Contacts ◽  
Nickel Thin Films ◽  
Thin Foils ◽  
The Status ◽  
Si Doped ◽  
Electron Microscopes

One measure of the maturity of a device technology is the ease and reliability of applying contact metallurgy. Compared to metal contact of silicon, the status of GaAs metallization is still at its primitive stage. With the advent of GaAs MESFET and integrated circuits, very stringent requirements were placed on their metal contacts. During the past few years, extensive researches have been conducted in the area of Au-Ge-Ni in order to lower contact resistances and improve uniformity. In this paper, we report the results of TEM study of interfacial reactions between Ni and GaAs as part of the attempt to understand the role of nickel in Au-Ge-Ni contact of GaAs.N-type, Si-doped, (001) oriented GaAs wafers, 15 mil in thickness, were grown by gradient-freeze method. Nickel thin films, 300Å in thickness, were e-gun deposited on GaAs wafers. The samples were then annealed in dry N2 in a 3-zone diffusion furnace at temperatures 200°C - 600°C for 5-180 minutes. Thin foils for TEM examinations were prepared by chemical polishing from the GaA.s side. TEM investigations were performed with JE0L- 100B and JE0L-200CX electron microscopes.

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