Evaluating the impact of communication latency on applications running over on-chip multiprocessing platforms: A layered approach

2010 ◽  
Author(s):  
Leandro Soares Indrusiak ◽  
Luciano Copello Ost ◽  
Fernando Gehm Moraes ◽  
Sanna Maatta ◽  
Jari Nurmi ◽  
...  
Keyword(s):  
Communication Latency ◽  
Layered Approach ◽  
On Chip ◽  
The Impact

scholarly journals Thermographic Study of Chip Temperature in High-Speed Dry Milling Magnesium Alloys

2016 ◽  
Vol 7 (2) ◽  
pp. 86-92 ◽  
Author(s):  
Józef Kuczmaszewski ◽  
Ireneusz Zagórski ◽  
Piotr Zgórniak
Keyword(s):  
Temperature Measurement ◽  
Magnesium Alloys ◽  
High Speed ◽  
Machining Process ◽  
Dry Milling ◽  
Technological Parameters ◽  
Chip Temperature ◽  
Thermographic Study ◽  
On Chip ◽  
The Impact

Abstract This paper presents an overview of the state of knowledge on temperature measurement in the cutting area during magnesium alloy milling. Additionally, results of own research on chip temperature measurement during dry milling of magnesium alloys are included. Tested magnesium alloys are frequently used for manufacturing elements applied in the aerospace industry. The impact of technological parameters on the maximum chip temperature during milling is also analysed. This study is relevant due to the risk of chip ignition during the machining process.

Study of the Impact of Protective Process Agents with Carbon Nanopowder Additives on Chip Forming Processes

2021 ◽  
Vol 887 ◽  
pp. 319-324
Author(s):  
E.A. Petrovsky ◽  
K.A. Bashmur ◽  
Vadim S. Tynchenko
Keyword(s):  
Experimental Studies ◽  
Cutting Speed ◽  
Optimal Composition ◽  
Cooling Process ◽  
Shrinkage Ratio ◽  
Nickel Chromium ◽  
Chromium Alloys ◽  
On Chip ◽  
The Impact ◽  
Positive Effect

The present study describes the impact of various protective process agents on chip forming processes. The research was conducted on NiCr20TiAl and 34NiCrMoV14-5 nickel-chromium alloys. New lubricant-cooling process agents with carbon nanopowder additives are studied. The optimal composition of the nanopowder additive and its effect during alloy cutting is examined. Experiments reveal the dependence of shrinkage ratio on cutting speed and various protective process agents. The values of H50 microhardness are also defined when cutting these alloys using protective process agents. Experimental studies found the positive effect of developed agents with nanopowder additives on the processes of NiCr20TiAl and 34NiCrMoV14-5 alloys chip formation.

Designing of High Performance Multicore Processor with Improved Cache Configuration and Interconnect

2016 ◽  
pp. 204-219
Author(s):  
Ram Prasad Mohanty ◽  
Ashok Kumar Turuk ◽  
Bibhudatta Sahoo
Keyword(s):  
High Performance ◽  
Multicore Processors ◽  
Multicore Processor ◽  
Cache Size ◽  
L2 Cache ◽  
Internal Network ◽  
On Chip ◽  
L1 And L2 ◽  
The Impact ◽  
Cache Configuration

The growing number of cores increases the demand for a powerful memory subsystem which leads to enhancement in the size of caches in multicore processors. Caches are responsible for giving processing elements a faster, higher bandwidth local memory to work with. In this chapter, an attempt has been made to analyze the impact of cache size on performance of Multi-core processors by varying L1 and L2 cache size on the multicore processor with internal network (MPIN) referenced from NIAGRA architecture. As the number of core's increases, traditional on-chip interconnects like bus and crossbar proves to be low in efficiency as well as suffer from poor scalability. In order to overcome the scalability and efficiency issues in these conventional interconnect, ring based design has been proposed. The effect of interconnect on the performance of multicore processors has been analyzed and a novel scalable on-chip interconnection mechanism (INOC) for multicore processors has been proposed. The benchmark results are presented by using a full system simulator. Results show that, using the proposed INoC, compared with the MPIN; the execution time are significantly reduced.

Performance Analysis of On-Chip Communication Structures under Device Variability

2010 ◽  
Vol 1 (4) ◽  
pp. 40-62
Author(s):  
Faiz-ul Hassan ◽  
Wim Vanderbauwhede ◽  
Fernando Rodríguez-Salazar
Keyword(s):  
Communication Networks ◽  
Data Storage ◽  
Failure Probability ◽  
Analytical Models ◽  
High Yield ◽  
Communication Link ◽  
Link Failure ◽  
Communication Structures ◽  
On Chip ◽  
The Impact

On-chip communication is becoming an important bottleneck in the design and operation of high performance systems where it has to face additional challenges due to device variability. Communication structures such as tapered buffer drivers, interconnects, repeaters, and data storage elements are vulnerable to variability, which can limit the performance of the on-chip communication networks. In this regard, it becomes important to have a complete understanding of the impact that variability will have on the performance of these circuit elements in order to design high yield and reliable systems. In this paper, the authors have characterized the performance of the communication structures under the impact of random dopant fluctuation (RDF) for the future technology generations of 25, 18, and 13 nm. For accurate characterization of their performance, a Monte Carlo simulation method has been used along with predictive device models for the given technologies. Analytical models have been developed for the link failure probability of a repeater inserted interconnect which uses characterization data of all communication structures to give an accurate prediction of the link failure probability. The model has also been extended to calculate the link failure probability of a wider communication link.

scholarly journals Experimental study on chip shape in ultrasonic vibration–assisted turning of 304 austenitic stainless steel

2019 ◽  
Vol 11 (8) ◽  
pp. 168781401987089 ◽  
Author(s):  
Yingshuai Xu ◽  
Zhihui Wan ◽  
Ping Zou ◽  
Qinjian Zhang
Keyword(s):  
Stainless Steel ◽  
Austenitic Stainless Steel ◽  
Ultrasonic Vibration ◽  
Process Parameters ◽  
Chip Morphology ◽  
Cutting Parameters ◽  
Chip Shape ◽  
304 Austenitic Stainless Steel ◽  
On Chip ◽  
The Impact

There are many problems and physical phenomena in turning process, like machined surface quality, cutting force, tool wear, and so on. These factors and the chip shape of workpiece materials, which is an important aspect to study the mechanism of ultrasonic vibration–assisted turning, go hand in hand. This article first introduces the types and changes of chip, meanwhile the chip formation mechanism of ultrasonic vibration–assisted turning is studied and analyzed, and the turning experiments of 304 austenitic stainless steel with and without ultrasonic vibration are carried out. The difference of chip morphology between ultrasonic vibration–assisted turning and conventional turning is contrasted and analyzed from the macroscopic and microscopic point of view. The influence of process parameters on chip shape and the impact of chip shape on machining effect are also analyzed. Results indicate that when process parameters (vibration frequency, ultrasonic amplitude, and cutting parameters) are suitably selected, ultrasonic vibration–assisted turning can gain access to better chip shape and chip breaking effect than conventional turning. By contrast with conventional turning, phenomenon of serrated burr on the chip edge and the surface defects of chip in ultrasonic vibration–assisted turning have improved significantly. Moreover, it is found that superior chip morphology in ultrasonic vibration–assisted turning can be acquired under the circumstance of comparatively small cutting parameters (cutting speed, depth of cut, and feed rate); at the same time, preferable chips can also obtain ranking machining effect.

The impact of Cu/low κ on chip performance

2003 ◽  
Author(s):  
P. Zarkesh-Ha ◽  
P. Bendix ◽  
W. Loh ◽  
JinJoo Lee ◽  
J.D. Meindl
Keyword(s):  
On Chip ◽  
The Impact

scholarly journals Measuring Static Parameters of Embedded ADC Core

2011 ◽  
Vol 62 (2) ◽  
pp. 80-86
Author(s):  
Franc Novak ◽  
Peter Mrak ◽  
Anton Biasizzo
Keyword(s):  
Feasibility Study ◽  
Theoretical Background ◽  
System On Chip ◽  
Test Time ◽  
Hardware Overhead ◽  
Self Test ◽  
Built In Self Test ◽  
On Chip ◽  
The Impact ◽  
Minimal Hardware

Measuring Static Parameters of Embedded ADC CoreThe paper presents the results of a feasibility study of measuring static parameters of ADC cores embedded in a System-on-Chip. Histogram based technique is employed because it is suitable for built-in self-test. While the theoretical background of the technique has been covered by numerous papers, less attention has been given to implementations in practice. Our goal was the implementation of histogram test in a IEEE Std 1500 wrapper. Two different solutions pursuing either minimal test time or minimal hardware overhead are described. The impact of MOS switches at ADC input on the performed measurements was considered.

Identification of ERG Specific Target Genes by Genome-Wide Screening in T-Lymphoblastic Leukemia

Blood ◽  
2008 ◽  
Vol 112 (11) ◽  
pp. 3788-3788
Author(s):  
Liliana H Mochmann ◽  
Konrad Neumann ◽  
Juliane Bock ◽  
Jutta Ortiz Tanchez ◽  
Arend Bohne ◽  
...  
Keyword(s):  
Target Genes ◽  
Lymphoblastic Leukemia ◽  
Specific Treatment ◽  
P Value ◽  
Dna Templates ◽  
Genome Wide ◽  
A Genome ◽  
On Chip ◽  
T Cell Leukemogenesis ◽  
The Impact

Abstract The Ets related gene, ERG, encodes a transcription factor with a vital role in hematopoiesis. Recent findings have shown that ERG knockout mice require a minimum of one functional allele to ensure embryonic blood development and adult stem cell maintenance. Moreover, it was earlier reported that enforced expression of ERG induced oncogenic transformation in 3T3 cells. Overexpression of ERG, observed in a subset of acute T-lymphoblastic and acute myeloid leukemia patients, was associated with an inferior outcome. However, the impact of ERG contributing to this unfavourable phenotype has yet to be determined, as downstream targets of ERG in leukemia remain unknown. Herein, we conducted a genome-wide analysis of ERG target genes in T-lymphoblastic leukemia. Chromatin immunoprecipitation-on-chip array (ChIP-on-chip) analyses were performed using two ERG specific antibodies for the enrichment of ERG-bound DNA templates in T-lymphoblastic leukemia cells (Jurkat) with input DNA or IgG precipitated DNA as controls. Enriched DNA templates and control DNA were differentially labelled and co-hybridized to high resolution promoter chip arrays with 50–75mer probes (770,000) representing 29,000 annotated human transcripts (NimbleGen). Based on two independent ChIP-on-chip assays, bioinformatic analysis (ACME) yielded statistically significant enriched peaks (using a sliding window of 1000 bp, and a P-value < 0.0001) identifying promoter regions of 365 potential ERG target genes. From these genes, clustering by functional annotation was performed using the DAVID database and subsequently genes related to leukemia were further selected for quantitative PCR validation. The design of promoter primers included the highly conserved ETS GGAA DNA binding site. Genes with greater than two-fold enrichment (ERG ChIP versus control) included WNT2 (17-fold), OLIG2 (14-fold), WNT11 (7-fold), CCND1 (5-fold), WNT9A (4-fold), CD7 (3-fold), EPO (3-fold), ERBB4 (3-fold), RPBJL (3-fold), TRADD (3-fold), PIWIL1 (2-fold), TNFRSF25 (2-fold), TWIST1 (2-fold), and HDAC4 (2-fold). Interestingly, enriched target genes involved in developmental processes (WNT2, WNT9A, WNT11, TWIST1, PIWIL1, ERBB4, and OLIG2) have shown oncogenic potential when mutated or overexpressed. Thus, we hypothesize that overexpression of ERG may contribute to T-cell leukemogenesis by the deregulation of these oncogenic targets. Further disclosure of ERG directed downstream pathways may contribute to the design of specific treatment strategies (such as WNT inhibitors) with particular effectiveness in ERG deregulated leukemia.

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