scholarly journals Remember the Adding Machine

2003 ◽  
Vol 125 (09) ◽  
pp. 50-52
Author(s):  
Jeffrey Winters

This article illustrates research and development work in nanotechnology for manufacturing computers at the molecular level. Computers have gone from large and mechanical, like Babbage's Difference Engine, to molecular. Researchers have shown that carbon nanotubes can be strung across electrodes to make minute transistors. Beyond sheer density of data, the nanotube chips have another, perhaps even more important, potential advantage over their electronic rivals: the memory does not disappear when the power goes off. The tubes may be drawn to the electrode by an electrical attraction, but they are held there by van der Waals attraction, a sort of molecular-level suction. In that way, an electromechanical memory chip will have more in common with a computer hard drive or floppy disk than with random access memory. Physicist Paul McEuen and his colleagues at Cornell have fabricated a transistor that passes signals through a single atom.

Nanomaterials ◽  
2021 ◽  
Vol 11 (8) ◽  
pp. 2085
Author(s):  
Lu Wang ◽  
Tianyu Yang ◽  
Dianzhong Wen

In this paper, a tuneable multilevel data storage bioresistive memory device is prepared from a composite of multiwalled carbon nanotubes (MWCNTs) and egg albumen (EA). By changing the concentration of MWCNTs incorporated into the egg albumen film, the switching current ratio of aluminium/egg albumen:multiwalled carbon nanotubes/indium tin oxide (Al/EA:MWCNT/ITO) for resistive random access memory increases as the concentration of MWCNTs decreases. The device can achieve continuous bipolar switching that is repeated 100 times per cell with stable resistance for 104 s and a clear storage window under 2.5 × 104 continuous pulses. Changing the current limit of the device to obtain low-state resistance values of different states achieves multivalue storage. The mechanism of conduction can be explained by the oxygen vacancies and the smaller number of iron atoms that are working together to form and fracture conductive filaments. The device is nonvolatile and stable for use in rewritable memory due to the adjustable switch ratio, adjustable voltage, and nanometre size, and it can be integrated into circuits with different power consumption requirements. Therefore, it has broad application prospects in the fields of data storage and neural networks.


Author(s):  
Phil Schani ◽  
S. Subramanian ◽  
Vince Soorholtz ◽  
Pat Liston ◽  
Jamey Moss ◽  
...  

Abstract Temperature sensitive single bit failures at wafer level testing on 0.4µm Fast Static Random Access Memory (FSRAM) devices are analyzed. Top down deprocessing and planar Transmission Electron Microscopy (TEM) analyses show a unique dislocation in the substrate to be the cause of these failures. The dislocation always occurs at the exact same location within the bitcell layout with respect to the single bit failing data state. The dislocation is believed to be associated with buried contact processing used in this type of bitcell layout.


Author(s):  
Ramachandra Chitakudige ◽  
Sarat Kumar Dash ◽  
A.M. Khan

Abstract Detection of both Insufficient Buried Contact (IBC) and cell-to-cell short defects is quite a challenging task for failure analysis in submicron Dynamic Random Access Memory (DRAM) devices. A combination of a well-controlled wet etch and high selectivity poly silicon etch is a key requirement in the deprocessing of DRAM for detection of these types of failures. High selectivity poly silicon etch methods have been reported using complicated system such as ECR (Electron Cyclotron Resonance) Plasma system. The fact that these systems use hazardous gases like Cl2, HBr, and SF6 motivates the search for safer alternative deprocessing chemistries. The present work describes high selectivity poly silicon etch using simple Reactive Ion Etch (RIE) plasma system using less hazardous gases such as CF4, O2 etc. A combination of controlled wet etch and high selectivity poly silicon etch have been used to detect both IBC and cell-to-cell shorts in submicron DRAMs.


Author(s):  
Felix Beaudoin ◽  
Stephen Lucarini ◽  
Fred Towler ◽  
Stephen Wu ◽  
Zhigang Song ◽  
...  

Abstract For SRAMs with high logic complexity, hard defects, design debug, and soft defects have to be tackled all at once early on in the technology development while innovative integration schemes in front-end of the line are being validated. This paper presents a case study of a high-complexity static random access memory (SRAM) used during a 32nm technology development phase. The case study addresses several novel and unrelated fail mechanisms on a product-like SRAM. Corrective actions were put in place for several process levels in the back-end of the line, the middle of the line, and the front-end of the line. These process changes were successfully verified by demonstrating a significant reduction of the Vmax and Vmin nest array block fallout, thus allowing the broader development team to continue improving random defectivity.


2020 ◽  
Vol 12 (2) ◽  
pp. 02008-1-02008-4
Author(s):  
Pramod J. Patil ◽  
◽  
Namita A. Ahir ◽  
Suhas Yadav ◽  
Chetan C. Revadekar ◽  
...  

Nanomaterials ◽  
2021 ◽  
Vol 11 (6) ◽  
pp. 1401
Author(s):  
Te Jui Yen ◽  
Albert Chin ◽  
Vladimir Gritsenko

Large device variation is a fundamental challenge for resistive random access memory (RRAM) array circuit. Improved device-to-device distributions of set and reset voltages in a SiNx RRAM device is realized via arsenic ion (As+) implantation. Besides, the As+-implanted SiNx RRAM device exhibits much tighter cycle-to-cycle distribution than the nonimplanted device. The As+-implanted SiNx device further exhibits excellent performance, which shows high stability and a large 1.73 × 103 resistance window at 85 °C retention for 104 s, and a large 103 resistance window after 105 cycles of the pulsed endurance test. The current–voltage characteristics of high- and low-resistance states were both analyzed as space-charge-limited conduction mechanism. From the simulated defect distribution in the SiNx layer, a microscopic model was established, and the formation and rupture of defect-conductive paths were proposed for the resistance switching behavior. Therefore, the reason for such high device performance can be attributed to the sufficient defects created by As+ implantation that leads to low forming and operation power.


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