Causes of Degradation of Thermal Performance of Ball Grid Arrays After Thermal Cycling

2007 ◽  
Author(s):  
Roy W. Knight ◽  
Yasser Elkady ◽  
Jeffrey C. Suhling ◽  
Pradeep Lall
Keyword(s):  
Solder Joint ◽  
Thermal Resistance ◽  
Thermal Cycling ◽  
Thermal Performance ◽  
Printed Circuit Board ◽  
Circuit Board ◽  
Element Analysis ◽  
Solder Balls ◽  
Ball Grid Array Packages ◽  
The Impact

The thermal performance of Ball Grid Array packages depends upon many parameters including die size, use of thermal balls, number of perimeter balls, use of underfill, and printed circuit board heat spreader and thermal via design. Thermal cycling can affect the integrity of thermal paths in and around the BGA as a result of the cracking of solder balls and delamination of the package, including at underfill interfaces. In this study, the impact of thermal cycling on the thermal performance of BGA’s was investigated and quantified. A number of test boards which included a range of the parameters cited above were experimentally examined. A baseline thermal resistance was measured for each case, which was verified with numerical thermal modeling. The boards were then subjected to thermal cycling from −40°C to 125°C. Every 250 cycles the thermal performance was measured. Packages expected to be least reliable (with large die and no underfill), showed an increase in thermal resistance after 750 thermal cycles. Further increases in thermal resistance were observed with continuous thermal cycling until solder joint failure occurred at 1250 cycles, preventing additional measurements. Finite element analysis identified critical thermal and perimeter solder balls as the most likely sites for cracking. Boards were cross-sectioned and examined for solder joint cracks and delamination to identify the cause for the observed increases in thermal resistance. Cracking was found in the critical thermal and perimeter solder balls.

scholarly journals Study on the Impact of Lead Sidewall Solder Coverage and Corner Lead Size on Joint Reliability

2021 ◽  
pp. 62-69
Author(s):  
Jefferson Talledo
Keyword(s):  
Solder Joint ◽  
Integrated Circuit ◽  
High Speed ◽  
Printed Circuit Board ◽  
Circuit Board ◽  
Element Analysis ◽  
Solder Joint Reliability ◽  
Joint Reliability ◽  
Solder Fatigue ◽  
The Impact

Solder joint reliability is very important to ensure that an integrated circuit (IC) semiconductor package is functional within its intended life span as the solder joint establishes electrical connection between the IC and the printed circuit board (PCB). Solder fatigue failure or crack under thermal cycling is one of the common problems with board-mounted packages. There are several factors or package characteristics that have impact on solder fatigue life like package size and material properties of the package components. This paper presents a thermo-mechanical modeling of a leadframe-based semiconductor package to study the impact of lead sidewall solder coverage and corner lead size on the solder joint reliability. Finite element analysis (FEA) technique was used to calculate the solder life considering 50% and 100% package lead sidewall solder coverage as well as smaller and larger critical corner leads of the package. The results of the analysis showed that higher lead sidewall solder coverage and larger lead could significantly increase solder life. Therefore, ensuring lead sidewall solder wettability to have higher solder coverage is beneficial. The study also reveals that packages with side wettable flanks are not only enabling high speed automated optical inspection required for the automotive industry, but they are also providing improved solder joint reliability.

An Assessment of the Impact of Interconnect Strategies on Thermal Performance of GaAs Power Amplifier IC Devices

2001 ◽  
Author(s):  
V. H. Adams ◽  
T.-Y. Tom Lee
Keyword(s):  
Thermal Resistance ◽  
Power Amplifier ◽  
Thermal Performance ◽  
Flip Chip ◽  
Printed Circuit Board ◽  
Circuit Board ◽  
Printed Circuit ◽  
Wire Bond ◽  
Die Attach ◽  
The Impact

Abstract Alternative interconnect strategies are being considered in place of the standard wire bond interconnect for GaAs power amplifier MMIC devices due to cost and electrical performance improvements. The package/die thermal performance consequences are potentially high-risk issue to these interconnect strategies and requires evaluation. Thermal simulations are conducted to compare and evaluate the thermal performances of three interconnect strategies: wire bond, gold post-flip chip, and through via interconnects. The test vehicle simulated is a three-stage, dual band power amplifier integrated circuit dissipating approximately 5 W steady-state power. Parametric studies are conducted to evaluate the impact of the printed circuit board, die thickness, solid gold vias, and design enhancements on package thermal performance. Best thermal performance is provided by a wire bonded, thin GaAs die attached with solder die attach to a printed circuit board that maximizes the number of plated-through-holes directly under the die. This configuration results in a best case junction-to-heat sink thermal resistance of 12 °C/W. Optimum flip chip and through via designs result in degraded thermal performance compared to the above described wire bond design but may have acceptable thermal performance. For these simulations, predicted junction-to-heatsink thermal resistance is in a range of 15–20 °C/W and is better than a comparable wire bonded design that uses a conductive epoxy die attach material.

scholarly journals Improving the Solder Joint Reliability of a Power Leadframe Package Using Thermomechanical Simulation

2019 ◽  
pp. 1-6
Author(s):  
Jefferson Talledo
Keyword(s):  
Solder Joint ◽  
Heat Dissipation ◽  
Printed Circuit Board ◽  
Circuit Board ◽  
Mold Material ◽  
Element Analysis ◽  
Solder Joint Reliability ◽  
Joint Reliability ◽  
Thermomechanical Simulation ◽  
Board Level

Leadframe-based packages are commonly used for semiconductor power devices. With these packages, heat dissipation is much better compared with laminate substrated-based packages. However, the solder joint reliability requirement under thermal cycling condition is also higher and this is what makes the development of a power package challenging. One of the usual requirements from customers is that there should be no solder joint failure up to 2,000 thermal cycles. This paper presents the thermomechanical simulation of a power leadframe package that was conducted to improve its solder joint reliability. Board level solder joint cycle life was predicted using finite element analysis and the result was validated with actual solder life result from board level reliability evaluation. Since available solder prediction equation was for the characteristic life (63.2% accumulative failure), using the normalized characteristic life was implemented for predicting the number of cycles to first failure of the solder joint connection and the approach showed good agreement with the actual result. Results also indicated that the choice of epoxy mold material and the type of PCB (printed circuit board) have a significant contribution to the solder joint reliability performance.

Recent Advances and Trends in Fan-Out Wafer/Panel-Level Packaging

2019 ◽  
Vol 141 (4) ◽  
Author(s):  
John H. Lau
Keyword(s):  
Thermal Cycling ◽  
Thermal Performance ◽  
Printed Circuit Board ◽  
Circuit Board ◽  
Direct Imaging ◽  
Printed Circuit ◽  
Thermal Cycling Condition ◽  
Recent Advances ◽  
Cycling Condition

The recent advances and trends in fan-out wafer/panel-level packaging (FOW/PLP) are presented in this study. Emphasis is placed on: (A) the package formations such as (a) chip first and die face-up, (b) chip first and die face-down, and (c) chip last or redistribution layer (RDL)-first; (B) the RDL fabrications such as (a) organic RDLs, (b) inorganic RDLs, (c) hybrid RDLs, and (d) laser direct imaging (LDI)/printed circuit board (PCB) Cu platting and etching RDLs; (C) warpage; (D) thermal performance; (E) the temporary wafer versus panel carriers; and (F) the reliability of packages on PCBs subjected to thermal cycling condition. Some opportunities for FOW/PLP will be presented.

The Effects of Variations in Manufacturing on PCB Thermal Properties

2011 ◽  
Author(s):  
John F. Maddox ◽  
Roy W. Knight ◽  
Sushil H. Bhavnani
Keyword(s):  
Thermal Properties ◽  
Steady State ◽  
Thermal Resistance ◽  
Thermal Performance ◽  
Manufacturing Process ◽  
Printed Circuit Board ◽  
Electronic Device ◽  
Circuit Board ◽  
Printed Circuit

The thermal performance of an electronic device is heavily dependent on the properties of the printed circuit board (PCB) to which it is attached. However, even small variations in the process used to fabricate a PCB can have drastic effects on its thermal properties. Therefore, it is necessary to experimentally verify that each stage in the manufacturing process is producing the desired result. Steady state thermal resistance measurements, taken with a comparative cut bar apparatus based on ASTM D 5470-06, were used to compare PCBs manufactured from the same design by different vendors and the effects of vias filled with epoxy versus unfilled vias on the thermal resistance of a PCB. It was found that the thermal resistance of the PCBs varied by as much as 30% between vendors and that the PCBs with epoxy filled vias had a higher thermal resistance than those with unfilled vias, possibly due to the order in which the manufacturing steps were taken.

Effects of Corner/Edge Bonding and Underfill Properties on the Thermal Cycling Performance of Lead Free Ball Grid Array Assemblies

2012 ◽  
Vol 134 (1) ◽  
Author(s):  
P. Borgesen ◽  
D. Blass ◽  
M. Meilunas
Keyword(s):  
Thermal Cycling ◽  
Flip Chip ◽  
Printed Circuit Board ◽  
Ball Grid Array ◽  
Cycling Performance ◽  
Circuit Board ◽  
Lead Free ◽  
Sac305 Solder ◽  
Solder Balls ◽  
Selection Of

Underfilling will almost certainly improve the performance of an area array assembly in drop, vibration, etc. However, depending on the selection of materials, the thermal fatigue life may easily end up worse than without an underfill. This is even more true for lead free than for eutectic SnPb soldered assemblies. If reworkability is required, the bonding of the corners or a larger part of the component edges to the printed circuit board (PCB), without making contact with the solder joints, may offer a more attractive materials selection. A 30 mm flip chip ball grid array (FCBGA) component with SAC305 solder balls was attached to a PCB and tested in thermal cycling with underfills and corner/edge bonding reinforcements. Two corner bond materials and six reworkable and nonreworkable underfills with a variety of mechanical properties were considered. All of the present underfills reduced the thermal cycling performance, while edge bonding improved it by up to 50%. One set of the FCBGAs was assembled with a SnPb paste and underfilled with a soft reworkable underfill. Surprisingly, this improved the thermal cycling performance slightly beyond that of the nonunderfilled assemblies, providing up to three times better life than for those assembled with a SAC305 paste.

THE IMPACT OF GLASS STYLE AND ORIENTATION ON THE RELIABILITY OF SMT COMPONENTS

2018 ◽  
Vol 2018 (1) ◽  
pp. 000699-000706 ◽  
Author(s):  
Maxim Serebrini ◽  
Greg Caswell
Keyword(s):  
Thermal Cycling ◽  
Printed Circuit Board ◽  
Circuit Board ◽  
Stress Tests ◽  
Component Reliability ◽  
Out Of Plane ◽  
Laminate Materials ◽  
Life Predictions ◽  
The Impact ◽  
Experimental Structure

Abstract Printed circuit board (PCB) glass style and orientation can have a significant influence on thermal cycling reliability of surface mounted components. DfR has conducted thermal cycling (−40°C to 125°C) tests on two PCB glass styles (1080 and 7628). The in plane and out of plane Coefficients of Thermal Expansion (CTE) were measured and found to be about 3–4ppm/°C different in the X-Y directions of the boards. To facilitate the reliability assessment of SMT component reliability four 0-ohm resistor sizes (2512, 1206, 0602 and 0402) were mounted on each board. Each board had 20 resistors with multiple orientations. The overall sample size consisted of 32 resistors of each size per glass style. In addition, the PCBs have two pad sizes. The purpose of these experiments was to develop a model for validating fatigue life predictions for different laminate materials. This paper will present the experimental structure, results of the stress tests and variables on the reliability of the chip components and insight into the development of appropriate models.

scholarly journals The Effect of Epoxy Polymer Addition in Sn-Ag-Cu and Sn-Bi Solder Joints

Materials ◽  
2019 ◽  
Vol 12 (6) ◽  
pp. 960 ◽  
Author(s):  
Min-Soo Kang ◽  
Do-Seok Kim ◽  
Young-Eui Shin
Keyword(s):  
Solder Joint ◽  
Strain Energy ◽  
Printed Circuit Board ◽  
Solder Joints ◽  
Circuit Board ◽  
Solder Paste ◽  
Element Analysis ◽  
Printed Circuit ◽  
Shock Testing ◽  
Polymer Addition

To analyze the reinforcement effect of adding polymer to solder paste, epoxies were mixed with two currently available Sn-3.0Ag-0.5Cu (wt.% SAC305) and Sn-59Bi (wt.%) solder pastes and specimens prepared by bonding chip resistors to a printed circuit board. The effect of repetitive thermal stress on the solder joints was then analyzed experimentally using thermal shock testing (−40 °C to 125 °C) over 2000 cycles. The viscoplastic stress–strain curves generated in the solder were simulated using finite element analysis, and the hysteresis loop was calculated. The growth and propagation of cracks in the solder were also predicted using strain energy formulas. It was confirmed that the epoxy paste dispersed the stress inside the solder joint by externally supporting the solder fillet, and crack formation was suppressed, improving the lifetime of the solder joint.

Thermal cycling effect on the drop reliability of BGA lead-free solder joints

2017 ◽  
Vol 29 (4) ◽  
pp. 199-202 ◽  
Author(s):  
Fang Liu ◽  
Jiacheng Zhou ◽  
Nu Yan
Keyword(s):  
Solder Joint ◽  
Thermal Cycling ◽  
Printed Circuit Board ◽  
Solder Joints ◽  
Drop Test ◽  
Circuit Board ◽  
Metallographic Analysis ◽  
Content Type ◽  
Bga Package ◽  
Free Solder

Purpose The purpose of this paper is to study the drop reliability of ball-grid array (BGA) solder joints affected by thermal cycling. Design/methodology/approach The drop test was made with the two kinds of chip samples with the thermal cycling or not. Then, the dyeing process was taken by these samples. Finally, through observing the metallographic analysis results, the conclusions could be found. Findings It is observed that the solder joint cracks which were only subjected to drop loads without thermal cycling appeared near the BGA package pads. The solder joint cracks which were subjected to drop loads with thermal cycling appear near the printed circuit board pads. Originality/value This paper obtains the solder joint cracks picture with drop test under the thermal cycling.

Controlling the Solder Joint Reliability of eWLB Packages in Automotive Radar Applications Using a Design for Reliability Approach

2018 ◽  
Author(s):  
M. Niessner ◽  
G. Haubner ◽  
W. Hartner ◽  
S. Pahlke
Keyword(s):  
Solder Joint ◽  
Printed Circuit Board ◽  
Circuit Board ◽  
Wafer Level ◽  
Automotive Radar ◽  
Low Loss ◽  
Solder Joint Reliability ◽  
Design For Reliability ◽  
Joint Reliability ◽  
Ball Grid Array Packages

A DfR (Design for Reliability) approach which is systematically based on simulation, sensitivity analysis and experimental validation is applied for identifying, understanding and controlling the key factors which determine the solder joint reliability of eWLB (Embedded Wafer Level Ball Grid Array) packages that carry embedded 77 GHz dies and sit on hybrid PCB (Printed Circuit Board) stacks. The hybrid stack investigated in this work is characteristic to automotive RADAR (Radio Detection And Ranging) applications and consists of one low-loss RF (Radio Frequency) layer and several FR4 layers. In line with previous work [1], the mechanical material properties of the low-loss RF laminate material are found to be the key factor. Simulation is used to systematically screen for mechanical properties which are favorable for achieving a high solder joint reliability on the unconstrained PCBs used for standardized solder joint reliability testing. A simplified virtual assessment of PCBs constrained by the mounting in system module housings is done. Both simulation and experimental results show that RF laminate materials with low Young’s modulus are the class of materials which allows for the highest solder joint reliability for all the conditions investigated in this study.

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