THE EFFECT OF ETCHING TIME ON RECTIFYING CHARACTERISTIC IN SnO2/p-Si AND SnO2/p-PoSi HETEROJUNCTION SCHOTTKY DIODES

2013 ◽  
Vol 27 (08) ◽  
pp. 1350051 ◽  
Author(s):  
ALIREZA BIARAM ◽  
HOSEIN ESHGHI
Keyword(s):  
Data Analysis ◽  
Series Resistance ◽  
Schottky Diodes ◽  
Thermionic Emission ◽  
Etching Time ◽  
Spray Pyrolysis Method ◽  
Porous Si ◽  
Si Substrates ◽  
Pyrolysis Method ◽  
Heterojunction Diodes

We have fabricated SnO 2/p- Si and SnO 2/p- PoSi heterojunction diodes by spray pyrolysis method. To prepare porous Si substrates, the etching time was varied from 10 to 20 and 30 mins. In these samples, the SEM micrographs showed a distributed pore areas surrounded by columnar walls with various height. The data analysis of the rectified I–V characteristic, using thermionic emission Schottky diode theory, showed that although the barrier height is about 0.5–0.6 eV in all samples other two important diode parameters, i.e. the ideality factor n and the series resistance rs, are strongly etching time-dependant and are increased with increasing the etching time.

Current-Voltage and Capacitance-Voltage Characteristics of Pd Schottky Diodes Fabricated on ZnO Grown along Zn- and O-Faces

2013 ◽  
Vol 313-314 ◽  
pp. 270-274
Author(s):  
M. Faisal ◽  
M. Asghar ◽  
Khalid Mahmood ◽  
Magnus Willander ◽  
O. Nur ◽  
...  
Keyword(s):  
Barrier Height ◽  
Ideality Factor ◽  
Doping Concentration ◽  
Series Resistance ◽  
Schottky Diodes ◽  
Thermionic Emission ◽  
Temperature Dependent ◽  
Current Voltage ◽  
Capacitance Voltage ◽  
Increasing Temperature

Temperature dependent current-voltage (I-V) and capacitance-voltage (C-V) measurements were utilized to understand the transport mechanism of Pd Schottky diodes fabricated on Zn- and O-faces of ZnO. From I-V measurements, in accordance with the thermionic emission mechanism theory, it was found that the series resistance Rsand the ideality factor n were strongly temperature dependent that decreased with increasing temperature for both the faces (Zn and O-face) of ZnO revealing that the thermionic emission is not the dominant process. The barrier height øB(I-V)increased with increasing temperature for both faces. The measured values of ideality factor, barrier height and series resistance for Zn- and O-faces at room temperature were 4.4, 0.60 eV, 217 Ω and 2.8, 0.49 eV, 251 Ω respectively. The capacitance-voltage (C–V) measurements were used to determine the doping concentration Nd, the built-in-potential Vbi, and the barrier height øB(C-V). The doping concentration was found to be decreased with increasing depth. The barrier height øB(C-V)calculated for O-polar and Zn-polar faces decreases with increasing temperature. The values of barrier height øB(C-V)determined from C-V measurements were found higher than the values of barrier height øB(I-V). Keeping in view the calculated values of ideality factor, barrier height, and series resistance shows that O-polar face is qualitatively better than Zn-polar face.

AN ASSESSMENT ON ELECTRICAL CHARACTERIZATION OF Ni/n-Si SCHOTTKY RECTIFIERS WITH AND WITHOUT Ta2O5 INTERFACIAL OXIDE LAYER

2019 ◽  
Vol 26 (10) ◽  
pp. 1950073 ◽  
Author(s):  
N. NANDA KUMAR REDDY ◽  
P. ANANDA ◽  
V. K. VERMA ◽  
K. RAHIM BAKASH
Keyword(s):  
Schottky Barrier ◽  
Oxide Layer ◽  
Barrier Height ◽  
Series Resistance ◽  
Schottky Diodes ◽  
Forward Bias ◽  
Thermionic Emission ◽  
Mis Structure ◽  
Schottky Barrier Diodes ◽  
Mis Structures

We have fabricated Ni/[Formula: see text]-Si metal–semiconductor (MS) and Ni/Ta2O5/[Formula: see text]-Si metal-insulator–semiconductor (MIS) Schottky barrier diodes at room temperature and studied their current density–voltage (J–V) and capacitance–voltage (C–V) characteristic properties. The forward bias J–V characteristics of the fabricated MS and MIS devices have been evaluated with the help of the thermionic emission (TE) mechanism. Schottky barrier height (SBH) values of 0.73 and 0.84[Formula: see text]eV and ideality factor values of 1.75 and 1.46 are extracted using J–V measurements for MS and MIS Schottky barrier diodes without and with Ta2O5 interfacial oxide layer, respectively. It was noted that the incorporation of Ta2O5 interfacial oxide layer enhanced the value of SBH for the MIS device because this oxide layer produced the substantial barrier between Ni and [Formula: see text]-Si and this obtained barrier height value is better than the conventional metal/[Formula: see text]-Si (MS) Schottky diodes. The rectification ratio (RR) calculated at [Formula: see text][Formula: see text]V for the MS structure is found to be [Formula: see text] and the MIS structure is found to be [Formula: see text]. Using Chung’s method, the series resistance ([Formula: see text]) values are calculated using [Formula: see text]/[Formula: see text] vs I plot and are found to be 21,603[Formula: see text][Formula: see text] for the Ni/[Formula: see text]-Si (MS) and 5489[Formula: see text][Formula: see text] for the Ni/Ta2O5/[Formula: see text]-Si (MIS) structures, respectively. In addition, [Formula: see text] vs [Formula: see text] plot has been utilized to evaluate the series resistance ([Formula: see text]) values and are found to be 14,064[Formula: see text][Formula: see text] for the Ni/[Formula: see text]-Si (MS) and 2236[Formula: see text][Formula: see text] for the Ni/Ta2O5/[Formula: see text]-Si (MIS) structures, respectively. In conclusion, by analyzing the experimental results, it is confirmed that the good quality performance is observed in Ni/Ta2O5/[Formula: see text]-Si (MIS) type SBD when compared to Ni/[Formula: see text]-Si (MS) type SBD and can be accredited to the intentionally formed thin Ta2O5 interfacial oxide layer between Nickel and [Formula: see text]-type Si.

scholarly journals Analysis of Electrical Characteristics of Pd/n-Nanocarbon/p-Si Heterojunction Diodes: By C-V-f and G/w-V-f

2020 ◽  
Vol 2020 ◽  
pp. 1-9 ◽  
Author(s):  
Abdelrahman Zkria ◽  
Eslam Abubakr ◽  
Phongsaphak Sittimart ◽  
Tsuyoshi Yoshitake
Keyword(s):  
Series Resistance ◽  
Lattice Structure ◽  
Wide Band ◽  
Interface States ◽  
Periodic Lattice ◽  
Hydrogen Atoms ◽  
Si Substrates ◽  
Ultrananocrystalline Diamond ◽  
Wide Range ◽  
Heterojunction Diodes

Diamond films are candidate for a wide range of applications, due to their wide band gap, high thermal conductivity, and chemical stability. In this report, diamond-based heterojunction diodes (HJDs) were fabricated by growing n-type nanocarbon composite in the form of nitrogen-doped ultrananocrystalline diamond/amorphous carbon (UNCD/a-C:H:N) films onto p-type Si substrates. X-ray photoemission and the Fourier transform infrared spectroscopies were employed to examine the contribution of nitrogen atoms from the gas phase into the deposited films. The results indicate the incorporation of nitrogen atoms into the grain boundaries of UNCD/a-C:H film by replacing hydrogen atoms. The capacitance- (C-V-f), conductance- (G/ω-V-f), and series resistance-voltage characteristics of the fabricated Pd/n-(UNCD/a-C:H:N)/p-Si HJDs were studied in the frequency range of 40 kHz-2 MHz. The existence of interface states (Nss) and series resistance (Rs) were attributed to the interruption of the periodic lattice structure at the surface of the fabricated junction as well as the defects on the (UNCD/a-C:H:N)/Si interface. By increasing the frequency (≥500 kHz), the Nss reveals an almost frequency-independent behavior, which indicates that the charges at the interface states cannot follow ac signal at higher frequency. The obtained results demonstrated that the UNCD/a-C:H:N is a promising n-type semiconductor for diamond-based heterostructure diodes.

scholarly journals Formation and Evaluation of Silicon Substrate with Highly-Doped Porous Si Layers Formed by Metal-Assisted Chemical Etching

2021 ◽  
Vol 16 (1) ◽  
Author(s):  
Yijie Li ◽  
Nguyen Van Toan ◽  
Zhuqing Wang ◽  
Khairul Fadzli Bin Samat ◽  
Takahito Ono
Keyword(s):  
Electrical Conductivity ◽  
Seebeck Coefficient ◽  
Contact Resistance ◽  
Power Factor ◽  
Chemical Etching ◽  
Porous Si ◽  
Si Substrate ◽  
Si Substrates ◽  
Output Performance ◽  
Metal Assisted Chemical Etching

AbstractPorous silicon (Si) is a low thermal conductivity material, which has high potential for thermoelectric devices. However, low output performance of porous Si hinders the development of thermoelectric performance due to low electrical conductivity. The large contact resistance from nonlinear contact between porous Si and metal is one reason for the reduction of electrical conductivity. In this paper, p- and n-type porous Si were formed on Si substrate by metal-assisted chemical etching. To decrease contact resistance, p- and n-type spin on dopants are employed to dope an impurity element into p- and n-type porous Si surface, respectively. Compared to the Si substrate with undoped porous samples, ohmic contact can be obtained, and the electrical conductivity of doped p- and n-type porous Si can be improved to 1160 and 1390 S/m, respectively. Compared with the Si substrate, the special contact resistances for the doped p- and n-type porous Si layer decreases to 1.35 and 1.16 mΩ/cm2, respectively, by increasing the carrier concentration. However, the increase of the carrier concentration induces the decline of the Seebeck coefficient for p- and n-type Si substrates with doped porous Si samples to 491 and 480 μV/K, respectively. Power factor is related to the Seebeck coefficient and electrical conductivity of thermoelectric material, which is one vital factor that evaluates its output performance. Therefore, even though the Seebeck coefficient values of Si substrates with doped porous Si samples decrease, the doped porous Si layer can improve the power factor compared to undoped samples due to the enhancement of electrical conductivity, which facilitates its development for thermoelectric application.

Hybrid III-V/SiGe solar cells on Si substrates and porous Si substrates

2019 ◽  
Author(s):  
Pablo Cano ◽  
Manuel Hinojosa ◽  
Luis Cifuentes ◽  
Huy Nguyen ◽  
Aled Morgan ◽  
...  
Keyword(s):  
Solar Cells ◽  
Porous Si ◽  
Si Substrates ◽  
Hybrid Iii
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