Study of a closed-loop high-precision front-end circuit for tunneling magneto-resistance sensors

2019 ◽  
Vol 33 (08) ◽  
pp. 1950085 ◽  
Author(s):  
Xiangyu Li ◽  
Jianping Hu ◽  
Xiaowei Liu

A closed-loop high-precision front-end interface circuit in a standard 0.35 [Formula: see text]m CMOS technology for a tunneling magneto-resistance (TMR) sensor is presented in this paper. In consideration of processing a low frequency and weak geomagnetic signal, a low-noise front-end detection circuit is proposed with chopper technique to eliminate the 1/f noise and offset of operational amplifier. A novel ripple suppression loop is proposed for eliminating the ripple in a tunneling magneto-resistance sensor interface circuit. Even harmonics is eliminated by fully differential structure. The interface is fabricated in a standard 0.35 [Formula: see text]m CMOS process and the active circuit area is about [Formula: see text]. The interface chip consumes 7 mW at a 5 V supply and the 1/f noise corner frequency is lower than 1 Hz. The interface circuit of TMR sensors can achieve a better noise level of [Formula: see text]. The ripple can be suppressed to less than 10 [Formula: see text]V by ripple suppression loop.

Sensors ◽  
2020 ◽  
Vol 20 (24) ◽  
pp. 7280
Author(s):  
Xiangyu Li ◽  
Yangong Zheng ◽  
Xiangyan Kong ◽  
Yupeng Liu ◽  
Danling Tang

High-precision microelectromechanical system (MEMS) accelerometers have wide application in the military and civil fields. The closed-loop microaccelerometer interface circuit with switched capacitor topology has a high signal-to-noise ratio, wide bandwidth, good linearity, and easy implementation in complementary metal oxide semiconductor (CMOS) process. Aiming at the urgent need for high-precision MEMS accelerometers in geophones, we carried out relevant research on high-performance closed-loop application specific integrated circuit (ASIC) chips. According to the characteristics of the performance parameters and output signal of MEMS accelerometers used in geophones, a high-precision closed-loop interface ASIC chip based on electrostatic time-multiplexing feedback technology and proportion integration differentiation (PID) feedback control technology was designed and implemented. The interface circuit consisted of a low-noise charge-sensitive amplifier (CSA), a sampling and holding circuit, and a PID feedback circuit. We analyzed and optimized the noise characteristics of the interface circuit and used a capacitance compensation array method to eliminate misalignment of the sensitive element. The correlated double sampling (CDS) technology was used to eliminate low-frequency noise and offset of the interface circuit. The layout design and engineering batch chip were fabricated by a standard 0.35 μm CMOS process. The active area of the chip was 3.2 mm × 3 mm. We tested the performance of the accelerometer system with the following conditions: power dissipation of 7.7 mW with a 5 V power supply and noise density less than 0.5 μg/Hz1/2. The accelerometers had a sensitivity of 1.2 V/g and an input range of ±1.2 g. The nonlinearity was 0.15%, and the bias instability was about 50 μg.


2019 ◽  
Vol 10 (1) ◽  
pp. 281 ◽  
Author(s):  
Jaesung Kim ◽  
Hyungseup Kim ◽  
Kwonsang Han ◽  
Donggeun You ◽  
Hyunwoo Heo ◽  
...  

This paper presents a low-noise multi-path operational amplifier for high-precision sensors. A chopper stabilization technique is applied to the amplifier to remove offset and flicker noise. A ripple reduction loop (RRL) is designed to remove the ripple generated in the process of up-modulating the flicker noise and offset. To cancel the notch in the overall transfer function due to the RRL operation, a multi-path architecture using both a low-frequency path (LFP) and high-frequency path (HFP) is implemented. The low frequency path amplifier is implemented using the chopper technique and the RRL. In the high-frequency path amplifier, a class-AB output stage is implemented to improve the power efficiency. The transfer functions of the LFP and HFP induce a first-order frequency response in the system through nested Miller compensation. The low-noise multi-path amplifier was fabricated using a 0.18 µm 1P6M complementary metal-oxide-semiconductor (CMOS) process. The power consumption of the proposed low-noise operational amplifier is 0.174 mW with a 1.8 V supply and an active area of 1.18 mm2. The proposed low-noise amplifier has a unit gain bandwidth (UGBW) of 3.16 MHz, an input referred noise of 11.8 nV/√Hz, and a noise efficiency factor (NEF) of 4.46.


2019 ◽  
Vol 33 (19) ◽  
pp. 1950222
Author(s):  
Xinpeng Di ◽  
Weiping Chen ◽  
Xiaowei Liu

A design of digital application specific integrated circuit (ASIC) of quartz-gyro is proposed in this paper. The digital drive circuit with fast-start oscillation and digital detection circuit with low noise are adopted to implement the digital output of the main circuit node and high precision angular velocity detection. The interface circuit is fabricated in a standard 0.35 [Formula: see text]m CMOS technology and test result shows the angular random walk and zero stability are [Formula: see text]/[Formula: see text] and [Formula: see text]/h ([Formula: see text]), respectively. The bias-instability is [Formula: see text]/h (Allen). The nonlinearity is limited to 0.035% and the zero temperature drift is [Formula: see text]/h from [Formula: see text] to [Formula: see text]. The chip exhibits great superiority on the aspects of high precision angular velocity digital detection and temperature characteristics of overall system.


2017 ◽  
Vol 31 (04) ◽  
pp. 1750030 ◽  
Author(s):  
Xiangyu Li ◽  
Liang Yin ◽  
Weiping Chen ◽  
Zhiqiang Gao ◽  
Xiaowei Liu

In this paper, a chopper instrumentation amplifier and a high-precision and low-noise CMOS band gap reference in a standard 0.5 [Formula: see text] CMOS technology for a tunneling magneto-resistance (TMR) sensor is presented. The noise characteristic of TMR sensor is an important factor in determining the performance of the sensor. In order to obtain a larger signal to noise ratio (SNR), the analog front-end chip ASIC weak signal readout circuit of the sensor includes the chopper instrumentation amplifier; the high-precision and low-noise CMOS band gap reference. In order to achieve the low noise, the chopping technique is applied in the first stage amplifier. The low-frequency flicker noise is modulated to high-frequency by chopping switch, so that the modulator has a better noise suppression performance at the low frequency. The test results of interface circuit are shown as below: At a single 5 V supply, the power dissipation is 40 mW; the equivalent offset voltage is less than 10 uV; the equivalent input noise spectral density 30 nV/Hz[Formula: see text](@10 Hz), the equivalent input noise density of magnetic is 0.03 nTHz[Formula: see text](@10 Hz); the scale factor temperature coefficient is less than 10 ppm/[Formula: see text]C, the equivalent input offset temperature coefficient is less than 70 nV/[Formula: see text]C; the gain error is less than 0.05%, the common mode rejection ratio is greater than 120 dB, the power supply rejection ratio is greater than 115 dB; the nonlinear is 0.1% FS.


Sensors ◽  
2021 ◽  
Vol 21 (19) ◽  
pp. 6456
Author(s):  
Fernando Cardes ◽  
Nikhita Baladari ◽  
Jihyun Lee ◽  
Andreas Hierlemann

This article reports on a compact and low-power CMOS readout circuit for bioelectrical signals based on a second-order delta-sigma modulator. The converter uses a voltage-controlled, oscillator-based quantizer, achieving second-order noise shaping with a single opamp-less integrator and minimal analog circuitry. A prototype has been implemented using 0.18 μm CMOS technology and includes two different variants of the same modulator topology. The main modulator has been optimized for low-noise, neural-action-potential detection in the 300 Hz–6 kHz band, with an input-referred noise of 5.0 μVrms, and occupies an area of 0.0045 mm2. An alternative configuration features a larger input stage to reduce low-frequency noise, achieving 8.7 μVrms in the 1 Hz–10 kHz band, and occupies an area of 0.006 mm2. The modulator is powered at 1.8 V with an estimated power consumption of 3.5 μW.


Sensors ◽  
2019 ◽  
Vol 19 (3) ◽  
pp. 512
Author(s):  
Binghui Lin ◽  
Mohamed Atef ◽  
Guoxing Wang

A low-power, high-gain, and low-noise analog front-end (AFE) for wearable photoplethysmography (PPG) acquisition systems is designed and fabricated in a 0.35 μm CMOS process. A high transimpedance gain of 142 dBΩ and a low input-referred noise of only 64.2 pArms was achieved. A Sub-Hz filter was integrated using a pseudo resistor, resulting in a small silicon area. To mitigate the saturation problem caused by background light (BGL), a BGL cancellation loop and a new simple automatic gain control block are used to enhance the dynamic range and improve the linearity of the AFE. The measurement results show that a DC photocurrent component up-to-10 μA can be rejected and the PPG output swing can reach 1.42 Vpp at THD < 1%. The chip consumes a total power of 14.85 μW using a single 3.3-V power supply. In this work, the small area and efficiently integrated blocks were used to implement the PPG AFE and the silicon area is minimized to 0.8 mm × 0.8 mm.


Author(s):  
X. Fang ◽  
Ch. Hu-Guo ◽  
N. Ollivier-Henry ◽  
N.A. Mbow ◽  
D. Brasse ◽  
...  

Electronics ◽  
2020 ◽  
Vol 9 (9) ◽  
pp. 1369
Author(s):  
Dongquan Huo ◽  
Luhong Mao ◽  
Liji Wu ◽  
Xiangmin Zhang

Direct conversion receiver (DCR) architecture is a promising candidate in the radio frequency (RF) front end because of its low power consumption, low cost and ease of integration. However, flicker noise and direct current (DC) offset are large issues. Owing to the local oscillator (LO) frequency, which is half of the RF frequency, and the absence of a DC bias current that introduces no flicker noise, the subharmonic passive mixer (SHPM) core topology front end overcomes the shortcoming effectively. When more and more receivers (RX) and transmitters (TX) are integrated into one chip, the linearity of the receiver front end becomes a very important performer that handles the TX and RX feedthrough. Another reason for the requirement of good linearity is the massive electromagnetic interference that exists in the atmosphere. This paper presents a linearity-improved RF front end with a feedforward body bias (FBB) subharmonic mixer core topology that satisfies modern RF front end demands. A novel complementary derivative superposition (DS) method is presented in low noise amplifier (LNA) design to cancel both the third- and second-order nonlinearities. To the best knowledge of the authors, this is the first time FBB technology is used in the SHPM core to improve linearity. A Volterra series is introduced to provide an analytical formula for the FBB of the SHPM core. The design was fabricated in a 0.13 μm complementary metal oxide semiconductor (CMOS) process with a chip area of 750 μm × 1270 μm. At a 2.4 GHz working frequency, the measurement result shows a conversion gain of 36 dB, double side band (DSB) noise figure (NF) of 6.8 dB, third-order intermodulation intercept point (IIP3) of 2 dBm, LO–RF isolation of 90 dB and 0.8 mW DC offset with 14.4 mW power consumption at 1.2 V supply voltage. These results exhibit better LO–RF feedthrough and DC offset, good gain and NF, moderate IIP3 and the highest figure of merit compared to the state-of-the-art publications.


Sensors ◽  
2020 ◽  
Vol 20 (4) ◽  
pp. 1117 ◽  
Author(s):  
Lu Gao ◽  
Fang Chen ◽  
Yingfei Yao ◽  
Dacheng Xu

A high-precision acceleration measurement system based on an ultra-sensitive tunnel magneto-resistance (TMR) sensor is presented in this paper. A “force–magnetic–electric” coupling structure that converts an input acceleration into a change in magnetic field around the TMR sensor is designed. In such a structure, a micro-cantilever is integrated with a magnetic field source on its tip. Under an acceleration, the mechanical displacement of the cantilever causes a change in the spatial magnetic field sensed by the TMR sensor. The TMR sensor is constructed with a Wheatstone bridge structure to achieve an enhanced sensitivity. Meanwhile, a low-noise differential circuit is developed for the proposed system to further improve the precision of the measured acceleration. The experimental results show that the micro-system achieves a measurement resolution of 19 μg/√Hz at 1 Hz, a scale factor of 191 mV/g within a range of ± 2 g, and a bias instability of 38 μg (Allan variance). The noise sources of the proposed system are thoroughly investigated, which shows that low-frequency 1/f noise is the dominant noise source. We propose to use a high-frequency modulation technique to suppress the 1/f noise effectively. Measurement results show that the 1/f noise is suppressed about 8.6-fold at 1 Hz and the proposed system resolution can be improved to 2.2 μg/√Hz theoretically with this high-frequency modulation technique.


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