Analysis, Design and Control of an Integrated Three-Level Buck Converter under DCM Operation

2019 ◽  
Vol 29 (01) ◽  
pp. 2050011
Author(s):  
Wen-Ming Zheng ◽  
Wen-Liang Zeng ◽  
Chi-Wa U ◽  
Chi-Seng Lam ◽  
Yan Lu ◽  
...  
Keyword(s):  
Output Voltage ◽  
Buck Converter ◽  
Cmos Process ◽  
Maximum Output ◽  
Analysis Design ◽  
On Chip ◽  
Output Capacitor ◽  
And Control ◽  
Voltage Conversion ◽  
Conduction Mode

A three-level buck (TLB) converter has the characteristics of higher voltage conversion efficiency, lower inductor current ripples, output voltage ripples and voltage stresses on switches when compared with the buck converters in continuous conduction mode (CCM). With a TLB converter integrated on a chip, we cannot avoid its discontinuous conduction mode (DCM) operation due to a smaller inductance and load variation. In this paper, we’ll present and discuss the analysis, design and control of a TLB converter under DCM operation, implemented in a 65[Formula: see text]nm CMOS process. Transistor level simulation results show that when the TLB converter operates at 100[Formula: see text]MHz with a 5[Formula: see text]nH on-chip inductor, a 10[Formula: see text]nF output capacitor and a 10[Formula: see text]nF flying capacitor, it can achieve an output conversion range of 0.7–1.2[Formula: see text]V from a 2.4[Formula: see text]V input supply, with a peak efficiency of 81.5%@120[Formula: see text]mW. The output load transient response is 100[Formula: see text]mV with 101[Formula: see text]ns for undershoot, and 86[Formula: see text]mV with 110[Formula: see text]ns for overshoot when [Formula: see text]–100[Formula: see text]mA. The maximum output voltage ripple is less than 19[Formula: see text]mV.

Design and Control for the Buck-Boost Converter Combining 1-Plus-D Converter and Synchronous Rectified Buck Converters

2015 ◽  
Vol 6 (2) ◽  
pp. 305
Author(s):  
Jeevan Naik
Keyword(s):  
Output Voltage ◽  
Input Voltage ◽  
Boost Converter ◽  
Buck Converter ◽  
Voltage Source ◽  
Buck Converters ◽  
Power Switches ◽  
Output Capacitor ◽  
And Control ◽  
Conduction Mode

<span>In this paper, a design and control for the buck-boost converter, i.e., 1-plus-D converter with a positive output voltage, is presented, which combines the 1-plus-D converter and the synchronous rectified (SR) buck converter. By doing so, the problem in voltage bucking of the 1-plus-D converter can be solved, thereby increasing the application capability of the 1-plus-D converter. Since such a converter operates in continuous conduction mode inherently, it possesses the nonpulsating output current, thereby not only decreasing the current stress on the output capacitor but also reducing the output voltage ripple. Above all, both the 1-plus-D converter and the SR buck converter, combined into a buck–boost converter with no right-half plane zero, use the same power switches, thereby causing the required circuit to be compact and the corresponding cost to be down. Furthermore, during the magnetization period, the input voltage of the 1-plus-D converter comes from the input voltage source, whereas during the demagnetization period, the input voltage of the 1-plus-D converter comes from the output voltage of the SR buck converter.</span>

scholarly journals Analysis and Design for Output Voltage Regulation in Constant-on-Time-Controlled Fly-Buck Converter

Electronics ◽  
2021 ◽  
Vol 10 (16) ◽  
pp. 1886
Author(s):  
Younghoon Cho ◽  
Paul Jang
Keyword(s):  
Output Voltage ◽  
Voltage Regulation ◽  
Design Guidelines ◽  
Buck Converter ◽  
Design Guideline ◽  
Analysis And Design ◽  
Flyback Converter ◽  
Auxiliary Power ◽  
Primary Output ◽  
Output Capacitor

Fly-buck converter is a multi-output converter with the structure of a synchronous buck converter structure on the primary side and a flyback converter structure on the secondary side, and can be utilized in various applications due to its many advantages. In terms of control, the primary side of the fly-buck converter has the same structure as a synchronous buck converter, allowing the constant-on-time (COT) control to be applied to the fly-buck converter. However, due to the inherent energy transfer principle, the primary-side output voltage regulation of COT controlled fly-buck converters may be poor, which can deteriorate the overall converter performance. Therefore, the primary output capacitor must be carefully designed to improve the voltage regulation characteristics. In this paper, a theoretical analysis of the output voltage regulation in COT controlled fly-buck converter is conducted, and based on this, a design guideline for the primary output capacitor considering the output voltage regulation is presented. The validity of the analysis and design guidelines was verified using a 5 W prototype of the COT controlled fly-buck converter for telecommunication auxiliary power supply.

scholarly journals Chaos Control and Stabilization of a PID Controlled Buck Converter Using the Spotted Hyena Optimizer

2021 ◽  
Vol 11 (6) ◽  
pp. 7922-7926
Author(s):  
D. Bakria ◽  
M. Azzouzi ◽  
D. Gozim
Keyword(s):  
Chaotic Dynamics ◽  
Pulse Width Modulation ◽  
Buck Converter ◽  
Spotted Hyena ◽  
Nonlinear Phenomena ◽  
Constant Frequency ◽  
And Control ◽  
Nonlinear Behaviors ◽  
Conduction Mode ◽  
Frequency Pulse

The voltage controlled buck converter by constant-frequency pulse-width modulation in continuous conduction mode gives rise to a variety of nonlinear behaviors depending on the circuit parameters values, which complicate their analysis and control. In this paper, a description of the DC/DC buck converter and an overview of some of its chaotic dynamics is presented. A solution based on the optimized PID controller is suggested to eliminate the observed nonlinear phenomena and to enhance the dynamics of the converter. The parameters of the controller are optimized with the Spotted Hyena Optimizer (SHO) which uses the sum of the error between the reference voltage and the output voltage as well as the error between the values of the inductor current in every switch opening instant to determine the fitness of each solution. The simulations results in MATLAB proved the efficiency of the proposed solution.

scholarly journals Implementasi MPPT Panel Surya Berbasis Algoritma Perturbasi & Observasi (PO) Menggunakan Arduino

2021 ◽  
Vol 2 (2) ◽  
pp. 162-167
Author(s):  
Haris Masrepol ◽  
Muldi Yuhendri
Keyword(s):  
Control System ◽  
Output Power ◽  
Output Voltage ◽  
Maximum Output Power ◽  
Buck Converter ◽  
Maximum Power ◽  
Maximum Output ◽  
Solar Panels ◽  
Maximum Power Point ◽  
Power Point

Solar panels are a renewable energy power plant that uses sunlight as its main energy source. The power generated by solar panels are determined by the size of the solar panels, solar radiation and temperature. The power of the solar panels is also determined by the output voltage of the solar panels. To get the maximum output power at any time, it is necessary to adjust the output voltage of the solar panel. This study proposes controlling the maximum output power of solar panels, also known as maximum power point tracking (MPPT) by adjusting the output voltage of the solar panels using a buck converter. The buck converter output voltage regulation at the maximum power point of the solar panel is designed with the Perturbation and Observation (PO) algorithm which is implemented using an Arduino Mega 2560. This MPPT control system is applied to 4x50 Watt-Peak (WP) solar panels which are connected in parallel. The experimental results show that the proposed MPPT control system with the PO algorithm has worked well as expected. This can be seen from the output power generated by the solar panels already around the maximum power point at any change in solar radiation and temperature.

scholarly journals ESR Estimation Schemes of Output Capacitor for Buck Converter from Capacitor Perspective

Electronics ◽  
2020 ◽  
Vol 9 (10) ◽  
pp. 1596
Author(s):  
Lei Ren ◽  
Lei Zhang ◽  
Chunying Gong
Keyword(s):  
Buck Converter ◽  
Electrolytic Capacitor ◽  
Equivalent Series Resistance ◽  
Power Electronic Converters ◽  
Aluminum Electrolytic Capacitor ◽  
Advantages And Disadvantages ◽  
Optimal Period ◽  
Current Characteristics ◽  
Output Capacitor ◽  
Conduction Mode

The aluminum electrolytic capacitor (AEC) is one of the most vulnerable parts in power electronic converters and its reliability is crucial to the whole system. With the growth of service time, the equivalent series resistance (ESR) increases and the capacitance (C) decreases due to the loss of electrolytes, which will result in extra power loss and even damage to transistors. To prevent significant damages, the AEC must be replaced at an optimal period and online health monitoring is indispensable. Through the analysis of degradation parameters (ESR and C), ESR is proved to be a better health indicator and therefore is determined as the monitoring parameter for AEC. From the capacitor perspective, ESR estimation schemes of output capacitors for a Buck converter are studied. Based on the voltage–current characteristics, two ESR calculation models are proposed, which are applicable for both continuous conduction mode (CCM) and discontinuous conduction mode (DCM). From the point of implementation view, the advantages and disadvantages of the two estimation schemes are pointed out, respectively. A Buck prototype is built and tested, and simulation and experimental results are provided to validate the proposed ESR estimation schemes.

IMPROVEMENT OF POWER EFFICIENCY AND OUTPUT VOLTAGE RIPPLE OF EMBEDDED DC–DC CONVERTERS WITH THREE STEP DOWN RATIOS

2012 ◽  
Vol 21 (01) ◽  
pp. 1250007 ◽  
Author(s):  
KAUSHIK BHATTACHARYYA ◽  
P. V. RATNA KUMAR ◽  
PRADIP MANDAL
Keyword(s):  
Power Efficiency ◽  
Output Voltage ◽  
Cmos Process ◽  
Switched Capacitor ◽  
Switching Scheme ◽  
Time Interleaving ◽  
Regulation Scheme ◽  
Voltage Ripple ◽  
Switched Capacitor Converter ◽  
On Chip

In this paper three embedded switched capacitor based DC–DC converters targeting Vdd/2, 2Vdd/3, and Vdd/3 output voltages have been designed with improved power efficiency and output voltage ripple. The performance of each of the converter is improved by nonoverlapped rotational time interleaving (NRTI) switching scheme. Current regulation scheme is included with each of the above NRTI switched capacitor converter to achieve better load and line regulation. The proposed converters are designed and simulated in a 0.18 μm n-well CMOS process with the total flying capacitance of 330 pF and load capacitor of 50 pF. The capacitance values are kept within on-chip implementable range. The maximum power efficiency and the output voltage ripple of the integrated NRTI DC–DC converters targeted for Vdd/2, 2Vdd/3 and Vdd/3 output generation are 71.5% and 5 mV, 69.23% and 13.27 mV and 58.09% and 10.5 mV, respectively.

scholarly journals Analysis and Control of Electrolytic Capacitor-Less LED Driver Based on Harmonic Injection Technique

Energies ◽  
2018 ◽  
Vol 11 (11) ◽  
pp. 3030 ◽  
Author(s):  
Mahmoud Nassary ◽  
Mohamed Orabi ◽  
Manuel Arias ◽  
Emad Ahmed ◽  
El-Sayed Hasaneen
Keyword(s):  
Power Factor ◽  
Low Frequency ◽  
Buck Converter ◽  
Electrolytic Capacitor ◽  
Injection Technique ◽  
Led Driver ◽  
Harmonic Injection ◽  
Output Capacitor ◽  
And Control ◽  
Led Drivers

AC-DC LED drivers may have a lifespan shorter than the lifespan of LED chips if electrolytic capacitors are used in their construction. Using film capacitors solves this problem but, as their capacitance is considerably lower, the low-frequency ripple will increase. Solving this problem by limiting the output ripple to safe values is possible by distorting the input current using harmonic injection technique, as long as these harmonics still complies with Power Factor Regulations (Energy Star). This harmonic injection alleviates the requirements imposed to the output capacitor in order to limit the low-frequency ripple in the output. This idea is based on the fact that LEDs can be driven by pulsating current with a limited Peak-To-Average Ratio (PTAR) without affecting their performance. By considering the accurate model of LEDs, instead of the typical equivalent resistance, this paper presents an improved and more reliable calculation of the intended harmonic injection. Wherein, its orders and values can be determined for each input/output voltage to obtain the specified PTAR and Power Factor (PF). Also, this harmonic injection can be simply implemented using a single feedback loop, its control circuit has features of wide bandwidth, simple, single-loop and lower cost. A 21W AC-DC buck converter is built to validate the proposed circuit and the derived mathematical model and it complies with IEC61000 3-2 class D standard.

Fast Transient Capacitor-Less Low-Dropout Regulator Based on Output Voltage Spike Reduction Circuits for SOC Applications

2019 ◽  
Vol 28 (03) ◽  
pp. 1950043 ◽  
Author(s):  
M. Jahangiri ◽  
A. Farrokhi
Keyword(s):  
Output Voltage ◽  
Input Voltage ◽  
Cmos Process ◽  
Ultra Low Power ◽  
Wide Range ◽  
Unity Gain ◽  
Fast Transient ◽  
Low Dropout Regulator ◽  
On Chip ◽  
Voltage Spike

A fast transient capacitor-less low-dropout regulator is presented in this study. The proposed LDO structure is based on Output Voltage Spike Reduction (OVSR) circuits and capacitance compensation circuits to enable a fast-transient response with ultra-low power dissipation and to make the LDO stable for a wide range of output load currents (0–50[Formula: see text]mA). The slew rate is improved with more slew current from the OVSR circuit and unity gain bandwidth is improved by a capacitor multiplayer circuit. The proposed LDO has been simulated with a standard 0.18[Formula: see text][Formula: see text]m CMOS process. The output voltage of the LDO was set to 1.2[Formula: see text]V for an input voltage of 1.4–2[Formula: see text]V. The Simulation results verify that the transient times are less than 2.8[Formula: see text][Formula: see text]s and the maximum undershoot and overshoot are 20[Formula: see text]mV while consuming only 26[Formula: see text][Formula: see text]A quiescent current. The proposed LDO is stable with an on-chip capacitor at the output node within the wide range of 1100[Formula: see text]PF.

scholarly journals Adaptive On-Time Buck Converter with Wave Tracking Reference Control for Output Regulation Accuracy

Energies ◽  
2021 ◽  
Vol 14 (13) ◽  
pp. 3809
Author(s):  
Pang-Jung Liu ◽  
Mao-Hui Kuo
Keyword(s):  
Output Voltage ◽  
Output Regulation ◽  
Buck Converter ◽  
Maximum Efficiency ◽  
Frequency Variation ◽  
Switching Frequency ◽  
Maximum Output ◽  
Equivalent Series Resistance ◽  
Load Current ◽  
Dc Offset

A ripple-based constant on-time (RBCOT) buck converter with a virtual inductor current ripple (VICR) control can relax the stability constraint of large equivalent series resistance (ESR) at an output capacitor, but output regulation accuracy deteriorates due to the issue with output DC offset. Thus, this paper proposes a wave tracking reference (WTR) control to improve converter stability with low ESR and concurrently eliminate output DC offset on the regulated output voltage. Moreover, an adaptive on-time (AOT) circuit is presented to suppress the switching frequency variation with load current changes in continuous conduction mode. A prototype chip was fabricated in 0.35 µm CMOS technology for validation. The measurement results demonstrate that the maximum output DC offset is 4.1 mV and the output voltage ripple is as small as 3 mV. Furthermore, the switching frequency variation with the AOT circuit is 11 kHz when load current changes from 50 mA to 500 mA, and the measured maximum efficiency is 90.9% for the maximum output power of 900 mW.

scholarly journals Multipurpose Drivers for MEMS Devices Based on a Single ASIC Implemented in a Low-Cost HV CMOS Process without a Triple Well

2021 ◽  
Vol 2021 ◽  
pp. 1-22
Author(s):  
Paul Miresan ◽  
Marius Neag ◽  
Marina Topa ◽  
Istvan Kovacs ◽  
Laurentiu Varzaru
Keyword(s):  
Output Voltage ◽  
Low Cost ◽  
Cmos Process ◽  
Maximum Output ◽  
Mems Devices ◽  
Sensors And Actuators ◽  
Operating Modes ◽  
Wide Range ◽  
External Resistor ◽  
Endoscopic Optical Coherence Tomography

This paper presents a novel topology for multipurpose drivers for MEMS sensors and actuators, suitable for integration in low-cost high-voltage (HV) CMOS processes, without a triple well. The driver output voltage, V MEMS , can be programmed over a wide, symmetrical range of positive and negative values, with the maximum output voltage being limited only by the maximum drain-source voltage that the HV transistors can handle. The driver is also able to short its output to the ground line and to leave it floating. It comprises generators for large positive and negative voltages followed by an LDO for each polarity that ensures that V MEMS has a well-controlled level and a very low ripple. The LDOs also help implement the grounded- and floating-output operating modes. Most of the required circuitry is integrated within a HV CMOS ASIC: the drivers for the large voltage generators, the error amplifiers of the LDOs, the DAC used to program the V MEMS level, and their support circuits. Thus, only the power stages of the large voltage generators, the pass transistors of the LDOs and two resistors for the LDO feedback network are discrete. A suitable configuration was devised for the latter that allows for the external resistor network to be shared by the two LDOs and prevents negative voltages from developing at the ASIC pins. Two circuit implementations of the proposed topology, designed in a low-cost 0.18 μm HV CMOS process, are presented in some detail. Simulation results demonstrate that they realize the required operating modes and provide V MEMS voltages programmable with steps of 100 mV or 200 mV, between -20 V and +20 V or between −45 V and +45 V, respectively. The output voltage ripple is relatively small, just 3.4 mVpkpk for the first implementation and 17 mVpkpk for the second. Therefore, both circuits are suitable for biasing and controlling a wide range of MEMS devices, including MEMS mirrors used in applications such as endoscopic optical coherence tomography.

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