Component Count Reduced, Filter-Less H-Bridge Multilevel Inverter with Series and Parallel Connected Switches

2020 ◽  
pp. 2150052
Author(s):  
M Vijayakumar ◽  
S. M. Ramesh
Keyword(s):  
Pulse Width Modulation ◽  
Harmonic Distortion ◽  
Sine Wave ◽  
Multilevel Inverter ◽  
Level Shift ◽  
Modulation Scheme ◽  
Power Switching ◽  
Power Switches ◽  
Driver Circuit ◽  
Gate Driver

This paper introduces a new premium multilevel inverter (MLI) topology with cascaded H-Bridge and series-parallel connected switches to synthesize the fundamental sine wave with various levels of voltage. The component count is decreased by reducing the number of power switching devices, optoisolators, voltage gate drivers, snubber and filter circuits. The combination of two power switches and a separated DC (SDC) source is called an SDC module. Five SDC modules are required for a 63-level MLI and six SDC modules are required for a 127-level MLI. In this paper, both a 63-level and a 127-level filter-less single-phase MLIs are deliberated. The switches are controlled by employing a newer pulse width modulation (PWM) technique called periodic reduced digital carrier level shift PWM (PRDCLSPWM). As the number of levels increases to a greater extent, the total harmonic distortion diminishes without the need of filter circuit and the performance level also increases. Comparative analysis of proposed 63-level and 127-level MLIs topology with the conventional and modern topologies has been presented in terms of power switches, gate driver circuit requirement, DC voltage sources and THD limits. PRDCLSPWM scheme is derived and analyzed for the proposed 63-level and 127-level MLIs to eliminate low-order and high-order harmonics. Moreover, the performance of the proposed modulation scheme is compared with the most commonly used schemes. The modeling and simulation are done with MATLAB/SIMULINK 2016a.

New Topology for Asymmetrical Multilevel Inverter: An Effort to Reduced Device Count

2017 ◽  
Vol 27 (04) ◽  
pp. 1850055 ◽  
Author(s):  
Kishor Thakre ◽  
Kanungo Barada Mohanty ◽  
Vinaya Sagar Kommukuri ◽  
Aditi Chatterjee
Keyword(s):  
Output Voltage ◽  
Pulse Width Modulation ◽  
Harmonic Distortion ◽  
Multilevel Inverter ◽  
Dc Voltage ◽  
Experimental Implementation ◽  
Voltage Stress ◽  
Power Switches ◽  
Driver Circuit ◽  
Gate Driver

Nowadays, multilevel inverters (MLI) are receiving remarkable attention due to salient features like less voltage stress on switches and low total harmonic distortion (THD) in output voltage. However, the required switch count increases with number of voltage levels. This paper presents a new topology for asymmetric multilevel inverter as a fundamental block. Each block generates 13-level output voltage using eight switches and four unequal dc voltage sources. The proposed configuration offers special features such as reduced number of switches, isolated dc sources, cost economy, less complex and modular structure than other similar contemporary topologies. Moreover, significant reduction in voltage stress on the circuit switches can be achieved. Comparative studies of proposed topology with the conventional and recent topologies have been presented in terms of power switches, gate driver circuit requirement, isolated dc voltage sources and total standing voltage. Multicarrier-based sinusoidal pulse width modulation (SPWM) scheme is adopted for generating switching signals using dSPACE real-time controller. In addition, proposed topology offers a fewer number of ON-state switches that lead to reduction in power loss. The proposed topology is validated through simulation and experimental implementation.

scholarly journals Performance Evaluation of Cascaded and Reduced Switch Multilevel Inverter Using Modified Carrier Based PWM Technique

2020 ◽  
Vol 6 (1) ◽  
pp. 12-19
Author(s):  
Md Tariqul Islam ◽  
Md Fayzur Rahman ◽  
AA Md Monzur Ul Akhir ◽  
Zisun Ahmed
Keyword(s):  
Pulse Width ◽  
Pulse Width Modulation ◽  
Harmonic Distortion ◽  
Multilevel Inverter ◽  
Modulation Scheme ◽  
Switching Loss ◽  
Quality Performance ◽  
Triangular Wave ◽  
Switching Losses ◽  
Control Scheme

This paper proposes an improved harmonic distorted modified triangular carrier-based multicarrier pulse width modulation for generating the switching pulses of a multilevel inverter. This modified triangular wave consists of a triangular wave bearing a close resemblance to an ‘M’ shaped wave. The design of this carrier signal has been optimized to maintain a low level of total harmonic distortion (THD), while increasing the fundamental o/p voltage to ensure the effective DC voltage utilization. Moreover, this optimization reduces the switching losses and improve the efficiency of the power inverter. With the help of this carrier signal, High-frequency alternative phase opposition disposition pulse width modulation (APODPWM) is generated. This new control scheme has been applied to seven levels of conventional cascaded H-bridge with reduced switch multilevel inverter. The output is compared with conventional carrier-based APODPWM. The comparison is made in terms of THD, fundamental output voltages and inverter losses. To ensure quality performance, conventional carrier and modified carrier-based multicarrier PWM topologies are used for the Cascaded seven-level inverter with reduced switch seven-level inverter having a carrier frequency of 2 kHz and modulation index of 0.8-1.30. According to the simulation results, by using the proposed modulation scheme the THD and the switching loss were reduced by 9.64[%] and 4.2[%] respectively. Besides, the proposed modulation technique increases the fundamental output voltages. The total simulation process is done in MATLAB Simulink environment. GUB JOURNAL OF SCIENCE AND ENGINEERING, Vol 6(1), Dec 2019 P 12-19

scholarly journals A New Symmetric Multilevel Voltage Source Inverter with Least Number of Switches

10.29007/ldnz ◽  
2018 ◽  
Author(s):  
Malu Prajapati
Keyword(s):  
Output Power ◽  
Power Loss ◽  
Harmonic Distortion ◽  
Multilevel Inverter ◽  
Total Harmonic Distortion ◽  
Voltage Source ◽  
Voltage Source Inverter ◽  
Voltage Level ◽  
Driver Circuit ◽  
Gate Driver

In this paper, a new symmetric multilevel voltage source inverter is proposed which consist less number of switches as compared to conventional multilevel inverter. This new symmetric MLI is able to produce desired value of voltage level with reduced number of switches. Also, multilevel inverter has good harmonic profile that is able to reduce total harmonic distortion without affecting desired output power. Moreover, in comparison with conventional cascade multilevel inverter, this new symmetric topology ultimately reduced the number of switches, the number of gate driver circuit, inverter cost, installation area and power loss due to reduced amount of on state switches.

Reduction in components using modified topology for asymmetrical multilevel inverter

2019 ◽  
Vol 16 (1) ◽  
pp. 71-77 ◽  
Author(s):  
Kanungo Barada Mohanty ◽  
Kishor Thakre ◽  
Aditi Chatterjee ◽  
Ashwini Kumar Nayak ◽  
Vinaya Sagar Kommukuri
Keyword(s):  
Pulse Width Modulation ◽  
Multilevel Inverter ◽  
Modulation Scheme ◽  
Content Type ◽  
Basic Module ◽  
Experimental Implementation ◽  
Blocking Voltage ◽  
Comparison Results ◽  
Main Emphasis ◽  
Gate Driver

Purpose This study aims to propose a modified topology for an asymmetric multilevel inverter as a basic module that generates 13-level output voltage waveform. The basic module consists of eight switches (unidirectional and bidirectional switch) and four DC voltage sources with unequal magnitudes. The proposed topology reduces the number of switches, isolated DC sources, cost and size of the circuit significantly as compared to other topologies. In addition, the proposed circuit provides a modular structure for a multilevel inverter. Design/methodology/approach The proposed configuration is implemented through simulation and hardware development of a single-phase 13-level inverter prototype. A multicarrier-based pulse width modulation scheme is adopted for generating switching signals by using dSPACE real-time controller. Findings To demonstrate the advantages of the proposed configuration, a comparative analysis is carried out with other multilevel topologies in terms of number of switches, gate driver circuits, on-state switches and blocking voltage on the switches. The comparison results confirmed that the proposed configuration requires less number of components for the same number of voltage levels. Moreover, the peak inverse voltage on switches and losses is lower in the proposed configuration. Originality/value In the available literature, numerous topologies are presented with main emphasis on the reduced components count. In this study, the authors proposed a new topology for an asymmetrical source configuration. The performance of the proposed topology under steady-state and dynamic conditions is evaluated using simulation and experimental implementation.

scholarly journals Modeling and Simulation of 127 Level Optimal Multilevel Inverter with Lower Number of Switches and Minimum THD

2018 ◽  
Vol 9 (4) ◽  
pp. 1765
Author(s):  
Bolla Madhusudana Reddy ◽  
Y. V. Siva Reddy ◽  
M. Vijaya Kumar
Keyword(s):  
Pulse Width Modulation ◽  
Harmonic Distortion ◽  
Multilevel Inverter ◽  
Basic Unit ◽  
Dc Voltage ◽  
Power Switches ◽  
Minimum Number ◽  
Current Production ◽  
Multi Level ◽  
High Level

<p><span lang="EN-US">This paper proposes a new optimal high level multilevel inverter with minimum number of components. This multi level inverter (MLI) is designed with series combination of basic units which can generate positive levels at output. DC source values applied for each basic unit is different with another. An H bridge is connected across proposed MLI for generating negative levels along with positive levels at output and that inverter considered as proposed high level optimal multilevel inverter. Single unit is responsible producing 21 levels. Therefore six units are connected in cascaded form to increase number of levels as 127 at output. Decrease in the number of power switches, driver circuits, and dc voltage sources are the improvement of the proposed MLI. Sinusoidal multiple pulse width modulation (SPWM) technique is implemented to produce pulses for turning ON switches according requirement. Low total harmonic distortion at output voltage or current production is major advantage of proposed module. The validations of proposed MLI results are verified through MATLAB/SIMULINK.</span></p>

A Symmetrical Multilevel Inverter Topology with Minimal Switch Count and Total Harmonic Distortion

2020 ◽  
Vol 29 (11) ◽  
pp. 2050174 ◽  
Author(s):  
Kavali Janardhan ◽  
Arvind Mittal ◽  
Amit Ojha
Keyword(s):  
Output Voltage ◽  
Pulse Width Modulation ◽  
Harmonic Distortion ◽  
Multilevel Inverter ◽  
Total Harmonic Distortion ◽  
Lookup Table ◽  
Control Technique ◽  
Power Switches ◽  
Dspace 1104 ◽  
Working Principle

A multilevel inverter (MLI) with reduced number of power devices, especially for the higher output levels, is presented in this paper. The generalized topology for ([Formula: see text]) level MLI is developed with symmetrical isolated dc sources and ([Formula: see text]) number of switches. A five-level MLI is developed with five power switches and then by adding each one additional switch two more levels are added in the output voltage waveform. With the help of lookup table, the working principle of the proposed five-level MLI topology is explained. Sinusoidal pulse width modulation–phase disposition control technique has been used to get a minimal total harmonic distortion (THD). The proposed MLI topology is simulated on the MATLAB platform. The laboratory prototype is developed for five-level MLI, and the experimental results obtained validate the simulation studies. The dSPACE 1104 is used for generating gate pulses in case of experimentation. The output voltage and current THDs obtained are 9.20% and 4.60%, respectively; the harmonics are mitigated more with five-level inverter. The proposed topology is compared with the cascaded H-bridge multilevel inverter.

scholarly journals A novel impedance source fed H-type flying capacitor multilevel inverter

2019 ◽  
Vol 8 (3) ◽  
pp. 225
Author(s):  
Chinnapettai Ramalingam Balamurugan ◽  
P. Vijayakumar ◽  
T. Sengolrajan
Keyword(s):  
Amplitude Modulation ◽  
Pulse Width ◽  
Pulse Width Modulation ◽  
Harmonic Distortion ◽  
Sine Wave ◽  
Multilevel Inverter ◽  
Modulation Index ◽  
Performance Indices ◽  
Third Harmonic ◽  
Simulation Results

<p>In this paper, simulation using MATLAB/SIMULINK is performed with<br />bipolar triangular fixed amplitude multi-carrier Phase Disposition (PD)<br />PWM strategy with sine wave, Third Harmonic Injection, 60 degree Pulse Width Modulation and stepped wave reference for the chosen impedance Source based H-Type flying capacitor Multilevel Inverter (ISBH-Type FCMLI). The root means square value of the fundamental component and Total Harmonic Distortion of the output voltage which are the most important performance indices for the chosen inverter topologies are evaluated presented and compared for various references through duty ratios. From the simulation results it is observed that for various references the THD is almost similar but the root mean square value in terms of voltage is more for THI, 60 degree PWM and stepped wave reference with phase disposition strategy. The results are obtained for ma (amplitude modulation index) &lt; 1 (under amplitude modulation index), ma=1 (normal amplitude modulation index) and ma &gt; 1 (over amplitude modulation index).</p>

Simulation and Analysis of Novel Extendable Multilevel Inverter Topology

2019 ◽  
Vol 28 (06) ◽  
pp. 1950089 ◽  
Author(s):  
V. Thiyagarajan ◽  
P. Somasundaram ◽  
K. Ramash Kumar
Keyword(s):  
Single Phase ◽  
Harmonic Distortion ◽  
Multilevel Inverter ◽  
Voltage Waveform ◽  
Dc Voltage ◽  
Switching Losses ◽  
Comparison Results ◽  
Symmetrical Condition ◽  
Gate Driver ◽  
Inverter Topology

Multilevel inverter (MLI) has become more popular in high power, high voltage industries owing to its high quality output voltage waveform. This paper proposes a novel single phase extendable type MLI topology. The term ‘extendable’ is included since the presented topology can be extended with maximum number of dc voltage sources to synthesize larger output levels. This topology can be operated in both symmetrical and asymmetrical conditions. The major advantages of the proposed inverter topology include minimum switching components, reduced gate driver circuits, less harmonic distortion and reduced switching losses. The comparative analysis based on the number of switches, dc voltage sources and conduction switches between the proposed topology and other existing topologies is presented in this paper. The comparison results show that the proposed inverter topology requires fewer components. The performance of the proposed MLI topology has been analyzed in both symmetrical and asymmetrical conditions. The simulation model is developed using MATLAB/SIMULINK software to verify the performance of the proposed inverter topology and also the feasibility of the presented topology during the symmetrical condition has been validated experimentally.

Switched capacitor based single DC source boost multilevel inverter (S2-MLI) featuring isolation based soft charging with minimum device count

2021 ◽  
Vol 0 (0) ◽  
Author(s):  
Tamiru Debela ◽  
Jiwanjot Singh
Keyword(s):  
Pulse Width Modulation ◽  
Multilevel Inverter ◽  
Superior Performance ◽  
Inrush Current ◽  
Switched Capacitor ◽  
Multilevel Inverters ◽  
Current Voltage ◽  
Power Switches ◽  
Input Source ◽  
Interest In Research

Abstract Multilevel inverters (MLIs) have formed a new wave of interest in research and industry. Switched capacitor-based multilevel inverters are used to avoid the need for multiple separated DC sources compared to cascaded MLIs. However, the inclusion of several capacitors creates problems such as high inrush current, voltage imbalance. To avoid these drawbacks, this paper proposes an isolation-based scheme by using a flyback converter in the switched capacitor multilevel inverter. Further, the overall topology provides step-up AC voltage across the load from a single DC source with fewer power switches. To generate a step-up five-level voltage across the load, switched capacitor-based multilevel inverter needs six power switches and only one capacitor. To get the appropriate switching operation to generate the NL-levels, phase disposition pulse width modulation (PD-PWM) has been developed. The extended nine-level S 2 -MLI is also discussed in this paper under different conditions as change in input source voltage and dynamic load change. Moreover, to prove the superior performance of switched-capacitor single DC source multilevel inverter (S2-MLI), comparative analysis with existing single DC source MLI has been performed. The effectiveness and feasibility of the proposed topology are tested with varieties of loads by simulation using Matlab/Simulink. To validate the simulation results, hardware implementation has been done of five-level S2-MLI considering resistive and motor load by using DSpace 1103 controller.

Comparative Study of Two Different Converters with its Controller for Grid Connected WECS with PMSG

2019 ◽  
Vol 8 (2) ◽  
pp. 1-24
Author(s):  
Sasmita Behera ◽  
Matruprasad Jyotiranjan
Keyword(s):  
Power Quality ◽  
Pulse Width Modulation ◽  
Harmonic Distortion ◽  
Synchronous Generator ◽  
Electrical Energy ◽  
Maximum Power ◽  
Multilevel Inverter ◽  
Resistive Load ◽  
Power Extraction ◽  
Point Tracking

Wind is a source for generating clean and economical electrical energy with a proper harnessing mechanism. For a wind energy conversion system (WECS), maximum power extraction with optimum power quality is required. In this article, the grid power quality is enhanced, using a multilevel inverter which provides smoother and pure sinusoidal waves as compared to two-level inverter by decreasing total harmonic distortion (THD) in WECS with a permanent magnet synchronous generator (PMSG). Also, a maximum power point tracking (MPPT) algorithm is based on an optimal torque controller, employed to extract more power. In this study, a WECS with a PMSG connected to the local linear resistive load and grid is considered for simulation. A multilevel inverter grid interface is controlled by in phase disposition pulse width modulation (IPD – PWM). The multilevel inverter with MPPT has been acknowledged as superior to a normal two-level inverter without MPPT Controller. Simulation results as observed for fixed and variable wind speed including MPPT demonstrate benefits of the proposed method.

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