Compact Charge-Controlled Memristance Simulator with Electronic/Resistive Tunability

Author(s):  
Kapil Bhardwaj ◽  
Mayank Srivastava

The work endeavors to realize a single Voltage Differencing Current Conveyor (VDCC)-based current-controlled memristor emulator with charge-dependent linear memristance function. Such current-controlled memristors closely model the current ([Formula: see text])–voltage ([Formula: see text]) relationship of the popular TiO2-based physical memristor architecture constructed by Hewlett–Packard (HP). The presented emulator circuit comprises only two grounded passive elements and two external MOS transistors along with a VDCC active element and provides the facility of electronic/resistive tunability. It is found through the detailed literature survey that the presented circuit is the most compact design to realize a charge-controlled memristance simulator as compared to any previously reported structure. The designed configuration has been verified through presented simulation results generated using PSPICE based on 0.18[Formula: see text][Formula: see text]m CMOS technology. It has also been validated through relaxation and chaotic oscillators developed using the proposed VDCC-based memristor emulator and output waveforms have been shown. Furthermore, the discussed memristor emulator has been implemented and verified through commercial ICs, AD844 and LM13700.

2019 ◽  
Vol 28 (10) ◽  
pp. 1950166 ◽  
Author(s):  
Rajeev Kumar Ranjan ◽  
Pankaj Kumar Sharma ◽  
Sagar ◽  
Niranjan Raj ◽  
Bharti Kumari ◽  
...  

A charge-controlled memristor emulator circuit based on one kind of active device [operational transconductance amplifier (OTA)] using CMOS technology is introduced in this paper. The proposed circuit can be configured in both incremental and decremental types by using a simple switch. The memristor behavior can be electronically tuned by adjusting the transconductance of the OTAs. By changing the value of the capacitor, the pinched hysteresis loop observed in the current versus voltage plane can be held at higher frequencies. The proposed emulator circuit functions well up to 500 kHz. The experiment has been performed using commercially available OTA ICs (CA3080). The experimental demonstration has been carried out for 10, 20 and 120[Formula: see text]kHz. A simple high-pass filter is explained in both configurations to demonstrate the functionality of the proposed memristor emulator. The proposed circuit has been simulated in PSPICE using 0.5-[Formula: see text]m CMOS parameter. The simulated and experimental results validate the theoretical proposition.


2014 ◽  
Vol 65 (3) ◽  
pp. 137-143 ◽  
Author(s):  
Jan Jerabek ◽  
Roman Sotner ◽  
Kamil Vrba

Abstract The main aim of this paper is to present solution of triple-input single-output (TISO) filter with independently adjustable pole frequency, quality factor, bandwidth and also gain. Filter is universal, operates in current mode and includes only one active element - the so-called Controlled-Gain Voltage Differencing Current Conveyor (CG-VDCC) with two controllable parameters: transconductance (gm) and gain of output currents (BX ). Implementation of CG-VDCC element in 0.18 μm CMOS technology is also included and this model is used in proposed filter simulations.


2019 ◽  
Vol 29 (05) ◽  
pp. 2050078 ◽  
Author(s):  
Mohammad Faseehuddin ◽  
Jahariah Sampe ◽  
Sadia Shireen ◽  
Sawal Hamid Md Ali

In this paper, a new active element namely Dual-X current conveyor differential input transconductance amplifier (DXCCDITA) is proposed. The DXCCDITA is utilized in designing four minimum component fully cascadable all pass filter (APF) structures. The designed all pass filters require only single active element and one/two passive elements for realization thus making them a minimum component implementation. Two among the four presented all pass structures require only a single capacitor for implementation. A scheme for realizing nth order all pass filter is also suggested and a fourth order voltage mode (VM) filter is developed from the proposed scheme. The effect of non-idealities on the proposed all pass filters is also studied. A simple oscillator is also developed using one of the all pass filter structure. The oscillator required only one DXCCDITA, two capacitors and one resistor for implementation. The DXCCDITA is implemented in 0.35[Formula: see text][Formula: see text]m TSMC CMOS technology parameters and tested in Tanner EDA. Sufficient numbers of simulations are provided to establish the functionality of all pass structures. The experimental results using commercially available integrated circuits (ICs) are also provided.


2018 ◽  
Vol 27 (10) ◽  
pp. 1850150 ◽  
Author(s):  
Sudhanshu Maheshwari

This paper presents first-order voltage-mode filters using a single current conveyor with an additional X-stage, and passive elements. The new circuits have multifunction capability, and also realize low-shelf, high-shelf and band-shelf functions. The study is carried out on the effects of non-idealities, parasitic elements, and loading on the performance of proposed circuits. Active and passive sensitivities are also analyzed. The active element, extra-X current conveyor used for designing new circuits is simpler than most of the one active element and two passive elements’ based circuits. Detailed comparisons are carried out with relevant available works, and the new circuits are found to be more compact and exhibit higher frequency performances. The simulation results using 0.25[Formula: see text][Formula: see text]m CMOS parameters with [Formula: see text]1.25[Formula: see text]V power-supply are shown to verify the proposed circuits. The proposed circuits are also verified through simulations. Experimental support is given using AD-844 ICs to strengthen the validity of the proposed circuits.


Author(s):  
Kapil Bhardwaj ◽  
Mayank Srivastava

The work reports two different configurations to emulate the floating memristor and inverse memristor behavior. The presented circuits are based on a modified concept of active element VDTA (Voltage Differencing Transconductance Amplifier) termed as MVDTA. The reported floating memristor employs only a single MVDTA and single grounded capacitance. On the other end, the floating emulation circuit of inverse memristor emulator is based on two MVDTAs and single grounded capacitance. The behavior of the realized element for both the configurations can be tuned electronically through biasing voltage. Also, there is no employment of any commercial IC or external circuitry for multiplication of analogue voltages which is generally required to implement memristive elements. Along with the circuit implementations, mathematical properties of ideal memristor and inverse memristor considering both symmetric as well as nonsymmetric models are discussed. All the emulation circuits are verified by executing simulations using CMOS 0.18[Formula: see text]um process technique under PSPICE environment. The reported circuits are also realized using commercially available IC LM13700 and results are presented.


2013 ◽  
Vol 2013 ◽  
pp. 1-11 ◽  
Author(s):  
Neeta Pandey ◽  
Praveen Kumar ◽  
Jaya Choudhary

This paper proposes current controlled differential difference current conveyor transconductance amplifier (CCDDCCTA), a new active building block for analog signal processing. The functionality of the proposed block is verified via SPICE simulations using 0.25 μm TSMC CMOS technology parameters. The usefulness of the proposed element is demonstrated through an application, namely, wave filter. The CCDDCCTA-based wave equivalents are developed which use grounded capacitors and do not employ any resistors. The flexibility of terminal characteristics is utilized to suggest an alternate wave equivalents realization scheme which results in compact realization of wave filter. The feasibility of CCDDCCTA-based wave active filter is confirmed through simulation of a third-order Butterworth filter. The filter cutoff frequency can be tuned electronically via bias current.


2007 ◽  
Vol 16 (04) ◽  
pp. 627-639 ◽  
Author(s):  
VARAKORN KASEMSUWAN ◽  
WEERACHAI NAKHLO

A simple 1.5 V rail-to-rail CMOS current conveyor is presented. The circuit is developed based on a complementary source follower with a common-source output stage. The circuit is designed using a 0.13 μm CMOS technology and HSPICE is used to verify the circuit performance. The current conveyor exhibits low impedance at terminal X (7.2 Ω) and can drive ± 0.6 V to the 300 Ω with the total harmonic distortion of 0.55% at the operating frequency of 3 MHz. The voltage transfer error (between the Y and X terminals) and current transfer error (between the X and Y terminals) are small (-0.2 dB). The power dissipation and bandwidth are 532 μW and over 300 MHz, respectively.


1998 ◽  
Vol 08 (05n06) ◽  
pp. 541-558 ◽  
Author(s):  
VINCENT C. GAUDET ◽  
P. GLENN GULAK

This paper is a tutorial introduction to field-programmable analog arrays, as well as a review of existing field-programmable analog array architectures, of both educational and industrial origin. Circuit issues relevant to the development of high-bandwidth FPAAs are presented. A current conveyor-based architecture, which promises to achieve video bandwidths, is described. Test results are presented for the CMOS current conveyor-based FPAA building block, with programmable transconductors and capacitors. Measurements indicate bandwidths in excess of 10 MHz, and functionality of amplifiers, integrators, differentiators, and adders. The die area is 1.5 mm× 3.5 mm in a 0.8 μm CMOS technology.


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