Electrical Properties of Solution Processed In–Ga–ZnO Thin Film Transistors with Multi-Stacked Active Layer

2015 ◽  
Vol 15 (10) ◽  
pp. 7508-7512 ◽  
Author(s):  
Soon Kon Kim ◽  
Pyung Ho Choi ◽  
Sang Sub Kim ◽  
Hyun Woo Kim ◽  
Na Young Lee ◽  
...  

In this study, we prepared solution-based In–Ga–ZnO thin film transistors (IGZO TFTs) having a multistacked active layer. The solution was prepared using an In:Zn = 1:1 mole ratio with variation in Ga content, and the TFTs were fabricated by stacking layers from the prepared solutions. After we measured the mobility of each stacked layer, the saturation mobility showed values of 0.8, 0.6 and 0.4 (cm2/Vs), with an overall decrease in electrical properties. The interface formed between the each layers affected the current path, resulting in reduced electrical performance. However, when the gate bias VG = 10 V was applied for 1500 s, the threshold voltage shift decreased in the stack. The uniformity of the active layer was improved in the stacked active layer by filling the hole formed during pre-baking, resulting in improved device stability. Also, the indium ratio was increased to enhance the mobility from 0.86 to 3.47. These results suggest high mobility and high stability devices can be produced with multistacked active layers.

Coatings ◽  
2021 ◽  
Vol 11 (8) ◽  
pp. 969
Author(s):  
Haiyang Xu ◽  
Xingwei Ding ◽  
Jie Qi ◽  
Xuyong Yang ◽  
Jianhua Zhang

In this work, Y2O3–Al2O3 dielectrics were prepared and used in ZnO thin film transistor as gate insulators. The Y2O3 film prepared by the sol–gel method has many surface defects, resulting in a high density of interface states with the active layer in TFT, which then leads to poor stability of the devices. We modified it by atomic layer deposition (ALD) technology that deposited a thin Al2O3 film on the surface of a Y2O3 dielectric layer, and finally fabricated a TFT device with ZnO as the active layer by ALD. The electrical performance and bias stability of the ZnO TFT with a Y2O3–Al2O3 laminated dielectric layer were greatly improved, the subthreshold swing was reduced from 147 to 88 mV/decade, the on/off-state current ratio was increased from 4.24 × 106 to 4.16 × 108, and the threshold voltage shift was reduced from 1.4 to 0.7 V after a 5-V gate was is applied for 800 s.


2011 ◽  
Vol 58 (5(1)) ◽  
pp. 1307-1311 ◽  
Author(s):  
Kwang-Seok Jeong ◽  
Yu-Mi Kim ◽  
Jeong-Gyu Park ◽  
Seung-Dong Yang ◽  
Ho-Jin Yun ◽  
...  

2019 ◽  
Vol 9 (1) ◽  
Author(s):  
Zhuofa Chen ◽  
Dedong Han ◽  
Xing Zhang ◽  
Yi Wang

AbstractIn this paper, we investigated the performance of thin-film transistors (TFTs) with different channel configurations including single-active-layer (SAL) Sn-Zn-O (TZO), dual-active-layers (DAL) In-Sn-O (ITO)/TZO, and triple-active-layers (TAL) TZO/ITO/TZO. The TAL TFTs were found to combine the advantages of SAL TFTs (a low off-state current) and DAL TFTs (a high mobility and a low threshold voltage). The proposed TAL TFTs exhibit superior electrical performance, e.g. a high on-off state current ratio of 2 × 108, a low threshold voltage of 0.63 V, a high field effect mobility of 128.6 cm2/Vs, and a low off-state current of 3.3 pA. The surface morphology and characteristics of the ITO and TZO films were investigated and the TZO film was found to be C-axis-aligned crystalline (CAAC). A simplified resistance model was deduced to explain the channel resistance of the proposed TFTs. At last, TAL TFTs with different channel lengths were also discussed to show the stability and the uniformity of our fabrication process. Owing to its low-processing temperature, superior electrical performance, and low cost, TFTs with the proposed TAL channel configuration are highly promising for flexible displays where the polymeric substrates are heat-sensitive and a low processing temperature is desirable.


Electronics ◽  
2020 ◽  
Vol 9 (11) ◽  
pp. 1875
Author(s):  
Hwan-Seok Jeong ◽  
Hyun Seok Cha ◽  
Seong Hyun Hwang ◽  
Hyuck-In Kwon

In this study, we examined the effects of the annealing atmosphere on the electrical performance and stability of high-mobility indium-gallium-tin oxide (IGTO) thin-film transistors (TFTs). The annealing process was performed at a temperature of 180 °C under N2, O2, or air atmosphere after the deposition of IGTO thin films by direct current magnetron sputtering. The field-effect mobility (μFE) of the N2- and O2-annealed IGTO TFTs was 26.6 cm2/V·s and 25.0 cm2/V·s, respectively; these values were higher than that of the air-annealed IGTO TFT (μFE = 23.5 cm2/V·s). Furthermore, the stability of the N2- and O2-annealed IGTO TFTs under the application of a positive bias stress (PBS) was greater than that of the air-annealed device. However, the N2-annealed IGTO TFT exhibited a larger threshold voltage shift under negative bias illumination stress (NBIS) compared with the O2- and air-annealed IGTO TFTs. The obtained results indicate that O2 gas is the most suitable environment for the heat treatment of IGTO TFTs to maximize their electrical properties and stability. The low electrical stability of the air-annealed IGTO TFT under PBS and the N2-annealed IGTO TFT under NBIS are primarily attributed to the high density of hydroxyl groups and oxygen vacancies in the channel layers, respectively.


2014 ◽  
Vol 25 (1) ◽  
pp. 134-141 ◽  
Author(s):  
Mazran Esro ◽  
George Vourlias ◽  
Christopher Somerton ◽  
William I. Milne ◽  
George Adamopoulos

2012 ◽  
Vol 100 (17) ◽  
pp. 173501 ◽  
Author(s):  
Hyun-Sik Choi ◽  
Sanghun Jeon ◽  
Hojung Kim ◽  
Jaikwang Shin ◽  
Changjung Kim ◽  
...  

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