A Low Phase Noise Fully Monolithic 6 GHz Differential Coupled NMOS LC-VCO

Frequenz ◽  
2016 ◽  
Vol 70 (1-2) ◽  
Author(s):  
Dorra Mellouli Moalla ◽  
David Cordeau ◽  
Hassene Mnif ◽  
Jean-Marie Paillot ◽  
Mourad Loulou
Keyword(s):  
Phase Noise ◽  
Supply Voltage ◽  
Voltage Controlled Oscillator ◽  
Power Supply Voltage ◽  
Worst Case ◽  
Resistive Network ◽  
Phased Antenna Array ◽  
Free Running ◽  
Phase Progression ◽  
Low Phase Noise

AbstractA fully monolithic 6 GHz low-phase noise Voltage-Controlled-Oscillator (VCO) is presented in this paper. It consists in two LC-NMOS differential VCOs coupled through a resistive network and is implemented on a 0.25 µm BiCMOS SiGe process. This proposed integrated VCO can be used also for phased-array applications to steer the beam over the entire spatial range. In this case, the radiation pattern of the phased antenna array is steered in a particular direction by establishing a constant phase progression in the oscillator chain which can be obtained by detuning the free-running frequencies of the two oscillators in the array. At 2.5 V power supply voltage and a power dissipation of 62.5 mW, the coupled VCO array features a measured worst case phase noise of

Design and analysis of a low noise CMOS charge pump phase locked loop circuit

2021 ◽  
pp. 2140002
Author(s):  
Yanbo Chen ◽  
Shubin Zhang
Keyword(s):  
Phase Noise ◽  
Supply Voltage ◽  
Charge Pump ◽  
Phase Locked Loop ◽  
Low Noise ◽  
Cmos Process ◽  
Voltage Controlled Oscillator ◽  
Output Frequency ◽  
Power Supply Voltage ◽  
Supply Noise

Phase Locked Loop (PLL) circuit plays an important part in electronic communication system in providing high-frequency clock, recovering the clock from data signal and so on. The performance of PLL affects the whole system. As the frequency of PLL increases, designing a PLL circuit with lower jitter and phase noise becomes a big challenge. To suppress the phase noise, the optimization of Voltage Controlled Oscillator (VCO) is very important. As the power supply voltage degrades, the VCO becomes more sensitive to supply noise. In this work, a three-stage feedforward ring VCO (FRVCO) is designed and analyzed to increase the output frequency. A novel supply-noise sensing (SNS) circuit is proposed to suppress the supply noise’s influence on output frequency. Based on these, a 1.2 V 2 GHz PLL circuit is implemented in 110 nm CMOS process. The phase noise of this CMOS charge pump (CP) PLL is 117 dBc/Hz@1 MHz from test results which proves it works successfully in suppressing phase noise.

Low Phase Noise Voltage Controlled Oscillator Using Cascode and Current-Reuse Techniques for Radio Frequency Circuits

2013 ◽  
Vol 479-480 ◽  
pp. 513-516
Author(s):  
Shuo Chang Hsu ◽  
Meng Ting Hsu ◽  
Yu Tuan Hsu
Keyword(s):  
Phase Noise ◽  
Power Dissipation ◽  
Supply Voltage ◽  
Building Blocks ◽  
Voltage Controlled Oscillator ◽  
Ieee 802.11A ◽  
Current Reuse ◽  
Chip Fabrication ◽  
Offset Frequency ◽  
Low Phase Noise

The voltage-controlled-oscillator (VCO) is one of the most important building blocks in the system. The chip fabrication of VCO is made by TSMC 0.18μm 1P6M CMOS standard process. The chip presents a low power and low phase noise for IEEE 802.11a applications, the PMOS casecode and current-reuse cross-couple technology are designed to improve phase noise and reduce power. The measured results of phase noise is-120.87 dBc/Hz at 1MHz offset frequency from the carrier frequency 5.05 GHz, and operates frequency from 5.04 GHz to 5.895 GHz with a tuning range of 17.14%. Under supply voltage 1.65V, the core power dissipation is 4.05 mW.

scholarly journals A LOW PHASE NOISE, POWER EFFICIENT VOLTAGE CONTROLLED OSCILLATOR USING 0.18-μM CMOS TECHNOLOGY

2014 ◽  
pp. 256-259
Author(s):  
AJIT SAMASGIKAR
Keyword(s):  
Power Consumption ◽  
Phase Noise ◽  
Tuning Range ◽  
Supply Voltage ◽  
Cmos Technology ◽  
Noise Power ◽  
Voltage Controlled Oscillator ◽  
Power Efficient ◽  
Sustained Oscillations ◽  
Low Phase Noise

A low phase noise, power efficient VCO using UMC 0.18μm CMOS technology has been proposed in this paper. The proposed VCO has a tuning range of 9.71GHz to 9.9GHz, with a phase noise of -79.88 dBc/Hz @ 600kHz offset. The Vtune ranging between 1V - 1.5V generates sustained oscillations. The maximum power consumption of the VCO is 11.9mW using a supply voltage of 1.8V with ±10% variation.

A Wideband Gain Linearized Microwave Voltage Controlled Oscillator with Low Phase Noise Variation in Nanometer CMOS Technology

2015 ◽  
Vol 24 (03) ◽  
pp. 1550024 ◽  
Author(s):  
Mohammed Aqeeli ◽  
Abdullah Alburaikan ◽  
Cahyo Muvianto ◽  
Xianjun Huang ◽  
Zhirun Hu
Keyword(s):  
Phase Noise ◽  
Frequency Tuning ◽  
Supply Voltage ◽  
Cmos Technology ◽  
Voltage Controlled Oscillator ◽  
Lower Phase ◽  
Nanometer Cmos ◽  
Digitally Controlled ◽  
Binary Weighted ◽  
Low Phase Noise

A wideband CMOS LC tank voltage-controlled oscillator (VCO) with low phase noise variations and a linearized gain has been designed using a new binary-weighted switched-capacitor and digitally-controlled varactor bank. The novel design has the advantages of more linear VCO frequency tuning, lower phase noise and reduced gain to variations in supply voltage. The proposed VCO has been designed using UMC 90-nm, 6-metal CMOS technology and features phase noise variation of less than 4.9 dBc/Hz. The VCO operates from 3.45 to 6.55 GHz, with phase noise of -133.4 dBc/Hz at a 1 MHz offset, a figure of merit (FoM) of -203.3 dBc/Hz, less than 41 dBm spurious harmonics, and a total VCO core current consumption of 1.18 mA from a 3.3 V voltage supply. To the authors' knowledge, this is the lowest phase noise variation ever reported.

IMPLEMENTATION OF AN RF CMOS QUADRATURE LC VOLTAGE-CONTROLLED OSCILLATOR BASED ON THE SWITCHED TAIL TRANSISTOR TOPOLOGY

2010 ◽  
Vol 19 (05) ◽  
pp. 931-937
Author(s):  
APINUNT THANACHAYANONT ◽  
MONAI KRAIRIKSH
Keyword(s):  
Phase Noise ◽  
Supply Voltage ◽  
Coupling Mechanism ◽  
Voltage Controlled Oscillator ◽  
Rf Cmos ◽  
Power Supply Voltage ◽  
Switch Capacitor ◽  
Measurement Results ◽  
Offset Frequency ◽  
Signal Swing

This paper describes the design and implementation of an RF CMOS quadrature LC voltage-controlled oscillator in a 0.35 μm technology. The proposed oscillator employs the switched tail transistor topology and differential switch capacitor tuning to achieve low phase noise operation. A modified series coupling mechanism is used for quadrature signal generation with wide output signal swing. The oscillator core circuit was designed to operate with a 2.5 V power supply voltage with a 4 mA total supply current. Measurement results showed that the prototype oscillator could achieve a nominal oscillation frequency of 2.2 GHz with -110 dBc/Hz phase noise at 1 MHz offset frequency.

Low Phase Noise and Low Power Voltage-Controlled-Oscillator Using Current-Reuse Techniques for Wireless Communication Circuits

2013 ◽  
Vol 479-480 ◽  
pp. 1010-1013
Author(s):  
Tsung Han Han ◽  
Meng Ting Hsu ◽  
Cheng Chuan Chung
Keyword(s):  
Low Power ◽  
Phase Noise ◽  
Supply Voltage ◽  
Cmos Process ◽  
Voltage Controlled Oscillator ◽  
Chip Area ◽  
Voltage Controlled Oscillators ◽  
Communication Circuits ◽  
5 Ghz ◽  
Low Phase Noise

In this paper, we present low phase noise and low power of the voltage-controlled oscillators (VCOs) for 5 GHz applications. This chip is implemented by Taiwan Semiconductor Manufacturing Company (TSMC) standard 0.18 μm CMOS process. The designed circuit topology is included a current-reused configuration. It is adopted memory-reduced tail transistor technique. At the supply voltage 1.5 v, the measured output phase noise is-116.071 dBc/Hz at 1MHz offset frequency from the carrier frequency 5.2 GHz. The core power consumption is 3.7 mW, and tuning range of frequency is about 1.3 GHz from 4.8 to 6.1 GHz. The chip area is 826.19 × 647.83 um2.

Design of a Low-Phase-Noise LC Voltage Controlled Oscillator

2014 ◽  
Vol 519-520 ◽  
pp. 1095-1098
Author(s):  
Cheng Hong Dong ◽  
Chang Chun Zhang ◽  
Yu Feng Guo ◽  
Lei Lei Liu ◽  
Xin Cun Ji ◽  
...  
Keyword(s):  
Phase Noise ◽  
Figure Of Merit ◽  
Supply Voltage ◽  
Cmos Technology ◽  
Negative Resistance ◽  
Voltage Controlled Oscillator ◽  
Frequency Range ◽  
Supply Current ◽  
Low Phase Noise ◽  
Lc Vco

A novel low phase noise LC Voltage Controlled Oscillator (LC-VCO) is designed in standard 0.18μm CMOS technology. Instead of common NMOS cross-pairs for a conventional complementary LC VCO, both body-biasing and Q-enhancement techniques are employed to provide a larger negative resistance for the VCO. Post-layout simulations showed that it can oscillate at a frequency range of 4.34-4.73GHz, and comsume a supply current of 1.52mA from a supply voltage of 1.8V. The VCO achieves a phase noise of -132.8dBc/Hz @ 1MHz offset and a figure of merit (FOM) of -195.9dBc/Hz at the frequency of 4.5GHz. A die area of 475μm×498.6μm is occupied.

Design of 5 GHz low-power CMOS LC VCO based on complementary cross-coupled topology with modified tail current-shaping technique

2014 ◽  
Vol 6 (6) ◽  
pp. 573-580 ◽  
Author(s):  
Meng-Ting Hsu ◽  
Po-Hung Chen ◽  
Yao-Yen Lee
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Phase Noise ◽  
Supply Voltage ◽  
Voltage Controlled Oscillator ◽  
Measurement Results ◽  
Low Power Cmos ◽  
5 Ghz ◽  
Low Phase Noise ◽  
Manufacture Company

In this paper, a low-power CMOS LC voltage-controlled oscillator (VCO) with body-biasing and low-phase noise with Q-enhancement techniques is presented. A self-body biased circuit is introduced that can reduce power consumption. Some derivations of the Q-enhancement and how to improve the phase noise of the circuit are also discussed. This chip is implemented by the Taiwan Semiconductor Manufacture Company 0.18 µm 1P6M process. The measurement results exhibit a tuning range of 14.7% from 4.92 to 5.7 GHz at a supply voltage of 1.4 V. The power consumption of the core circuit and figure of merit are 2.5 mW and −188.6 dBc/Hz. The phase noise is −118 dBc/Hz@1 MHz at an operation frequency of 4.94 GHz.

Power Efficient Implementation of Low Noise CMOS LC VCO using 32nm Technology for RF Applications

2018 ◽  
Vol 6 (8) ◽  
pp. 53
Author(s):  
Shitesh Tiwari ◽  
Sumant Katiyal ◽  
Parag Parandkar
Keyword(s):  
Power Consumption ◽  
Phase Noise ◽  
Tuning Range ◽  
Low Voltage ◽  
Performance Comparison ◽  
Low Noise ◽  
Center Frequency ◽  
Voltage Controlled Oscillator ◽  
Low Phase Noise ◽  
Lc Vco

Voltage Controlled Oscillator (VCO) is an integral component of most of the receivers such as GSM, GPS etc. As name indicates, oscillation is controlled by varying the voltage at the capacitor of LC tank. By varying the voltage, VCO can generate variable frequency of oscillation. Different VCO Parameters are contrasted on the basis of phase noise, tuning range, power consumption and FOM. Out of these phase noise is dependent on quality factor, power consumption, oscillation frequency and current. So, design of LC VCO at low power, low phase noise can be obtained with low bias current at low voltage.  Nanosize transistors are also contributes towards low phase noise. This paper demonstrates the design of low phase noise LC VCO with 4.89 GHz tuning range from 7.33-11.22 GHz with center frequency at 7 GHz. The design uses 32nm technology with tuning voltage of 0-1.2 V. A very effective Phase noise of -114 dBc / Hz is obtained with FOM of -181 dBc/Hz. The proposed work has been compared with five peer LC VCO designs working at higher feature sizes and outcome of this performance comparison dictates that the proposed work working at better 32 nm technology outperformed amongst others in terms of achieving low Tuning voltage and moderate FoM, overshadowed by a little expense of power dissipation. 

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