Ion Species Dependence of Electrical Characteristics in Ion Implanted GaAs

1992 ◽  
Vol 279 ◽  
Author(s):  
L. He ◽  
W. A. Anderson

ABSTRACTFluorine, boron and oxygen implantation in GaAs has been investigated by electrical characterization using current-voltage (I-V), capacitance-voltage (C-V) and deep level transient spectroscopy (DLTS) techniques. Ion implantation at lOOkeV energy was conducted with doses of 1011 and 1012/cm2. Carrier compensation was observed in each implanted sample. The compensation effect strongly depended on ion implantation conditions and ion species. Severe surface damage was also induced which degrades electrical performance. Rapid thermal annealing (RTA) treatment showed the heavier ion implanted samples to be more thermally stable. Defect levels for each implanted species were compared and identified.

Materials ◽  
2021 ◽  
Vol 14 (8) ◽  
pp. 1966
Author(s):  
Domenico Pellegrino ◽  
Lucia Calcagno ◽  
Massimo Zimbone ◽  
Salvatore Di Franco ◽  
Antonella Sciuto

In this study, 4H-SiC p–n junctions were irradiated with 700 keV He+ ions in the fluence range 1.0 × 1012 to 1.0 × 1015 ions/cm2. The effects of irradiation were investigated by current–voltage (I–V) and capacitance–voltage (C–V) measurements, while deep-level transient spectroscopy (DLTS) was used to study the traps introduced by irradiation defects. Modifications of the device’s electrical performances were observed after irradiation, and two fluence regimes were identified. In the low fluence range (≤1013 ions/cm2), I–V characteristics evidenced an increase in series resistance, which can be associated with the decrease in the dopant concentration, as also denoted by C–V measurements. In addition, the pre-exponential parameter of junction generation current increased with fluence due to the increase in point defect concentration. The main produced defect states were the Z1/2, RD1/2, and EH6/7 centers, whose concentrations increased with fluence. At high fluence (>1013 ions/cm2), I–V curves showed a strong decrease in the generation current, while DLTS evidenced a rearrangement of defects. The detailed electrical characterization of the p–n junction performed at different temperatures highlights the existence of conduction paths with peculiar electrical properties introduced by high fluence irradiation. The results suggest the formation of localized highly resistive regions (realized by agglomeration of point defects) in parallel with the main junction.


2011 ◽  
Vol 178-179 ◽  
pp. 130-135 ◽  
Author(s):  
Vincent Quemener ◽  
Mari Alnes ◽  
Lasse Vines ◽  
Ola Nilsen ◽  
Helmer Fjellvåg ◽  
...  

ZnO/n-Si and ZnO/p-Si heterostructures were prepared by Atomic layer deposition (ALD) and the electronic properties have been investigated by Current-Voltage (I-V), Capacitance-Voltage (C-V) and Deep level transient spectroscopy (DLTS) measurements. DLTS measurements show two dominants electron traps at the interface of the ZnO/n-Si junction with energy position at 0.07 eV and 0.15 eV below the conduction band edge, labelled E(0.07) and E(0.15), respectively, and no electrically active defects at the interface of the ZnO/p-Si junction. E(0.07) is reduced by annealing up to 400°C while E(0.15) is created at 500°C. The best heterostructure is found after heat treatment at 400°C with a substantial improvement of the current rectification for ZnO/n-Si and the formation of Ohmic contact on ZnO/p-Si. A reduction of the interface defects correlates with an improvement of the crystal structure of the ZnO film with a preferred orientation along the c-axis.


2007 ◽  
Vol 1035 ◽  
Author(s):  
Qilin Gu ◽  
Xuemin Dai ◽  
Chi-Chung Ling ◽  
Shijie Xu ◽  
Liwu Lu ◽  
...  

AbstractUnintentionally doped n-type ZnO single crystals were implanted by nitrogen ions with different fluences of 1013, 1014 and 1015 cm−2 respectively. ZnO p-n homojunction was successfully fabricated due to the formation of p-type layer after 650°C post-implantation annealing in air for 30 minutes. Further thermal evolution of deep level defects was studied through thermal annealing up to 1200°C. Electrical characterization techniques including current-voltage (I-V), capacitance-voltage (C-V), Deep Level Transient Spectroscopy (DLTS) and double-correlation DLTS (DDLTS) were used for investigating the control sample, all the as-implanted and annealed samples through Au/n-ZnO Schottky diodes as well as ZnO p-n junctions. Detailed electrical properties of fabricated devices and characteristics of implantation induced defects were analyzed based on plentiful DLTS spectra. Moreover, low-temperature photoluminescence experiments of all the as-implanted and annealed samples were performed and the correlation between results from electrical and optical characterizations was discussed.


1998 ◽  
Vol 510 ◽  
Author(s):  
D.Z. Chi ◽  
S. Ashok ◽  
D. Theodore

AbstractThermal evolution of ion implantation-induced defects and the influence of concurrent titanium silicidation in pre-amorphized p-type Si (implanted with 25 KeV, 1016 cm2Si+) under rapid thermal processing (RTP) have been investigated. Presence of implantation-induced electrically active defects has been confirmed by current-voltage (IV) and deep level transient spectroscopy (DLTS) measurements. DLTS characterization results show that the evolution of electrically active defects in the Si implanted samples under RTP depend critically on the RTP temperature: Hole traps HI (0.33 eV) and H4 (0.47 eV) appear after the highest temperature (950 °C) anneal, while a single trap H3 (0.26 eV) shows up at lower anneal temperatures (≤ 900 °C). The thermal signature of H4 defect is very similar to that of the iron interstitial while those of HI and H3 levels appear to originate from some interstitial-related defects, possibly complexes. A most interesting finding is that the above interstitial related defects can be eliminated completely with Ti silicidation, apparently a result of vacancy injection. However the silicidation process itself introduces a new H2 (0.30 eV) level, albeit at much lower concentration. This same H2 level is also seen in unimplanted samples under RTP. The paper will present details of defect evolution under various conditions of RTP for samples with and without the self-implantation and silicidation.


1995 ◽  
Vol 378 ◽  
Author(s):  
Aditya Agarwal ◽  
S. Koveshnikov ◽  
K. Christensen ◽  
G. A. Rozgonyi

AbstractThe electrical properties of residual MeV ion implantation damage in Si after annealing from 600 to 1100°C for 1 hour have been investigated using Deep Level Transient Spectroscopy, Capaciatance-Voltage, and Current-Voltage measurements. These data have been correlated with structural defects imaged by Transmission Electron Microscopy. It is shown that at least 4 deep levels are associated with the buried layer of extended defects after annealing at 800, 900, 1000 and 1100°C. Additionally, for the wafer annealed at 800°C at least 5 more deep level centers are present in the device layer above the buried defects.


1996 ◽  
Vol 442 ◽  
Author(s):  
D. Seghier ◽  
H.P. Gislason

AbstractUsing current-voltage measurements, deep-level transient spectroscopy and admittance spectroscopy we investigated nitrogen doped ZnSe grown on p-GaAs substrates by molecular beam epitaxy. Three major hole traps were observed with energy levels at 0. 11, 0.46, and 0.56 eV from the valence band. We attribute the level at 0.11 eV to a nitrogen acceptor. No other direct observations of this important acceptor level in p-ZnSe have been reported in the literature so far. The two remaining levels may originate from the nitrogen doping process. In addition, reverse current-voltage characteristics of the ZnSe/GaAs heterojunction show a hysteresis at low temperature and a soft saturation. At a constant reverse bias the current increases slowly until it reaches a steady state value. This behavior is attributed to a slow voltage-induced barrier lowering due to the presence of mismatch interface states. Therefore, these analyses are of a major interest for applications of ZnSe/GaAs based devices and illustrates the necessity of improving the growth conditions of such structures.


1996 ◽  
Vol 442 ◽  
Author(s):  
P. N. K. Deenapanray ◽  
F. D. Auret ◽  
C. Schutte ◽  
G. Myburg ◽  
W. E. Meyer ◽  
...  

AbstractWe have employed current-voltage (IV), capacitance-voltage (CV) and deep level transient spectroscopy (DLTS) techniques to characterise the defects induced in n-Si during RF sputter-etching in an Ar plasma. The reverse leakage current, at a bias of 1 V, of the Schottky barrier diodes fabricated on the etched samples was found to decrease with etch time reaching a minimum at 6 minutes and thereafter increased. The barrier heights followed the opposite trend. The plasma processing introduced six prominent deep levels below the conduction band of the substrate. A comparison with the defects induced during high energy (MeV) alpha-particle, proton and electron irradiation of the same material revealed that plasma-etching created the VO- and VP-centres, and V2-10. Some of the remaining sputter-etching-induced (SEI) defects have tentatively been related to those formed during either 1 keV He- or Ar-ion bombardment.


2011 ◽  
Vol 679-680 ◽  
pp. 804-807 ◽  
Author(s):  
F. Danie Auret ◽  
Walter E. Meyer ◽  
M. Diale ◽  
P.J. Janse Van Rensburg ◽  
S.F. Song ◽  
...  

Gallium nitride (GaN), grown by HVPE, was implanted with 300 keV Eu ions and then annealed at 1000 oC . Deep level transient spectroscopy (DLTS) and Laplace DLTS (L-DLTS) were used to characterise the ion implantation induced defects in GaN. Two of the implantation induced defects, E1 and E2, with DLTS peaks in the 100 – 200 K temperature range, had DLTS signals that could be studied with L-DLTS. We show that these two defects, with energy levels of 0.18 eV and 0.27 eV below the conduction band, respectively, are two configurations of a metastable defect. These two defect states can be reproducibly removed and re-introduced by changing the pulse, bias and temperature conditions, and the transformation processes follow first order kinetics.


1987 ◽  
Vol 65 (8) ◽  
pp. 966-971 ◽  
Author(s):  
N. Christoforou ◽  
J. D. Leslie ◽  
S. Damaskinos

CdS–CuInSe2 solar cells, which have an efficiency of 9%, have been studied by current–voltage, capacitance–voltage, and capacitance-transient measurements over the temperature range 90–380 K. Deep-level transient spectroscopy analysis of the capacitance transient measurements reveals one majority carrier trap with an activation energy of 0.70 ± 0.02 eV. Although the present experiment cannot establish definitely if the trap is in the CdS or CuInSe2 layer, arguments are presented that it is a hole trap in the p-type CuInSe2 layer. Current–voltage measurements indicate a reversible increase in the reverse-bias leakage current with increasing temperature above 300 K. Evidence is presented that suggests that the rectifying barrier height in the CdS–CuInSe2 solar cell decreases rapidly with temperature above 300 K. Capacitance versus voltage measurements suggest that the depiction layer being studied is primarily in the CuInSe2, but the temperature dependence of the ionized charge concentration N(x) cannot be totally explained although one possible cause is suggested.


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