Recent Progress in SOI Materials and Devices for VLSI Applications

1993 ◽  
Vol 316 ◽  
Author(s):  
H. H. Hosack
Keyword(s):  
High Performance ◽  
Large Scale ◽  
Recent Progress ◽  
Low Voltage ◽  
Silicon On Insulator ◽  
Significant Interest ◽  
Significant Performance ◽  
Cmos Ic ◽  
Bulk Processing ◽  
Soi Technology

Silicon-On-Insulator (SOI) technology [1-4] has been shown to have significant performance and fabrication advantages over conventional bulk processing for a wide variety of large scale CMOS IC applications. Advantages in radiation environments has generated significant interest in this technology from military and space science communities [5,6]. Possible advantages of SOI technology for low power, low voltage and high performance circuit applications is under serious consideration by several commercial IC manufacturers [7,8].

LOW-NOISE SILICON-ON-INSULATOR HALL DEVICES

2004 ◽  
Vol 04 (02) ◽  
pp. L345-L354 ◽  
Author(s):  
Y. HADDAB ◽  
V. MOSSER ◽  
M. LYSOWEC ◽  
J. SUSKI ◽  
L. DEMEUS ◽  
...  
Keyword(s):  
Noise Level ◽  
Low Voltage ◽  
Silicon Layer ◽  
Electrical Current ◽  
Low Noise ◽  
Silicon On Insulator ◽  
Technological Parameters ◽  
Wide Range ◽  
Hall Sensors ◽  
Soi Technology

Hall sensors are used in a very wide range of applications. A very demanding one is electrical current measurement for metering purposes. In addition to high precision and stability, a sufficiently low noise level is required. Cost reduction through sensor integration with low-voltage/low-power electronics is also desirable. The purpose of this work is to investigate the possible use of SOI (Silicon On Insulator) technology for this integration. We have fabricated SOI Hall devices exploring the useful range of silicon layer thickness and doping level. We show that noise is influenced by the presence of LOCOS and p-n depletion zones near the edges of the active zones of the devices. A proper choice of SOI technological parameters and process flow leads to up to 18 dB reduction in Hall sensor noise level. This result can be extended to many categories of devices fabricated using SOI technology.

Low-voltage 0.35 μm CMOS/SOI technology for high-performance ASIC's

2002 ◽  
Author(s):  
A.O. Adan ◽  
T. Naka ◽  
S. Kaneko ◽  
D. Urabe ◽  
K. Higashi ◽  
...  
Keyword(s):  
High Performance ◽  
Low Voltage ◽  
Soi Technology

scholarly journals Microstructural Features and Mechanical Properties after Industrial Scale ECAP of an Al 6060 Alloy

2010 ◽  
Vol 667-669 ◽  
pp. 1153-1158 ◽  
Author(s):  
Philipp Frint ◽  
Matthias Hockauf ◽  
T. Halle ◽  
G. Strehl ◽  
Thomas Lampke ◽  
...  
Keyword(s):  
Mechanical Properties ◽  
Shear Zone ◽  
High Performance ◽  
Large Scale ◽  
Low Voltage ◽  
Tensile Tests ◽  
Industrial Applications ◽  
Industrial Scale ◽  
Opening Angle ◽  
Cross Sectional

Future applications of ultrafine-grained, high performance materials produced by equal-channel angular pressing (ECAP) will most likely require processing on an industrial scale. There is a need for detailed microstructural and mechanical characterisation of large-scale, ECAP-processed billets. In the present study, we examine the microstructure and mechanical properties as a function of location and orientation within large (50 x 50 x 300 mm³) billets of an Al 6060 alloy produced by ECAP (90° channel angle) with different magnitudes of backpressure. The internal deformation is analysed using a grid-line method on split billets. Hardness is recorded in longitudinal and cross-sectional planes. In order to further characterise the local, post-ECAP mechanical properties, tensile tests in different layers are performed. Moreover, low voltage scanning transmission electron microscopy observations highlight relevant microstructural features. We find that the homogeneity and anisotropy of mechanical properties within the billets depend significantly on the geometry of the shear zone. We demonstrate that deformation gradients can be reduced considerably by increasing the backpressure: The opening-angle of the fan-shaped shear zone is reduced from ψ ≈ 20 ° to ψ ≈ 7 ° when the backpressure is increased from 0 to 150 MPa. Backpressures of 150 MPa result in excellent homogeneity, with a relative variation of tensile mechanical properties of less than 7 %. Our investigation demonstrates that ECAP is suitable for processing homogenous, high performance materials on a large scale, paving the way for advanced industrial applications.

Assessment of Silicon—On—Insulator Technologies for Vlsi

1985 ◽  
Vol 53 ◽  
Author(s):  
B-Y. Tsaur
Keyword(s):  
High Performance ◽  
Cost Effective ◽  
Silicon On Insulator ◽  
Current Status ◽  
High Dose ◽  
Future Prospects ◽  
Device Structures ◽  
Radiation Hardened ◽  
Near Term ◽  
Soi Technology

ABSTRACTA high—performance, cost—effective silicon—on—insulator (SOI) technology would have important near—term applications in radiation—hardened electronics and longer term applications in submicrometer VLSI. The advantages of SOI over bulk Si technology for these applications will be outlined, and CMOS, CJFET, andbipolar device structures being developed for SOI will be discussed. The current status and future prospects of the two most promising SOI technologies —— beam recrystallization and high—dose oxygen implantation —— will be reviewed, with emphasis on such issues critical to commercialization as material quality and manufacturing feasibility.

Hybrid III-V-on-Silicon Microring Lasers

2013 ◽  
Vol 1538 ◽  
pp. 363-369
Author(s):  
Di Liang ◽  
Géza Kurczveil ◽  
Marco Fiorentino ◽  
Sudharsanan Srinivasan ◽  
David A. Fattal ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Wavelength Division Multiplexing ◽  
High Performance ◽  
Large Scale ◽  
Laser Cavity ◽  
Silicon On Insulator ◽  
Wavelength Division ◽  
Hybrid Iii ◽  
Hybrid Silicon ◽  
Silicon Based

ABSTRACTHybrid silicon laser is a promising solution to enable high-performance light source on large-scale, silicon-based photonic integrated circuits (PICs). As a compact laser cavity design, hybrid microring lasers are attractive for their intrinsic advantages of small footprint, low power consumption and flexibility in wavelength division multiplexing (WDM), etc. Here we review recent progress in unidirectional microring lasers and device thermal management. Unidirectional emission is achieved by integrating a passive reflector that feeds laser emission back into laser cavity to introduce extra unidirectional gain. Up to 4X of device heating reduction is simulated by adding a metal thermal shunt to the laser to “short” heat to the silicon substrate through buried oxide layer (BOX) in the silicon-on-insulator (SOI) substrate. Obvious device heating reduction is also observed in experiment.

Silicon-on-lnsulator Technology

MRS Bulletin ◽  
1998 ◽  
Vol 23 (12) ◽  
pp. 13-15 ◽  
Author(s):  
Jean-Pierre Colinge ◽  
Robert W. Bower
Keyword(s):  
Integrated Circuits ◽  
High Speed ◽  
Low Voltage ◽  
Silicon On Insulator ◽  
Cellular Phones ◽  
Long Time ◽  
Circuit Development ◽  
Materials Used ◽  
The 1960S ◽  
Soi Technology

Silicon-on-lnsulator (SOI) technology has been around since the 1960s when so-called silicon on sapphire (SOS) was first introduced. Silicon on sapphire has been used for many years for the fabrication of spaceborne and high-speed integrated circuits. It is still used in the fabrication of radio-frequency circuits.More recent SOI materials involve only silicon and silicon dioxide—the two most common materials used in the fabrication of integrated circuits—as opposed to SOS, which requires the use of an alumina substrate.Silicon-on-insulator technology has been used for a long time in niche applications such as spacecraft electronics and devices operating in a hightemperature or radiative environment. Recently however much attention has been paid to SOI technology because it is extremely suitable for the fabrication of low-voltage integrated circuits. Such circuits are in high demand for all kinds of portable systems, ranging from cellular phones to laptop computers. In August of 1998, IBM, Sharp, and other semiconductor manufacturers announced the development of SOI chips for high-speed computing and telecommunication con-sumer electronics. Most major semiconductor companies are putting considerable effort into SOI-circuit development for mainstream low-power applications.

Silicon-on-lnsulator Technology: Past Achievements and Future Prospects

MRS Bulletin ◽  
1998 ◽  
Vol 23 (12) ◽  
pp. 16-19 ◽  
Author(s):  
Jean-Pierre Colinge
Keyword(s):  
Integrated Circuits ◽  
Integrated Circuit ◽  
Low Voltage ◽  
Current Drive ◽  
Silicon On Insulator ◽  
Current Gain ◽  
Silicon Devices ◽  
Microelectronics Industry ◽  
Radiation Hard ◽  
Soi Technology

In silicon-on-insulator (SOI) technology, devices are dielectrically insulated from one another—usually by silicon dioxide. Unlike in conventional silicon devices, there is no direct contact between a transistor and the silicon substrate. The advantages of this type of isolation are many: reduced parasitic capacitances and reduced crosstalk between devices, improved current drive, subthreshold characteristics, and current gain. Silicon-on-insulator devices have been and are being used in several niche-market applications such as hightemperature and radiation-hard integrated circuits. However most importantly, SOI technology seems perfectly adapted to the needs of low-voltage, low-power (LVLP) electronic circuits. Because of the growing market for portable systems, LVLP technology is bound to soon become one of the drivers of the microelectronics industry, and SOI is likely to be part of it. Moreover major companies such as IBM, Sharp, Motorola, and Peregrine have announced upcoming lowpower and high-frequency lines of SOI products. The goal of this article is to introduce the reader to the basics of SOI device physics and the integrated-circuit applications of SOI.

A Review of Silicon-On-Insulator Formation by Oxygen Ion Implantation

1983 ◽  
Vol 27 ◽  
Author(s):  
Russell F. Pinizzotto
Keyword(s):  
Integrated Circuits ◽  
Large Scale ◽  
Single Crystal Silicon ◽  
Silicon Layer ◽  
High Energy ◽  
Silicon On Insulator ◽  
Epitaxial Silicon ◽  
Crystal Silicon ◽  
Buried Oxide ◽  
Soi Technology

ABSTRACTSilicon-on-Insulator structures will be an important technological advance used in future VLSI, VHSIC and threedimensional integrated circuits. The most mature SOI technology other than silicon-on-sapphire is SIMOX, or Separation by Implanted Oxygen. High energy oxygen ions are implanted into single crystal silicon until a stoichiometric buried silicon dioxide layer is formed. After implantation, the material is annealed at high temperature to remove implantation induced defects. The structure is completed by the growth of a thin epitaxial silicon layer. Devices and complex circuits have been successfully fabricated by several research groups. This paper reviews the development of this buried oxide SOI technology from 1973 to 1983. The five major sections discuss the advantages of SOI, the basics of buried oxide formation, the literature published between 1973 and 1983, key issues that must be solved before large scale implementation takes place and, finally, predictions of future developments.

scholarly journals EPSim-C: A Parallel Epoch-Based Cycle-Accurate Microarchitecture Simulator Using Cloud Computing

Electronics ◽  
2019 ◽  
Vol 8 (6) ◽  
pp. 716 ◽  
Author(s):  
Minseong Kim ◽  
Seon Wook Kim ◽  
Youngsun Han
Keyword(s):  
Cloud Computing ◽  
High Performance ◽  
Large Scale ◽  
Performance Enhancement ◽  
Memory Hierarchy ◽  
Computer Systems ◽  
Maximum Speed ◽  
Computing Platform ◽  
Significant Performance ◽  
Computing Platforms

Recently, computing platforms have been being configured on a large scale to satisfy the diverse requirements of emerging applications like big data and graph processing, neural network, speech recognition and so on. In these computing platforms, each computing node consists of a multicore, an accelerator, and a complex memory hierarchy, which are connected to other nodes using a variety of high-performance networks. Up to now, researchers have been using cycle-accurate simulators to evaluate the performance of computer systems in detail. However, the execution of the simulators, which models modern computing architecture for multi-core, multi-node, datacenter, memory hierarchy, new memory, and new interconnection, is too slow and infeasible; since the architecture has become more complex today, the complexity of the simulator is rapidly increasing. Therefore, it is seriously challenging to employ them in the research and development of next-generation computer systems. To solve this problem, we previously presented EPSim (Epoch-based Simulator), which defines epochs that can be run independently by dividing the simulation run into several sections and executes them in parallel on a multicore platform, resulting in only the limited simulation speedup. In this paper, to overcome the computing resource limitations on multi-core platforms, we propose a novel EPSim-C (EPSim on Cloud) simulator that extends EPSim and achieves higher performance using a cloud computing platform. EPSim-C is designed to perform the epoch-based executions in a massively parallel fashion by using MapReduce on Hadoop-based systems. According to our experiments, we have achieved a maximum speed of 87.0× and an average speed of 46.1× using 256 cores. As far as we know, EPSim-C is the only existing way to accelerate the cycle-accurate simulator on cloud platforms; thus, our significant performance enhancement allows researchers to model and research current and future cutting-edge computing platforms using real workloads.

SOI Technologies: Device Applications and Future Prospects

1984 ◽  
Vol 35 ◽  
Author(s):  
B-Y. Tsaur
Keyword(s):  
Integrated Circuits ◽  
High Voltage ◽  
Large Scale ◽  
Recent Progress ◽  
Silicon On Insulator ◽  
Future Prospects ◽  
Large Area ◽  
Device Applications ◽  
Made In

ABSTRACTSilicon-on-insulator (SOI) technologies have four major applications: very-large-scale integrated circuits (ICs), high-voltage ICs, large-area ICs, and vertical ICs. This paper will review the recent progress made in these areas and discuss the prospects of various SOI technologies for achieving commercialization.

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