Interface Of Aluminum/Ceramic Power Substrates Manufactured By Casting-Bonding Process

1996 ◽  
Vol 445 ◽  
Author(s):  
X. S. Ning ◽  
Y. Ogawa ◽  
K. Suganuma

AbstractNew processes for manufacturing Al/ceramic power substrates have been developed. These processes use a casting-bonding method to bond Al plates to the both sides of ceramic plates. The Al plates formed on the substrates are then chemically etched to be a desired shape using the conventional technology, followed by plating nickel on them. The power substrates manufactured by the process have both a perfect interface and an excellent thermal stress tolerance. Hence, these processes are especially suitable for assembling high reliability power devices such as IGBT power modules.

2016 ◽  
Vol 2016 (CICMT) ◽  
pp. 000065-000072 ◽  
Author(s):  
Sayan Seal ◽  
Michael D. Glover ◽  
H. Alan Mantooth

Abstract This paper presents the plan and initial feasibility studies for an Integrated Wire Bondless Power Module (IWPM). Contemporary power modules are moving toward unprecedented levels of power density. The ball has been set rolling by a drastic reduction in the size of bare die power devices themselves owing to the advent of wide band gap semiconductors like silicon carbide (SiC) and gallium nitride (GaN). SiC has capabilities of operating at much higher temperatures and faster switching speeds as compared with its silicon counterparts, while being a fraction of their size. However, electronic packaging technology has not kept pace with these developments. High performance packaging technologies do exist in isolation, but there has been limited success in integrating these disparate efforts into a single high performance package of sufficient reliability. This paper lays the foundation for an electronic package which is designed to completely leverage the benefits of SiC semiconductor technology, with a focus on high reliability and fast switching capability.


2016 ◽  
Vol 13 (4) ◽  
pp. 169-175
Author(s):  
Sayan Seal ◽  
Michael D. Glover ◽  
H. Alan Mantooth

This article presents the plan and initial feasibility studies for an Integrated Wire Bond-less Power Module. Contemporary power modules are moving toward unprecedented levels of power density. The ball has been set rolling by a drastic reduction in the size of bare die power devices owing to the advent of wide bandgap semiconductors such as silicon carbide (SiC) and gallium nitride. SiC has capabilities of operating at much higher temperatures and faster switching speeds compared with its silicon counterparts, while being a fraction of their size. However, electronic packaging technology has not kept pace with these developments. High-performance packaging technologies do exist in isolation, but there has been limited success in integrating these disparate efforts into a single high-performance package of sufficient reliability. This article lays the foundation for an electronic package designed to completely leverage the benefits of SiC semiconductor technology, with a focus on high reliability and fast switching capability. The interconnections between the gate drive circuitry and the power devices were implemented using a low temperature cofired ceramic interposer.


2015 ◽  
Vol 56 (10) ◽  
pp. 1683-1687 ◽  
Author(s):  
Takashi Harumoto ◽  
Osamu Ohashi ◽  
Hiroki Tsushima ◽  
Miho Narui ◽  
Kensaku Aihara ◽  
...  

2017 ◽  
Vol 897 ◽  
pp. 595-598
Author(s):  
Diane Perle Sadik ◽  
Jang Kwon Lim ◽  
Juan Colmenares ◽  
Mietek Bakowski ◽  
Hans Peter Nee

The temperature evolution during a short-circuit in the die of three different Silicon Carbide1200-V power devices is presented. A transient thermal simulation was performed based on the reconstructedstructure of commercially available devices. The location of the hottest point in the device iscompared. Finally, the analysis supports the necessity to turn off short-circuit events rapidly in orderto protect the device after a fault.


2011 ◽  
Vol 324 ◽  
pp. 437-440
Author(s):  
Raed Amro

There is a demand for higher junction temperatures in power devices, but the existing packaging technology is limiting the power cycling capability if the junction temperature is increased. Limiting factors are solder interconnections and bond wires. With Replacing the chip-substrate soldering by low temperature joining technique, the power cycling capability of power modules can be increased widely. Replacing also the bond wires and using a double-sided low temperature joining technique, a further significant increase in the life-time of power devices is achieved.


2021 ◽  
Author(s):  
Mitsuaki Kato ◽  
Takahiro Omori ◽  
Akihiro Goryu ◽  
Tomoya Fumikura ◽  
Kenji Hirohata

Author(s):  
Mitsuaki Kato ◽  
Takahiro Omori ◽  
Akihiro Goryu ◽  
Tomoya Fumikura ◽  
Kenji Hirohata

Abstract Power modules are being developed to increase power output. The larger current densities accompanying increased power output are expected to degrade solder joints in power modules by electromigration. In previous research, numerical analysis of solder for electromigration has mainly examined ball grid arrays in flip-chip packages in which many solder balls are bonded under the semiconductor device. However, in a power module, a single solder joint is uniformly bonded under the power device. Because of this difference in geometric shape, the effect of electromigration in the solder of power modules may be significantly different from that in the solder of flip chips packages. This report describes an electromigration analysis of solder joints for power modules using an electrical-thermal-stress coupled analysis. First, we validate our numerical implementation and show that it can reproduce the vacancy concentrations and hydrostatic stress almost the same as the analytical solutions. We then simulate a single solder joint to evaluate electromigration in a solder joint in a power module. Once inelastic strain appears, the rate of increase in vacancy concentration slows, while the inelastic strain continuously increases. This phenomenon demonstrates that elastic-plastic-creep analysis is crucial for electromigration analysis of solder joints in power modules. Next, the solder joint with a power device and a substrate as used in power modules was simulated. Plasticity-creep and longitudinal gradient generated by current crowding have a strong effect on significantly reducing the vacancy concentration at the anode edge over a long period of time.


Author(s):  
Kevin Moody ◽  
Nick Stukan

In this paper will focus on the comprehension of System-in-Package (SiP) with embedded active and passive components integration will be described. Embedding of semiconductor chips into substrates provides many advantages that have been noted. It allows the smallest package form-factor with high degree of miniaturization through sequentially stacking of multiple layers containing embedded devices that are optimized for electrical performance with short and geometrically well controlled copper interconnects. In addition, the embedding gives a homogeneous mechanical environment of the chips, resulting in good reliability at system level. Furthermore, embedded technology is an excellent resolution to Power management challenges dealing with new device technologies (Si, GaS, GaN) and optimization on the thermal dissipation with improved efficiency. Embedded technology comes with many challenges in 2019, primarily design for manufacturability (DFM) and maturity. Customers are looking for better-performance capability and pricing normally that means same or lower than die free package cost (DFPC) comparison. This paper will discuss the challenges bring to market the Embedded SIP Modules for next-GEN Heterogeneous “POWER-Devices” Today, the embedded process is being developed by printed circuit board (PCB) manufacturers creating a new supply chain, bringing new players into the semiconductor industry. This new supply chain comes along with new business models. As a result of the increasing interest in implementing embedding technologies, ACCESS Semiconductors in China is committed to be a leader in the adaptation of embedding technologies, with over 10-yrs mature coreless technology and proved design rules for low profile dimensions with seamless Ti/Cu sputtering and Cu pillar interconnect giving advantages in both electrical & power performance. ACCESS Patented “Via-in-Frame” technology provides High Reliability (MSL1, PCT, BHAST) at Cost Effective in high panel utilization for HVM, using standard substrate/PCB known material sets, no need for wafer bumping/RDL, over-mold or under-fill cost adders. ACCESS Semiconductors is currently in HVM on single die 2L, and LVM on multi-devices actives/passives 4L SiP construction both platforms are driven from the power market segment. In-development on Die Last & Frameless (MeSiP) platforms utilizing hybrid technology (mSAP) and Photo Imageable Dielectric (PID) materials for cost down solutions in HVM by Q1FY2020. Also, ACCESS Semiconductors total turn-key solutions will include front-of-line (FOL) and end-of-line (EOL) capability from wafer handling, back-grinding, and dicing with KGD traceability thru the embedded chip process, frame/strip singulation, FT, marking pack & ship providing additional 30% cost reduction in the future. Here's an illustration of Embedded Technology Roadmap and Product Platforms.


2016 ◽  
Vol 2016 (DPC) ◽  
pp. 001918-001947 ◽  
Author(s):  
Lars Boettcher ◽  
S. Karaszkiewicz ◽  
D. Manessis ◽  
A. Ostmann

Packages and modules with embedded semiconductor dies are of interest for various application fields and power classes. First packages in the lower power range are available in volume production since almost six years. Recent developments focus on medium and higher power applications raging over 500W into the kW range. Different approaches are available to realize such packages and modules. This paper will give an overview and detailed description of the latest approaches for such embedded die structures. In common of all of these approaches, is the use of laminate based die embedding, which uses standard PCB manufacturing technologies. Main differences are the used base substrate, which can still be a ceramic (DBC), Cu leadframe or high current substrate. Examples for the different methods will be given. As the main part, this paper will describe concepts, which enable significant smaller form-factor of power electronics modules, thereby allowing for lower price, high reliability, capability of direct mounting on e.g. a motor so as to form one unit with the motor housing, wide switching frequency range (for large application field) and high power efficiency. The innovative character of this packaging concept is the idea to embed the power drive components (IGBTs, MOSFETs, diode) as thinned chips into epoxy-resin layer built-up and to realize large-area interconnections on both sides by direct copper plating the dies to form a conductor structure with lowest possible electrical impedance and to achieve an optimum heat removal. In this way a thin core is formed on a large panel format which is called Embedded Power Core. The paper will specifically highlight the first results on manufacturing an embedded power discrete package as an example of an embedded power core containing a thin rectifier diode. For module realization, the power cores are interconnected to insulated metal substrates (IMS) by the use of Ag sintering interconnection technologies for the final manufacturing of Power modules. The paper will elaborate on the sintering process for Power Core/IMS interconnections, the microscopically features of the sintered interfaces, and the lateral filling of the sintering gap with epoxy prepregs. Firstly, 500W power modules were manufactured using this approach. Reliability testing results, solder reflow testing, temperature cycling test and active power cycling, will be discussed in detail.


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