Diffusion of Silicon Interstitials in thin Silicon Films on Insulator in Neutral and Oxidising Annealing Ambients

1997 ◽  
Vol 469 ◽  
Author(s):  
Guénolé C.M. Silvestre
Keyword(s):  
Integrated Circuits ◽  
High Performance ◽  
Annealing Treatment ◽  
Silicon On Insulator ◽  
Buried Oxide ◽  
Thermal Oxide ◽  
Good Crystalline Quality ◽  
Thin Silicon ◽  
Experimental Values ◽  
Fault Growth

ABSTRACTSilicon-On-Insulator (SOI) materials have emerged as a very promising technology for the fabrication of high performance integrated circuits since they offer significant improvement to device performance. Thin silicon layers of good crystalline quality are now widely available on buried oxide layers of various thicknesses with good insulating properties. However, the SOI structure is quite different from that of bulk silicon. This paper will discuss a study of point-defect diffusion and recombination in thin silicon layers during high temperature annealing treatment through the investigation of stacking-fault growth kinetics. The use of capping layers such as nitride, thin thermal oxide and thick deposited oxide outlines the diffusion mechanisms of interstitials in the SOI structure. It also shows that the buried oxide layer is a very good barrier to the diffusion of point defects and that excess silicon interstitials may be reincorporated at the top interface with the thermal oxide through the formation of SiO species. Finally, from the experimental values of the activation energies for the growth and the shrinkage of stacking-faults, the energy of interstitial creation is evaluated to be 2.6 eV, the energy for interstitial migration to be 1.8 eV and the energy of interstitial generation during oxidation to be 0.2 eV.

Behavior of contact-silicided TFSOI gate structures

1994 ◽  
Vol 52 ◽  
pp. 860-861
Author(s):  
N. David Theodore ◽  
Juergen Foerstner ◽  
Peter Fejes
Keyword(s):  
Semiconductor Device ◽  
Series Resistance ◽  
Field Effect Transistors ◽  
Silicon Layer ◽  
Device Fabrication ◽  
Silicon On Insulator ◽  
Continuous Layer ◽  
Buried Oxide ◽  
Device Structures ◽  
Thin Silicon

As semiconductor device dimensions shrink and packing-densities rise, issues of parasitic capacitance and circuit speed become increasingly important. The use of thin-film silicon-on-insulator (TFSOI) substrates for device fabrication is being explored in order to increase switching speeds. One version of TFSOI being explored for device fabrication is SIMOX (Silicon-separation by Implanted OXygen).A buried oxide layer is created by highdose oxygen implantation into silicon wafers followed by annealing to cause coalescence of oxide regions into a continuous layer. A thin silicon layer remains above the buried oxide (~220 nm Si after additional thinning). Device structures can now be fabricated upon this thin silicon layer.Current fabrication of metal-oxidesemiconductor field-effect transistors (MOSFETs) requires formation of a polysilicon/oxide gate between source and drain regions. Contact to the source/drain and gate regions is typically made by use of TiSi2 layers followedby Al(Cu) metal lines. TiSi2 has a relatively low contact resistance and reduces the series resistance of both source/drain as well as gate regions

Hybrid III-V-on-Silicon Microring Lasers

2013 ◽  
Vol 1538 ◽  
pp. 363-369
Author(s):  
Di Liang ◽  
Géza Kurczveil ◽  
Marco Fiorentino ◽  
Sudharsanan Srinivasan ◽  
David A. Fattal ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Wavelength Division Multiplexing ◽  
High Performance ◽  
Large Scale ◽  
Laser Cavity ◽  
Silicon On Insulator ◽  
Wavelength Division ◽  
Hybrid Iii ◽  
Hybrid Silicon ◽  
Silicon Based

ABSTRACTHybrid silicon laser is a promising solution to enable high-performance light source on large-scale, silicon-based photonic integrated circuits (PICs). As a compact laser cavity design, hybrid microring lasers are attractive for their intrinsic advantages of small footprint, low power consumption and flexibility in wavelength division multiplexing (WDM), etc. Here we review recent progress in unidirectional microring lasers and device thermal management. Unidirectional emission is achieved by integrating a passive reflector that feeds laser emission back into laser cavity to introduce extra unidirectional gain. Up to 4X of device heating reduction is simulated by adding a metal thermal shunt to the laser to “short” heat to the silicon substrate through buried oxide layer (BOX) in the silicon-on-insulator (SOI) substrate. Obvious device heating reduction is also observed in experiment.

Strain engineering of ultra-thin silicon-on-insulator structures using through-buried-oxide ion implantation and crystallization

2013 ◽  
Vol 83 ◽  
pp. 37-41 ◽  
Author(s):  
Yinjie Ding ◽  
Ran Cheng ◽  
Qian Zhou ◽  
Anyan Du ◽  
Nicolas Daval ◽  
...  
Keyword(s):  
Ion Implantation ◽  
Strain Engineering ◽  
Silicon On Insulator ◽  
Buried Oxide ◽  
Thin Silicon ◽  
Oxide Ion

A Review of Silicon-On-Insulator Formation by Oxygen Ion Implantation

1983 ◽  
Vol 27 ◽  
Author(s):  
Russell F. Pinizzotto
Keyword(s):  
Integrated Circuits ◽  
Large Scale ◽  
Single Crystal Silicon ◽  
Silicon Layer ◽  
High Energy ◽  
Silicon On Insulator ◽  
Epitaxial Silicon ◽  
Crystal Silicon ◽  
Buried Oxide ◽  
Soi Technology

ABSTRACTSilicon-on-Insulator structures will be an important technological advance used in future VLSI, VHSIC and threedimensional integrated circuits. The most mature SOI technology other than silicon-on-sapphire is SIMOX, or Separation by Implanted Oxygen. High energy oxygen ions are implanted into single crystal silicon until a stoichiometric buried silicon dioxide layer is formed. After implantation, the material is annealed at high temperature to remove implantation induced defects. The structure is completed by the growth of a thin epitaxial silicon layer. Devices and complex circuits have been successfully fabricated by several research groups. This paper reviews the development of this buried oxide SOI technology from 1973 to 1983. The five major sections discuss the advantages of SOI, the basics of buried oxide formation, the literature published between 1973 and 1983, key issues that must be solved before large scale implementation takes place and, finally, predictions of future developments.

Effect of annealing ambient on the precipitation processes in oxygen-implanted silicon on-insulator material

1990 ◽  
Vol 48 (4) ◽  
pp. 644-645
Author(s):  
P. Roitman ◽  
D.S. Simons ◽  
Supapan Visitserngtrakul ◽  
C.O. Jung ◽  
S J. Krause
Keyword(s):  
Integrated Circuits ◽  
Silicon Layer ◽  
Silicon On Insulator ◽  
High Dose ◽  
Bulk Silicon ◽  
Implantation Damage ◽  
Thermal Oxide ◽  
High Temperature Anneal ◽  
Gas Atmosphere ◽  
Oxide Precipitate

In the last decade, oxygen implanted silicon-on-insulator material (SIMOX: Separation by IMplantation of OXygen) has been extensively studied, due to its potential advantages of increased speed and radiation hardness in integrated circuits. SIMOX material requires two processing steps: first, implantation of a high dose of oxygen to form a buried oxide layer below a thin, top silicon layer; second, a high temperature anneal in an inert gas atmosphere to remove implantation damage and oxide precipitates. Most earlier studies investigated the effect of annealing temperature and time, but did not consider the effect of gas ambient. The effect of nitrogen and argon on the oxide-precipitate formation in bulk silicon has been established. Raider et al. found that in annealing of bulk silicon, nitrogen can diffuse to an oxide-silicon interface and chemically react with silicon. The nitrogen-containing layer acts as a barrier to further oxidation. Consequently, nitrogen influences the growth kinetics of the thermal oxide while annealing in an argon ambient does not. This should apply to SIMOX as well. We have, therefore, investigated the effect of nitrogen and argon ambient on the oxide-precipitate removal during annealing of SIMOX material.

Structural changes in silicon-on-insulator material during post-implantation annealing

1986 ◽  
Vol 44 ◽  
pp. 736-737
Author(s):  
C. O. Jung ◽  
S. J. Krause ◽  
S.R. Wilson
Keyword(s):  
Integrated Circuits ◽  
Oxide Layer ◽  
High Speed ◽  
Structural Changes ◽  
Device Fabrication ◽  
Silicon On Insulator ◽  
High Quality ◽  
Radiation Hardened ◽  
Post Implantation ◽  
Very High

Silicon-on-insulator (SOI) structures have excellent potential for future use in radiation hardened and high speed integrated circuits. For device fabrication in SOI material a high quality superficial Si layer above a buried oxide layer is required. Recently, Celler et al. reported that post-implantation annealing of oxygen implanted SOI at very high temperatures would eliminate virtually all defects and precipiates in the superficial Si layer. In this work we are reporting on the effect of three different post implantation annealing cycles on the structure of oxygen implanted SOI samples which were implanted under the same conditions.

Interface morphology of thermal oxide grown on polycrystalline silicon by different processes

1992 ◽  
Vol 50 (2) ◽  
pp. 1396-1397
Author(s):  
H. Yen ◽  
E. P. Kvam ◽  
R. Bashir ◽  
S. Venkatesan ◽  
G. W. Neudeck
Keyword(s):  
Integrated Circuits ◽  
Polycrystalline Silicon ◽  
Silicon Films ◽  
Interface Morphology ◽  
Oxide Interface ◽  
Poly Silicon ◽  
Thermal Oxide ◽  
Grain Orientations ◽  
Polycrystalline Silicon Films ◽  
P Type

Polycrystalline silicon, when highly doped, is commonly used in microelectronics applications such as gates and interconnects. The packing density of integrated circuits can be enhanced by fabricating multilevel polycrystalline silicon films separated by insulating SiO2 layers. It has been found that device performance and electrical properties are strongly affected by the interface morphology between polycrystalline silicon and SiO2. As a thermal oxide layer is grown, the poly silicon is consumed, and there is a volume expansion of the oxide relative to the atomic silicon. Roughness at the poly silicon/thermal oxide interface can be severely deleterious due to stresses induced by the volume change during oxidation. Further, grain orientations and grain boundaries may alter oxidation kinetics, which will also affect roughness, and thus stress.Three groups of polycrystalline silicon films were deposited by LPCVD after growing thermal oxide on p-type wafers. The films were doped with phosphorus or arsenic by three different methods.

TEM study of buried cobalt disilicide layers formed by ion implantation: Identification of cobalt monosilicide inclusions

1990 ◽  
Vol 48 (4) ◽  
pp. 576-577
Author(s):  
A. De Veirman ◽  
J. Van Landuyt ◽  
K.J. Reeson ◽  
R. Gwilliam ◽  
C. Jeynes ◽  
...  
Keyword(s):  
Ion Implantation ◽  
Annealing Treatment ◽  
Silicon On Insulator ◽  
High Dose ◽  
Nitrogen Flow ◽  
Cobalt Disilicide ◽  
Transmission Electron ◽  
Beam Heating ◽  
Co Concentration ◽  
Silicon On Insulator Technology

In analogy to the formation of SIMOX (Separation by IMplanted OXygen) material which is presently the most promising silicon-on-insulator technology, high-dose ion implantation of cobalt in silicon is used to synthesise buried CoSi2 layers. So far, for high-dose ion implantation of Co in Si, only formation of CoSi2 is reported. In this paper it will be shown that CoSi inclusions occur when the stoichiometric Co concentration is exceeded at the peak of the Co distribution. 350 keV Co+ ions are implanted into (001) Si wafers to doses of 2, 4 and 7×l017 per cm2. During the implantation the wafer is kept at ≈ 550°C, using beam heating. The subsequent annealing treatment was performed in a conventional nitrogen flow furnace at 1000°C for 5 to 30 minutes (FA) or in a dual graphite strip annealer where isochronal 5s anneals at temperatures between 800°C and 1200°C (RTA) were performed. The implanted samples have been studied by means of Rutherford Backscattering Spectroscopy (RBS) and cross-section Transmission Electron Microscopy (XTEM).

The Structure and Properties of MoSi2 Thin Film in Mos Process

1980 ◽  
Vol 38 ◽  
pp. 326-327
Author(s):  
C.K. Wu ◽  
P. Chang ◽  
N. Godinho
Keyword(s):  
Thin Film ◽  
Integrated Circuits ◽  
High Performance ◽  
Large Scale ◽  
Process Development ◽  
Structure And Properties ◽  
Metal Silicides ◽  
High Oxidation ◽  
Important Approach ◽  
High Oxidation Resistance

Recently, the use of refractory metal silicides as low resistivity, high temperature and high oxidation resistance gate materials in large scale integrated circuits (LSI) has become an important approach in advanced MOS process development (1). This research is a systematic study on the structure and properties of molybdenum silicide thin film and its applicability to high performance LSI fabrication.

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