Flat-band Voltage Study Of Atomic-layer-Deposited Aluminum-oxide Subjected To Spike Thermal Annealing

2003 ◽  
Vol 765 ◽  
Author(s):  
V. R. Mehta ◽  
A. T. Fiory ◽  
N. M. Ravindra ◽  
M. Y. Ho ◽  
G. D. Wilk ◽  
...  

AbstractHigh-κ dielectrics based the oxide of Al were prepared by atomic layer deposition (ALD) on 200-mm p-type Si wafers. Films were deposited directly on clean Si or on 0.5-nm underlayers of rapid thermal oxide or oxynitrides grown in O2 and/or NO ambients. The purpose of the underlayer films is to provide a barrier for atomic diffusion from the crystal Si to the high-κ dielectric film. Deposited Al-oxide films varied in thickness from 2 to 6 nm. Post deposition anneals were used to stabilize the ALD oxides. Equivalent SiO2-oxide thickness varied from 1.0 to 3.5 nm. In situ P-doped amorphous-Si 160 nm films were deposited over the oxides to prepare heavily doped n-type gate electrodes in MOS structures. Samples were rapid thermal annealed in N2 ambient at 800°C for 30 s, or spike annealed at 950, 1000, and 1050°C (nominally zero time at peak temperature). Flat band voltages, VFB were determined from C-V measurements on dot patterns. The 800°C anneals were used as a baseline, at which the poly-Si electrodes are crystallized and acquire electrical activation while subjecting the high-κ dielectrics to a low thermal budget. Positive shifts in VFB were observed, relative to a pure SiO2 control, ranging from 0.2 to 0.8 V. Spike annealing reduces the VFB shift for ALD films deposited over underlayer films. The VFB shift and the changes with annealing temperature show systematic dependence on the nitridation of the underlayer.

2012 ◽  
Vol 2012 ◽  
pp. 1-7 ◽  
Author(s):  
J. H. Yum ◽  
J. Oh ◽  
Todd. W. Hudnall ◽  
C. W. Bielawski ◽  
G. Bersuker ◽  
...  

In a previous study, we have demonstrated that beryllium oxide (BeO) film grown by atomic layer deposition (ALD) on Si and III-V MOS devices has excellent electrical and physical characteristics. In this paper, we compare the electrical characteristics of inserting an ultrathin interfacial barrier layer such as SiO2, Al2O3, or BeO between the HfO2gate dielectric and Si substrate in metal oxide semiconductor capacitors (MOSCAPs) and n-channel inversion type metal oxide semiconductor field effect transistors (MOSFETs). Si MOSCAPs and MOSFETs with a BeO/HfO2gate stack exhibited high performance and reliability characteristics, including a 34% improvement in drive current, slightly better reduction in subthreshold swing, 42% increase in effective electron mobility at an electric field of 1 MV/cm, slightly low equivalent oxide thickness, less stress-induced flat-band voltage shift, less stress induced leakage current, and less interface charge.


Micromachines ◽  
2021 ◽  
Vol 12 (3) ◽  
pp. 338
Author(s):  
Hak Hyeon Lee ◽  
Dong Su Kim ◽  
Ji Hoon Choi ◽  
Young Been Kim ◽  
Sung Hyeon Jung ◽  
...  

An effective strategy for improving the charge transport efficiency of p-type Cu2O photocathodes is the use of counter n-type semiconductors with a proper band alignment, preferably using Al-doped ZnO (AZO). Atomic layer deposition (ALD)-prepared AZO films show an increase in the built-in potential at the Cu2O/AZO interface as well as an excellent conformal coating with a thin thickness on irregular Cu2O. Considering the thin thickness of the AZO overlayers, it is expected that the composition of the Al and the layer stacking sequence in the ALD process will significantly influence the charge transport behavior and the photoelectrochemical (PEC) performance. We designed various stacking orders of AZO overlayers where the stacking layers consisted of Al2O3 (or Al) and ZnO using the atomically controlled ALD process. Al doping in ZnO results in a wide bandgap and does not degrade the absorption efficiency of Cu2O. The best PEC performance was obtained for the sample with an AZO overlayer containing conductive Al layers in the bottom and top regions. The Cu2O/AZO/TiO2/Pt photoelectrode with this overlayer exhibits an open circuit potential of 0.63 V and maintains a high cathodic photocurrent value of approximately −3.2 mA cm−2 at 0 VRHE for over 100 min.


2016 ◽  
Vol 2016 ◽  
pp. 1-4 ◽  
Author(s):  
Z. N. Khan ◽  
S. Ahmed ◽  
M. Ali

Focusing on sub-10 nm Silicon CMOS device fabrication technology, we have incorporated ultrathin TiN metal gate electrode in Hafnium Silicate (HfSiO) based metal-oxide capacitors (MOSCAP) with carefully chosen Atomic Layer Deposition (ALD) process parameters. Gate element of the device has undergone a detailed postmetal annealed sequence ranging from 100°C to 1000°C. The applicability of ultrathin TiN on gate electrodes is established through current density versus voltage (J-V), resistance versus temperature (R-T), and permittivity versus temperature analysis. A higher process window starting from 600°C was intentionally chosen to understand the energy efficient behavior expected from ultrathin gate metallization and its unique physical state with shrinking thickness. The device characteristics in form of effective electronic mobility as a function of inverse charge density were also found better than those conventional gate stacks used for EOT scaling.


Nanomaterials ◽  
2019 ◽  
Vol 9 (8) ◽  
pp. 1085 ◽  
Author(s):  
Kemelbay ◽  
Tikhonov ◽  
Aloni ◽  
Kuykendall

As one of the highest mobility semiconductor materials, carbon nanotubes (CNTs) have been extensively studied for use in field effect transistors (FETs). To fabricate surround-gate FETs— which offer the best switching performance—deposition of conformal, weakly-interacting dielectric layers is necessary. This is challenging due to the chemically inert surface of CNTs and a lack of nucleation sites—especially for defect-free CNTs. As a result, a technique that enables integration of uniform high-k dielectrics, while preserving the CNT’s exceptional properties is required. In this work, we show a method that enables conformal atomic layer deposition (ALD) of high-k dielectrics on defect-free CNTs. By depositing a thin Ti metal film, followed by oxidation to TiO2 under ambient conditions, a nucleation layer is formed for subsequent ALD deposition of Al2O3. The technique is easy to implement and is VLSI-compatible. We show that the ALD coatings are uniform, continuous and conformal, and Raman spectroscopy reveals that the technique does not induce defects in the CNT. The resulting bilayer TiO2/Al2O3 thin-film shows an improved dielectric constant of 21.7 and an equivalent oxide thickness of 2.7 nm. The electrical properties of back-gated and top-gated devices fabricated using this method are presented.


Materials ◽  
2020 ◽  
Vol 13 (12) ◽  
pp. 2857
Author(s):  
Steponas Ašmontas ◽  
Maksimas Anbinderis ◽  
Jonas Gradauskas ◽  
Remigijus Juškėnas ◽  
Konstantinas Leinartas ◽  
...  

Niobium-doped titanium dioxide (Ti1−xNbxO2) films were grown on p-type Si substrates at low temperature (170 °C) using an atomic layer deposition technique. The as-deposited films were amorphous and showed low electrical conductivity. The films became electrically well-conducting and crystallized into the an anatase structure upon reductive post-deposition annealing at 600 °C in an H2 atmosphere for 30 min. It was shown that the Ti0.72Nb0.28O2/p+-Si heterojunction fabricated on low resistivity silicon (10−3 Ω cm) had linear current–voltage characteristic with a specific contact resistivity as low as 23 mΩ·cm2. As the resistance dependence on temperature revealed, the current across the Ti0.72Nb0.28O2/p+-Si heterojunction was mainly determined by the band-to-band charge carrier tunneling through the junction.


2020 ◽  
Vol 3 (10) ◽  
pp. 10200-10208
Author(s):  
Vincent Vandalon ◽  
Marcel A. Verheijen ◽  
Wilhelmus M. M. Kessels ◽  
Ageeth A. Bol

2014 ◽  
Vol 26 (21) ◽  
pp. 6088-6091 ◽  
Author(s):  
Jeong Hwan Han ◽  
Yoon Jang Chung ◽  
Bo Keun Park ◽  
Seong Keun Kim ◽  
Hyo-Suk Kim ◽  
...  

2015 ◽  
Vol 1088 ◽  
pp. 107-111
Author(s):  
Jian Shuang Liu ◽  
Fang Fang Zhu ◽  
Fei Lu ◽  
Lin Zhang

A plasma enhanced atomic layer deposition process has been demonstrated for Lanthanum oxide films using La (thd)3 precursor and oxygen plasma. The chemical and electrical properties of La2O3 ultra-thin films on Si (100) substrates before and after post-annealing in N2 ambient have been investigated. X-ray photoelectron spectroscopic revealed that interface reactions take place after annealing process which lead to oxygen insufficiency, as well as the balance band offset decreases with the increase of annealing temperature. The capacitance-voltage and current-voltage characteristics show La2O3 capacitors annealed at 900 °C have negligible hysteresis, smaller interface trap density in comparison with as-deposited samples, but larger flat band voltage and higher gate-leakage current density due to the appearance of oxygen vacancy in the La2O3 films.


2018 ◽  
Vol 451 ◽  
pp. 121-127 ◽  
Author(s):  
Tsung-Cheng Chen ◽  
Tsuo-Chuan Yang ◽  
Hsyi-En Cheng ◽  
Ing-Song Yu ◽  
Zu-Po Yang

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