Performance Comparison of InAs Based DG-MOSFET with Respect to SiO2 and Gate Stack Configuration

2020 ◽  
Vol 10 (4) ◽  
pp. 419-424
Author(s):  
Sanjit K. Swain ◽  
Sudhansu M. Biswal ◽  
Satish K. Das ◽  
Sarosij Adak ◽  
Biswajit Baral
Keyword(s):  
Oxide Layer ◽  
Computer Aided Design ◽  
Cutoff Frequency ◽  
Performance Comparison ◽  
Oxide Material ◽  
Gate Stack ◽  
Time Gate ◽  
Aided Design ◽  
First Time ◽  
Tcad Simulations

Objective:: In this proposed work, the Analog, RF and Linearity performances of a DGMOSFET have been analyzed by considering InAs as a channel material. Methods: For the very first time, gate stack techniques in this device have been incorporated and a comparative analysis is conducted with respect to SiO2 oxide layer. The variations in different patterns of oxide layer and their comparison have been thoroughly investigated to have a better understanding of various performance parameters. A thorough analysis of the key figure-of-merits such as trans-conductance factor, transconductance generation factor (TGF), gate capacitance, cutoff frequency (fT), maximum frequency of oscillation (fmax), GBW and various linearity parameters such as gm2, gm3,VIP2, VIP3, IIP3, has been studied with respect to SiO2 oxide material and gate stack technology. Result:: The simulation results revealed that the performances of the device are sensitive to both the oxide materials and it was also inferred that gate stack technology gave a better performance over SiO2 oxide layer. Conclusion:: These results have significant effects in analog, RF and linearity operations. In this work, computer aided design (TCAD) simulations by 2D ATLAS, Silvaco International have been used.

Study on mechanisms of InGaP/GaAs HBT safe operating area using TCAD simulation

2015 ◽  
Vol 7 (3-4) ◽  
pp. 279-285 ◽  
Author(s):  
Nick G.M. Tao ◽  
Bo-Rong Lin ◽  
Chien-Ping Lee ◽  
Tim Henderson ◽  
Barry J.F. Lin
Keyword(s):  
Heterojunction Bipolar Transistors ◽  
Computer Aided Design ◽  
Impact Ionization ◽  
Failure Mechanisms ◽  
Bipolar Transistors ◽  
Physical Models ◽  
Aided Design ◽  
First Time ◽  
Safe Operating ◽  
Tcad Simulations

The safe operating area (SOA) of InGaP/GaAs heterojunction bipolar transistors has been studied using two-dimensional Technology Computer-Aided Design (TCAD) tool. Comprehensive physical models, including hydrodynamic transport-based impact ionization and self-heating models were implemented. The simulations for two DC modes (constant Iband Vbmodes) captured all the SOA features observed in measurements and some failure mechanisms were revealed for the first time by TCAD simulations. The simulated results are also in agreement with analytical modeling. The simulation not only gives us insight to the detailed failure mechanisms, but also provides guidance for the design of devices with better ruggedness and improved SOA performances.

scholarly journals Digital design and parameters optimization for plasmonic circuits

2019 ◽  
Vol 220 ◽  
pp. 03025
Author(s):  
Alexander Shesterikov ◽  
Andrey Leksin ◽  
Alexei Prokhorov
Keyword(s):  
Quantum Dots ◽  
Computer Aided Design ◽  
Surface Plasmon Polariton ◽  
Parameters Optimization ◽  
Digital Design ◽  
Plasmonic Waveguides ◽  
Full Field ◽  
Graphene Layers ◽  
Aided Design ◽  
First Time

The mathematical models for the CAD-platform of plasmonic circuits design have been developed. This platform provides the efficient framework for computer-aided design of semiconductor quantum dots and full-field electromagnetic simulation of surface plasmon-polariton propagation in plasmonic waveguides. The topology of an all-plasmonic devices based on graphene layers and quantum dots is proposed for the first time.

scholarly journals Exacting Standards

2000 ◽  
Vol 122 (12) ◽  
pp. 71-72
Keyword(s):  
North Carolina ◽  
Computer Aided Design ◽  
Point Cloud ◽  
Cloud Data ◽  
Design Concepts ◽  
Research Triangle ◽  
Aided Design ◽  
First Time ◽  
Model Digitizing ◽  
Polygonal Model

This article discusses integration of handcrafted parts into computer-aided design (CAD)-designed bikes. The digital duplication process started when Harley Davidson sent Schaefer an assembly-ready Dyna Wide gas tank. It took two days of work to prepare the tank and scan it with an ATOS white-light 3D scanner, made by GOM mbH (for Gesellschaft fur Optische Messtechnik) in Braunschweig, Germany. Using Geomagic Studio, the software from Raindrop Geomagic, Advanced Design Concepts first converted the point cloud to a polygonal model. The 3D point cloud data were brought into Geomagic Studio, software from Raindrop Geomagic of Research Triangle Park, North Carolina. Using Geomagic, ADC first converted the point cloud to a polygonal model. The next step of processing created a non-uniform rational b–spline (NURBS) model. Digitizing the Dyna Wide gas tank represented the first time that Advanced Design Concepts had used Geomagic Studio on a Harley-Davidson job. According to an expert, the company now has three people devoted to working with the program.

scholarly journals Analysis of Engineering Accreditation Process and Outcomes: Lessons Learned for Successful First Time Application

2020 ◽  
Vol 19 (9) ◽  
pp. 281-300
Author(s):  
Tahar Ayadat ◽  
Andi Asiz
Keyword(s):  
Computer Aided Design ◽  
The United States ◽  
Accreditation Process ◽  
Lessons Learned ◽  
Engineering Programs ◽  
Engineering Program ◽  
Senior Design ◽  
Program Compliance ◽  
Aided Design ◽  
First Time

The aims of the paper are to share and analyze engineering accreditation experience starting from the preparation through the outcome, and to discuss lessons learned particularly for first-time applicants. Securing accreditation from a well-recognized international body, such as the Accreditation Board for Engineering and Technology (ABET) can indicate quality of an engineering program. To qualify for an accreditation up to six- to seven-year period, an engineering program must meet a set of accreditation standards or criteria. The article is not limited only for new engineering programs outside the United States who are willing to pursue engineering accreditation from ABET, but it is applicable for an existing accredited program who will undergo next accreditation cycle. The authors presented and analyzed detail accreditation experience for a new established Civil Engineering (CE) Program at Prince Mohammad bin Fahd University (PMU) in Saudi Arabia. Although the ABET website provides detail procedure for the accreditation steps, the detail cases experienced by the PMU CE program will enrich knowledge on how to prepare and handle successful international accreditation. The authors also discussed issues raised during the accreditation activities, including program compliance with the nine ABET criteria, and presented key lessons to prepare for a smooth accreditation process. The main significant result of the accreditation exercise about continuous improvement was summarized in term of the curriculum upgrade, including adding another semester for senior design course and offering new sustainability engineering course, and adding computer aided design course at the early semester.

Performance analysis of nanowire and nanosheet NCFETs for future technology nodes

2021 ◽  
Author(s):  
Fahimul Islam Sakib ◽  
Md. Azizul Hasan ◽  
Mainul Hossain
Keyword(s):  
Performance Optimization ◽  
Computer Aided Design ◽  
Single Channel ◽  
Field Effect Transistors ◽  
Three Dimensional ◽  
Differential Resistance ◽  
Future Technology ◽  
Aided Design ◽  
Technology Nodes ◽  
Tcad Simulations

Abstract Negative capacitance (NC) effect in nanowire (NW) and nanosheet (NS) field effect transistors (FETs) provide the much-needed voltage scaling in future technology nodes. Here, we present a comparative analysis on the performance of NC-NWFETs and NC-NSFETs through fully calibrated, three-dimensional computer aided design (TCAD) simulations. In addition to single channel NC-NSFETs and NC-NWFETs, those, with vertically stacked NSs and NWs, have been examined for the same layout footprint (LF). Results show that NC-NSFETs can achieve lower subthreshold swing (SS) and higher ON-current (ION ) than NC-NWFET of comparable device dimensions. However, NC-NWFETs show slightly higher ION/IOFF ratio. Negative differential resistance (NDR) is found to be more pronounced in NC-NSFET, enabling these devices to attain a stronger drain-induced-barrier-rising (DIBR) and steeper SS for gate lengths as small as 10 nm. The results presented here can, therefore, provide useful insights for performance optimization of NC-NWFETs and NC-NSFETs, in ultra-scaled and high-density logic applications, for 7 nm and beyond technology nodes.

scholarly journals Integrate-and-Fire Neuron Circuit Without External Bias Voltages

2021 ◽  
Vol 15 ◽  
Author(s):  
Young-Soo Park ◽  
Sola Woo ◽  
Doohyeok Lim ◽  
Kyoungah Cho ◽  
Sangsig Kim
Keyword(s):  
Energy Efficiency ◽  
Computer Aided Design ◽  
Firing Frequency ◽  
Neuron Circuit ◽  
Integrate And Fire ◽  
External Bias ◽  
Aided Design ◽  
Structural Simplicity ◽  
Integrate And Fire Neuron ◽  
Tcad Simulations

In this study, we propose an integrate-and-fire (I&F) neuron circuit using a p-n-p-n diode that utilizes a latch-up phenomenon and investigate the I&F operation without external bias voltages using mixed-mode technology computer-aided design (TCAD) simulations. The neuron circuit composed of one p-n-p-n diode, three MOSFETs, and a capacitor operates with no external bias lines, and its I&F operation has an energy consumption of 0.59 fJ with an energy efficiency of 96.3% per spike. The presented neuron circuit is superior in terms of structural simplicity, number of external bias lines, and energy efficiency in comparison with that constructed with only MOSFETs. Moreover, the neuron circuit exhibits the features of controlling the firing frequency through the amplitude and time width of the synaptic pulse despite of the reduced number of the components and no external bias lines.

scholarly journals A Comprehensive Computational Design for Microstrip Passive and Active Linear Circuits

1970 ◽  
Vol 1 (2) ◽  
Author(s):  
El-Sayed A. El-Badawy ◽  
S. H. Ibrahim
Keyword(s):  
Circuit Design ◽  
Computer Aided Design ◽  
Characteristic Impedance ◽  
Cutoff Frequency ◽  
Computational Design ◽  
High Gain ◽  
Microstrip Lines ◽  
Lange Coupler ◽  
Aided Design ◽  
Microstrip Circuit

In this paper, a complete program called HHSS2 is introduced which is a user-oriented program capable of designing linear active and passive microstrip circuits such as amplifiers, oscillators, mixers, lowpass filters, and couplers. The substrate parameters and the characteristic impedance of the microstrip lines are given to the program as a common statement. Examples for the design of a 3-GHz high gain amplifier, 2.6-GHz oscillator, ring coupler operated at 3.33 GHz, Lange coupler operated at 3.3 GHz, and maximally-flat lowpass filter operated at 2 GHz with 0.75 GHz cutoff frequency are introduced.    Key Words: Computational Microstrip Circuit Design, Microwave Circuits, Computer Aided Design.

scholarly journals Low Resistance Asymmetric III-Nitride Tunnel Junctions Designed by Machine Learning

Nanomaterials ◽  
2021 ◽  
Vol 11 (10) ◽  
pp. 2466
Author(s):  
Rongyu Lin ◽  
Peng Han ◽  
Yue Wang ◽  
Ronghui Lin ◽  
Yi Lu ◽  
...  
Keyword(s):  
Machine Learning ◽  
Computer Aided Design ◽  
Electronic Devices ◽  
High Current ◽  
Time Prediction ◽  
Current Densities ◽  
Resistance Prediction ◽  
Design Software ◽  
Aided Design ◽  
First Time

The tunnel junction (TJ) is a crucial structure for numerous III-nitride devices. A fundamental challenge for TJ design is to minimize the TJ resistance at high current densities. In this work, we propose the asymmetric p-AlGaN/i-InGaN/n-AlGaN TJ structure for the first time. P-AlGaN/i-InGaN/n-AlGaN TJs were simulated with different Al or In compositions and different InGaN layer thicknesses using TCAD (Technology Computer-Aided Design) software. Trained by these data, we constructed a highly efficient model for TJ resistance prediction using machine learning. The model constructs a tool for real-time prediction of the TJ resistance, and the resistances for 22,254 different TJ structures were predicted. Based on our TJ predictions, the asymmetric TJ structure (p-Al0.7Ga0.3N/i-In0.2Ga0.8N/n-Al0.3Ga0.7N) with higher Al composition in p-layer has seven times lower TJ resistance compared to the prevailing symmetric p-Al0.3Ga0.7N/i-In0.2Ga0.8N/n-Al0.3Ga0.7N TJ. This study paves a new way in III-nitride TJ design for optical and electronic devices.

scholarly journals Performance Evaluation of Epitaxial Layer Based Gate Modulated TFET (GM-TFET)

2021 ◽  
Author(s):  
Rajesh Saha ◽  
Rupam Goswami ◽  
Brinda Bhowmick ◽  
Srimanta Baishya
Keyword(s):  
Epitaxial Layer ◽  
Computer Aided Design ◽  
Doping Concentration ◽  
Transfer Characteristic ◽  
Device Performance ◽  
Electrical Parameters ◽  
Output Performance ◽  
Computer Aided ◽  
Aided Design ◽  
Tcad Simulations

Abstract This paper reports the performance of an epitaxial layer (ETL) based gate modulated (GM-TFET) through 3D Technology Computer Aided Design (TCAD) simulations. The architecture utilizes effects of both vertical tunneling and lateral tunneling phenomena to improve the device performance. Attributes of the ETL, its thickness (tepi) and doping concentration (Nepi) are varied and their impact on device electrical parameters such as transfer characteristic, output performance, subthreshold swing (SS), and threshold voltage (VT) is highlighted. It is observed that both tepi and Nepi significantly influence the different electrical parameters of the ETL based TFET architecture.

scholarly journals On the applicability of numerical tools for simulating wave-ports close to the cutoff frequency

2022 ◽  
Vol 12 (2) ◽  
pp. 1724
Author(s):  
Eman Mohamed Eldesouki ◽  
Khalid Mustafa Ibrahim ◽  
Ahmed Mohmed Attiya
Keyword(s):  
Reflection Coefficient ◽  
Computer Aided Design ◽  
Original Problem ◽  
Cutoff Frequency ◽  
Horn Antenna ◽  
Cad Tools ◽  
Waveguide Section ◽  
Tapered Waveguide ◽  
Computer Aided ◽  
Aided Design

This paper focuses on a common drawback in electromagnetic numerical computer aided design computer aided design (CAD) tools: high frequency structure simulator (HFSS), computer simulation technology (CST) and FEKO, where the excitation by using a wave-port below and close to the cutoff frequency has unreliable values for the reflection coefficient. An example for such problem is presented in the design of a dual horn antenna fed by two different waveguide sections. To overcome this numerical error in the results of these CAD tools, a tapered waveguide section is used in the simulation as an excitation mechanism to the feeding waveguide. The cross section of the input port at this tapered waveguide section is designed to have a cutoff frequency smaller than the lowest frequency under investigation for the original problem. Then, by extracting the effect of the tapered section from the obtained reflection coefficient, it would be possible to obtain the reflection coefficient of the original problem.

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