scholarly journals PERANCANGAN APLIKASI OP-AMP DENGAN SOFTWARE GUI MATLAB

Jurnal Teknik ◽  
2019 ◽  
Vol 1 (2) ◽  
Author(s):  
Triyono .
Keyword(s):  
Operational Amplifier ◽  
Op Amp ◽  
Video Amplifier

Operational Amplifier (OP-AMP) merupakan rangkaian penguat yang menjadi basis dari rangkaian audio dan video amplifier, filter, buffer (penyangga), komparator, oscilator dan rangkaian analog lainnya. Untuk meningkatkan pemahaman mahasiswa dalam merancang rangkaian OP-AMP dapat digunakan media pembelajaran berbantuan komputer. Matlab merupakan software yang digunakan dalam pembelajaran untuk melihat tanggapan beragam parameter dan masukan yang berbeda. Dari hasil penelitian didapatkan hasil yang cukup signifikan dalam peningkatan pemahaman mahasiswa dalam perancangan rangkaian OP-AMP. Kata Kunci: OP-AMP, Matlab, Analog

A 1-mm2 CMOS-pipelined ADC with integrated folded cascode operational amplifier

2020 ◽  
Vol 37 (4) ◽  
pp. 205-213
Author(s):  
Norhamizah Idros ◽  
Zulfiqar Ali Abdul Aziz ◽  
Jagadheswaran Rajendran
Keyword(s):  
Operational Amplifier ◽  
Open Loop ◽  
Cmos Process ◽  
Silicon Area ◽  
Content Type ◽  
Op Amp ◽  
Dc Gain ◽  
Input Range ◽  
Folded Cascode ◽  
The Impact

Purpose The purpose of this paper is to demonstrate the acceptable performance by using the limited input range towards lower open-loop DC gain operational amplifier (op-amp) of an 8-bit pipelined analog-to-digital converter (ADC) for mobile communication application. Design/methodology/approach An op-amp with folded cascode configuration is designed to provide the maximum open-loop DC gain without any gain-boosting technique. The impact of low open-loop DC gain is observed and analysed through the results of pre-, post-layout simulations and measurement of the ADC. The fabrication process technology used is Silterra 0.18-µm CMOS process. The silicon area by the ADC is 1.08 mm2. Findings Measured results show the differential non-linearity (DNL) error, integral non-linearity (INL) error, signal-to-noise ratio (SNR) and spurious-free dynamic range (SFDR) are within −0.2 to +0.2 LSB, −0.55 LSB for 0.4 Vpp input range, 22 and 27 dB, respectively, with 2 MHz input signal at the rate of 64 MS/s. The static power consumption is 40 mW with a supply voltage of 1.8 V. Originality/value The experimental results of ADC showed that by limiting the input range to ±0.2 V, this ADC is able to give a good reasonable performance. Open-loop DC gain of op-amp plays a critical role in ADC performance. Low open-loop DC gain results in stage-gain error of residue amplifier and, thus, leads to nonlinearity of output code. Nevertheless, lowering the input range enhances the linearity to ±0.2 LSB.

Monolayer Graphene Field Effect Transistor-Based Operational Amplifier

2019 ◽  
Vol 28 (03) ◽  
pp. 1950052
Author(s):  
Ali Safari ◽  
Massoud Dousti ◽  
Mohammad Bagher Tavakoli
Keyword(s):  
Operational Amplifier ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Cmos Technology ◽  
Design System ◽  
Monolayer Graphene ◽  
Characteristic Curves ◽  
Op Amp ◽  
Graphene Field Effect Transistor ◽  
Effect Transistor

Graphene Field Effect Transistor (GFET) is a promising candidate for future high performance applications in the beyond CMOS roadmap for analog circuit applications. This paper presents a Verilog-A implementation of a monolayer graphene field-effect transistor (mGFET) model. The study of characteristic curves is carried out using advanced design system (ADS) tools. Validation of the model through comparison with measurements from the characteristic curves is carried out using Silvaco TCAD tools. Finally, the mGFET is used to design a GFET-based operational amplifier (Op-Amp). The GFET Op-Amp performances are tuned in term of the graphene channel length in order to obtain a reasonable gain and bandwidth. The main characteristics of the Op-Amp performance are compared with 0.18[Formula: see text][Formula: see text]m CMOS technology.

A Robust SOI Gain-Boosted Operational Amplifier Targeting High Temperature Precision Applications up to 300°C

2011 ◽  
Vol 2011 (HITEN) ◽  
pp. 000238-000242
Author(s):  
Alexander Schmidt ◽  
Abdel Moneim Marzouk ◽  
Holger Kappert ◽  
Rainer Kokozinski
Keyword(s):  
High Temperature ◽  
Circuit Design ◽  
Robust Design ◽  
Wide Temperature Range ◽  
Operational Amplifier ◽  
Operating Temperature ◽  
High Gain ◽  
Temperature Range ◽  
Op Amp ◽  
Operating Temperature Range

Data acquisition and signal processing at elevated temperatures are facing various problems due to a wide temperature range operation, affecting the accuracy of the circuits' references and elementary building blocks. As the most commonly used analog building block, the operational amplifier (op-amp) with its various limitations has to be enhanced for wide temperature range operation. Thereby major effort is put into maximizing signal gain and simultaneously reaching high gain-bandwidth also for high temperatures. Future robust design approaches have to consider a growing operating temperature range and increasing device parameter mismatch due to the downsizing of integrated circuits. Addressing one of the major problems in circuit design for the next decades, compensating these effects through new design approaches will have a lasting impact on circuit design. In this paper we present a high gain operational amplifier with a folded-cascode and gain-boosted input stage, fabricated in a 1.0 μm SOI CMOS process. The operational amplifier was designed for an operating temperature range of −40…300°C. Major effort was put into a robust design approach with reduced sensitivity to temperature variations, targeting high precision applications in a high temperature environment. With a supply voltage of 5 V, the maximum simulated current consumption of the op-amp is 210 μA which leads to overall maximum power consumption of 1.05 mW. The open loop DC gain of the amplifier is expected to reach a minimum of 108 dB and a unity-gain-frequency of 1.02 MHz at a temperature of 300°C. For all temperatures the phase margin varies from 55…70 degrees for a 3 pF load.

Rancang Bangun Media Pembelajaran Praktikum Elektronika Analog Untuk Meningkatkan Pemahaman Mahasiswa Dalam Mengetahui Fungsi Dan Karakteristik Operational Amplifier

2018 ◽  
Vol 4 (1) ◽  
pp. 37-42
Author(s):  
Isminarti Isminarti ◽  
Ulia Ridhani
Keyword(s):  
Operational Amplifier ◽  
Op Amp

Elektronika Analog merupakan salah satu mata kuliah keahlian berkarya dalam program studi teknik mekatronika dimana materi mengenai fungsi dan karakteristik dari Operational Amplifier (Op-Amp) sulit dipahami mahasiswa karena pada dasarnya mereka masih bingung membedakan beberapa jenis op-amp. Kesalahan dalam memahami op-amp akan menyebabkan mereka bingung dan bosan, padahal ketika mereka paham mengenai fungsi op-amp, mereka akan sangat tertarik untuk mengembangkannya. Tujuan utama pembuatan media pembelajaran ini adalah memudahkan mahasiswa merangkai, mensimulasikan menggunakan software dan merangkai secara manual rangkaian elektronika analog untuk dapat memahami dengan mudah fungsi dan karakteristik op-amp. Metode yang digunakan dalam penelitian ini adalah eksperimental untuk membuktikan kebenaran output rangkaian berdasarkan teori.Ketertarikan mahasiswa dalam memahami rangkaian elektronika analog dapat dilihat dari rata-rata nilai mahasiswa Politeknik Bosowa tahun ajaran 2013/2014 yaitu 75,56, tahun ajaran 2014/2015 yaitu 78.67, tahun ajaran 2015/2016 yaitu 79,58 dan pada tahun ajaran 2016/2017 telah mencapai 87,06 meningkat pesat dari tahun sebelumnya dan telah melebihi angka 85 sesuai yang diharapkan.

30A/60V Electric Car Charger Control Circuit Simulation

2014 ◽  
Vol 971-973 ◽  
pp. 950-953
Author(s):  
Ying Chun Liu ◽  
Jian Ming Zhang ◽  
De Long Zhang ◽  
Yan Yu Wang ◽  
Chun Guang Hou ◽  
...  
Keyword(s):  
Operational Amplifier ◽  
Circuit Simulation ◽  
Characteristic Curve ◽  
Rechargeable Batteries ◽  
Current Control ◽  
Control Circuit ◽  
Constant Current ◽  
Constant Voltage ◽  
Op Amp ◽  
Charging Mode

Through analysis and comparison of existing charging method works , adding more links constant current charging and constant voltage charging on the basis of the three-stage charging mode is proposed to receive more in line with rechargeable batteries five-phase characteristic curve charging mode. By scaling the control circuit and the PI regulator circuits use the charging current value and the constant voltage is sampled , a constant voltage corresponding to the error value to be compared and outputs the PWM control chip SG3525, causing the output current of the front end circuit chip , the regulation voltage , the error is gradually reduced until it reaches the steady-state output . 1 key components - integrated operational amplifier selection Integrated operational amplifier control circuit for the main components , essentially the entire op-amp circuits are designed to carry around , so choose the op amp circuit is particularly important . From the foregoing analysis, the current control and voltage control portion of each part requires three op amp ( both as an amplifier , a PI controller is used ) , the entire control circuit requires access to six integrated amplifier . Out of circuit integration considerations, decided to use a quad op amp manifold and a dual op amp with the completion of the manifold . By screening and the corresponding parameters available on the TI (TEXAS INSTRUMENTS TI ) website , and ultimately determine the use of quad op amp LF347 and dual op amp TLC2272.

Design of a Rail-to-Rail Operational Amplifier with Low Supply Voltage and Low Power Dissipation

2013 ◽  
Vol 380-384 ◽  
pp. 3275-3278
Author(s):  
Zhan Peng Jiang ◽  
Rui Xu ◽  
Hai Huang ◽  
Chang Chun Dong
Keyword(s):  
Power Dissipation ◽  
Operational Amplifier ◽  
Supply Voltage ◽  
High Gain ◽  
Op Amp ◽  
Rail To Rail ◽  
Dc Gain ◽  
Low Power Dissipation ◽  
Static Power ◽  
Low Supply Voltage

An rail-to-rail operational amplifier is presented in this paper, which is designed by with two op amp, the first level of the structure is the complementary differential structure which will providing input for the operational amplifier, the second level is designed with the structure of folding cascode to get a high gain. The operational amplifier is designed with the TSMC 0.35u m3.3VCMOS mixed analog-digital technology library. The simulated results show that the operational amplifier has a DC gain of 110dB,a GBW of 9.5MHz,a static power dissipation of 0.95mW,a phase margin of 73°,a voltage slew rate of 8.2V/μS,an input and output range of 0-3.3V,when operating at 3.3V power supply and a 20pF output load.

scholarly journals Penerima Gelombang ELF berbasis Op-Amp untuk Pengolahan Akuisisi Data Gempa Bumi

2021 ◽  
Vol 9 (3) ◽  
pp. 592
Author(s):  
RHEYUNIARTO SAHLENDAR ASTHAN ◽  
DEAN CORIO ◽  
MIA MARIA ULFAH ◽  
URI ARTA RAMADHANI ◽  
ACHMAD MUNIR
Keyword(s):  
Data Acquisition ◽  
Operational Amplifier ◽  
Low Frequency ◽  
High Sensitivity ◽  
Active Filter ◽  
Extremely Low Frequency ◽  
Op Amp ◽  
Input Signals ◽  
Signal Sensitivity

ABSTRAKPenelitian ini membahas mengenai penerima gelombang extremely low frequency (ELF) untuk pengolahan akuisisi data gempa bumi. Penerima ELF dirancang menggunakan operational amplifier (Op-Amp) dengan masukan takmembalik. Sinyal yang diterima oleh antena diteruskan ke penerima ELF yang terdiri dari preamplifier dan amplifier untuk proses penguatan, serta filter aktif orde 2 untuk menekan sinyal di atas frekuensi cut-off sebesar 50Hz. Karakterisasi penerima ELF dilakukan dengan mengamati perbandingan level tegangan sinyal keluaran terhadap level tegangan sinyal masukan, sensitivitas, serta bentuk sinyal keluaran dari penerima ELF dalam domain waktu. Hasil simulasi menunjukkan bahwa penerima ELF menghasilkan penguatan sebesar 60,8dB dengan sensitifitas tinggi untuk level sinyal masukan di bawah -30dB yang mampu memenuhi level sinyal untuk pengolahan akuisisi data.Kata kunci: extremely low frequency, penerima ELF, operational amplifier, filter aktif, gempa bumi ABSTRACTThis research presents extremely low frequency (ELF) receiver for earthquake data acquisition processing. The ELF receiver is designed based on non-inverting operational amplifier (Op-Amp). The signal received by the antenna is fed into ELF receiver which consists of preamplifier and amplifier for amplification, and second order active filter to suppress unwanted signal above the cut-off frequency of 50Hz. Characterization of ELF receiver is performed by observing the comparison of the level output signal to level input signal, sensitivity, and ELF receiver signal output in time domain. The simulation results show that the ELF receiver has gain of 60.8dB with high sensitivity for low level input signals below -30dB that is able to meet signal level for data acquisition processing.Keywords: extremely low frequency, ELF receiver, operational amplifier, active filter, earthquake

scholarly journals Design of very low-voltages and high-performance CMOS gate-driven operational amplifier

2020 ◽  
Vol 20 (2) ◽  
pp. 670
Author(s):  
Hayder Khaleel AL-Qaysi ◽  
Musaab Mohammed Jasim ◽  
Siraj Manhal Hameed
Keyword(s):  
Power Supply ◽  
Operational Amplifier ◽  
High Performance ◽  
Power Supplies ◽  
Slew Rate ◽  
Op Amp ◽  
Rejection Ratio ◽  
Power Supply Rejection Ratio ◽  
Performance Specifications ◽  
Simulation Results

This paper presents the description and analysis of the design and HSPICE-based simulation results of very low-voltages (LVs) power supplies and high-performance specifications CMOS gate-driven (GD) operational amplifier (Op-Amp) circuit. The very LVs CMOS GD Op-Amp circuit designed using 90nm CMOS technology parameters and the folded cascode (FC) technique employed in the differential input stage. The HSPICE simulation results demonstrate that the overall gain is 73.1dB, the unity gain bandwidth is 14.9MHz, the phase margin is , the total power dissipation is 0.91mW, the output voltage swing is from 0.95V to 1V, the common-mode rejection ratio is dB, the equivalent input-referred noise voltage is 50.94  at 1MHz, the positive slew rate is 11.37 , the negative slew rate is 11.39 , the settling time is 137 , the positive power-supply rejection ratio is 74.2dB, and the negative power-supply rejection ratio is 80.1dB. The comparisons of simulation results at 1V and 0.814V power supplies’ voltages of the very LVs CMOS GD Op-Amp circuit demonstrate that the circuit functions with perfect performance specifications, and it is suitable for many considerable applications intended for very LVs CMOS Op-Amp circuits.

scholarly journals REALISASI PENGENDALI ON-OFF HISTERISIS DENGAN OPERATIONAL AMPLIFIER (OP-AMP)

2018 ◽  
Vol 19 (4) ◽  
pp. 10
Author(s):  
Dista Yoel Tadeus ◽  
Arkhan Subari ◽  
Saiful Manan
Keyword(s):  
Control System ◽  
Reference Point ◽  
Operational Amplifier ◽  
Op Amp ◽  
Maximum Limit

The realization of the On-Off control system can be built using the comparator principle. The principle has a weakness that is the possibility of chattering due to 'thin' limit of comparator switching. Low immunity to noise increases chances of chattering, if not anticipated it will cause 'fatigue' on actuator thus reducing component’s lifetime. Hysteresis has features to suppress chattering. This article describes how to realize the hysteresis On-Off controller using Operational Amplifier (Op-Amp) which is simple and cheap discrete electronics component, by modifying the Op-Amp comparator circuit so that it has the hysteresis band with minimum and maximum limit variable so that the reference point of the comparator can be shifted.

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