scholarly journals Die Backside FIB Preparation for Identification and Characterization of Metal Voids

1999 ◽  
Author(s):  
Ann N. Campbell ◽  
William F. Filter ◽  
Nicholas Antoniou
Keyword(s):  
Integrated Circuits ◽  
Failure Analysis ◽  
Cross Sections ◽  
Integrated Circuit ◽  
Flip Chip ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Milling Process ◽  
Plan View ◽  
Metal Interconnects

Abstract Both the increased complexity of integrated circuits, resulting in six or more levels of integration, and the increasing use of flip-chip packaging have driven the development of integrated circuit (IC) failure analysis tools that can be applied to the backside of the chip. Among these new approaches are focused ion beam (FIB) tools and processes for performing chip edits/repairs from the die backside. This paper describes the use of backside FIB for a failure analysis application rather than for chip repair. Specifically, we used FIB technology to prepare an IC for inspection of voided metal interconnects (“lines”) and vias. Conventional FIB milling was combined with a superenhanced gas assisted milling process that uses XeF2 for rapid removal of large volumes of bulk silicon. This combined approach allowed removal of the TiW underlayer from a large number of M1 lines simultaneously, enabling rapid localization and plan view imaging of voids in lines and vias with backscattered electron (BSE) imaging in a scanning electron microscope (SEM). Sequential cross sections of individual voided vias enabled us to develop a 3D reconstruction of these voids. This information clarified how the voids were formed, helping us identify the IC process steps that needed to be changed.

Direct Imaging of Device Characteristics In a Focused ion Beam System

1998 ◽  
Vol 4 (S2) ◽  
pp. 652-653 ◽  
Author(s):  
A. N. Campbell ◽  
J. M. Soden
Keyword(s):  
Integrated Circuits ◽  
Failure Analysis ◽  
Cross Sections ◽  
Material Removal ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Yield Enhancement ◽  
The Past ◽  
Design Changes ◽  
Design Debugging

A great deal can be learned about integrated circuits (ICs) and microelectronic structures simply by imaging them in a focused ion beam (FIB) system. FIB systems have evolved during the past decade from something of a curiosity to absolutely essential tools for microelectronics design verification and failure analysis. FIB system capabilities include localized material removal, localized deposition of conductors and insulators, and imaging. A major commercial driver for FIB systems is their usefulness in the design debugging cycle by (1) rewiring ICs quickly to test design changes and (2) making connection to deep conductors to facilitate electrical probing of complex ICs. FIB milling is also used for making precision cross sections and for TEM sample preparation of microelectronic structures for failure analysis and yield enhancement applications.

Failure Analysis of Flip Chip C4 Package Using Focused Ion Beam Milling Technique

2011 ◽  
Author(s):  
Lihong Cao ◽  
Loc Tran ◽  
Wallace Donna
Keyword(s):  
Sample Preparation ◽  
Failure Analysis ◽  
Cross Sections ◽  
Flip Chip ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Failure Mechanisms ◽  
Organic Substrate ◽  
Dual Beam ◽  
Preparation Techniques

Abstract This article describes how Focused Ion Beam (FIB) milling methodology enhances the capability of package-level failure analysis on flip-chip packages by eliminating the artifacts induced by using conventional mechanical techniques. Dual- Beam Focused Ion Beam (DB FIB) cross sections were successful in detecting failure mechanisms related either to the die/C4 bump or package defect inside the organic substrate. This paper outlines detailed sample preparation techniques prior to performing the DB FIB cross-sections, along with case studies of DB FIB cross-sections.

Direct Plan View FIB Liftout for Near-Surface Defect Analysis in TEM

2013 ◽  
Author(s):  
Max L. Lifson ◽  
Carla M. Chapman ◽  
D. Philip Pokrinchak ◽  
Phyllis J. Campbell ◽  
Greg S. Chrisman ◽  
...  
Keyword(s):  
Failure Analysis ◽  
Silicon Germanium ◽  
Focused Ion Beam ◽  
Surface Defects ◽  
Ion Beam ◽  
Misfit Dislocations ◽  
Tem Analysis ◽  
Plan View ◽  
Near Surface ◽  
Straightforward Method

Abstract Plan view TEM imaging is a powerful technique for failure analysis and semiconductor process characterization. Sample preparation for near-surface defects requires additional care, as the surface of the sample needs to be protected to avoid unintentionally induced damage. This paper demonstrates a straightforward method to create plan view samples in a dual beam focused ion beam (FIB) for TEM studies of near-surface defects, such as misfit dislocations in heteroepitaxial growths. Results show that misfit dislocations are easily imaged in bright-field TEM and STEM for silicon-germanium epitaxial growth. Since FIB tools are ubiquitous in semiconductor failure analysis labs today, the plan view method presented provides a quick to implement, fast, consistent, and straightforward method of generating samples for TEM analysis. While this technique has been optimized for near-surface defects, it can be used with any application requiring plan view TEM analysis.

Focused Ion Beam Metrology

1995 ◽  
Vol 396 ◽  
Author(s):  
A. Wagner ◽  
P. Blauner ◽  
P. Longo ◽  
S. Cohen
Keyword(s):  
Integrated Circuits ◽  
Cross Sections ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Dimensional Change ◽  
Critical Dimension ◽  
Ion Beams ◽  
Near Surface ◽  
Electron Microscopes ◽  
Scanning Electron Microscopes

AbstractFocused Ion Beams offer a new method of measuring the size of polymer resist features on integrated circuits. The short penetration range of an ion relative to an electron is shown to offer fundamental advantages for critical dimension (CD) metrology. By confining the polymer damage to the very near surface, ion beams can induce less dimensional change than scanning electron microscopes during the measurement process. This can result in improved CD measurement precision. The erosion rate of polymers to various ion species is also presented, and we show that erosion is non-linear with ion dose. The use of FIB for forming resist cross sections is also demonstrated. An H20 gas assisted etching process for polymers has been developed, and is shown to significantly improve the quality of resist cross sections.

TEM FIB Lift-Out of Mount Saint Helens Volcanic Ash

1999 ◽  
Vol 5 (S2) ◽  
pp. 908-909
Author(s):  
J.L. Drown-MacDonald ◽  
B.I. Prenitzer ◽  
T.L. Shofner ◽  
L.A. Giannuzzi
Keyword(s):  
Cross Sections ◽  
Volcanic Ash ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Specimen Preparation ◽  
Preparation Technique ◽  
Tem Analysis ◽  
Plan View ◽  
Transmission Electron ◽  
Silver Paint

Focused Ion Beam (FIB) specimen preparation for both scanning and transmission electron microscopy (SEM and TEM respectively) has seen an increase in usage over the past few years. The advantage to the FIB is that site specific cross sections (or plan view sections) may be fabricated quickly and reproducibly from numerous types of materials using a finely focused beam of Ga+ ions [1,2]. It was demonstrated by Prenitzer et al. that TEM specimens may be acquired from individual Zn powder particles by employing the FIB LO specimen preparation technique [3]. In this paper, we use the FIB LO technique to prepare TEM specimens from Mount Saint Helens volcanic ash.Volcanic ash from Mount Saint Helens was obtained at the Microscopy and Microanalysis 1998 meeting in Atlanta. TEM analysis of the ash was performed using the FIB lift out technique [1]. Ash powders were dusted onto an SEM sample stud that had been coated with silver paint.

A Transmission X-ray Microscope (TXM) for Non-destructive 3D Imaging of ICs at Sub-100 nm Resolution

2002 ◽  
Author(s):  
Steve Wang ◽  
Frederick Duewer ◽  
Shashidar Kamath ◽  
Christopher Kelly ◽  
Alan Lyon ◽  
...  
Keyword(s):  
Electron Microscopy ◽  
Integrated Circuits ◽  
Failure Analysis ◽  
Focused Ion Beam ◽  
Process Development ◽  
Imaging System ◽  
Ion Beam ◽  
Layer By Layer ◽  
X Ray ◽  
Submicron Structures

Abstract Xradia has developed a laboratory table-top transmission x-ray microscope, TXM 54-80, that uses 5.4 keV x-ray radiation to nondestructively image buried submicron structures in integrated circuits with at better than 80 nm 2D resolution. With an integrated tomographic imaging system, a series of x-ray projections through a full IC stack, which may include tens of micrometers of silicon substrate and several layers of Cu interconnects, can be collected and reconstructed to produce a 3D image of the IC structure at 100 nm resolution, thereby allowing the user to detect, localize, and characterize buried defects without having to conduct layer by layer deprocessing and inspection that are typical of conventional destructive failure analysis. In addition to being a powerful tool for both failure analysis and IC process development, the TXM may also facilitate or supplant investigations using scanning electron microscopy (SEM), transmission electron microscopy (TEM), and focused ion beam (FIB) tools, which generally require destructive sample preparation and a vacuum environment.

Failure Analysis of Flip-Chip Bumps After Thermal Stressing

2000 ◽  
Author(s):  
Tejpal K. Hooghan ◽  
Kultaransingh Hooghan ◽  
Sho Nakahara ◽  
Robert K. Wolf ◽  
Robert W. Privette ◽  
...  
Keyword(s):  
Cross Sections ◽  
Flip Chip ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Diagnostic Technique ◽  
Acoustic Microscopy ◽  
Under Bump Metallization ◽  
Thermal Tests ◽  
Transmission Electron ◽  
Electrical Bias

Abstract This paper describes a new diagnostic technique for analyzing microstructural changes occurring to flip chip joints after accelerated thermal tests. Flip chip reliability was assessed at high temperatures, with and without the application of electrical bias. A combination of standard metallurgical polishing techniques and the use of a focused ion beam (FIB) lift out technique was employed to make site-specific samples for transmission electron microscopy (TEM) cross-sections. We studied evaporated 95Pb/5Sn bumps, on sputtered Cr/CrCu/Cu/Au as the under bump metallization (UBM). Thermally stressed samples were tested for electrical continuity and evaluated using 50 MHz C-mode scanning acoustic microscopy (C-SAM). Failed samples were crosssectioned and large voids at the UBM were observed optically. TEM specimens taken from the predefined UBM region of degraded flip chip devices provided critical microstructural information, which led to a better understanding of a cause of degradation occurring in the flip chip joints.

Alleviating Sample Charging during FIB Operation

2015 ◽  
Author(s):  
Q. Liu ◽  
H.B. Kor ◽  
Y.W. Siah ◽  
C.L. Gan
Keyword(s):  
Electron Microscopy ◽  
Cross Sections ◽  
Focused Ion Beam ◽  
Semiconductor Device ◽  
Ion Beam ◽  
Semiconductor Industry ◽  
Milling Process ◽  
Front Side ◽  
Dual Beam ◽  
Transmission Electron

Abstract Dual-beam focused ion beam (DB-FIB) system is widely used in the semiconductor industry to prepare cross-sections and transmission electron microscopy (TEM) lamellae, modify semiconductor devices and verify layout. One of the factors that limits its success rate is sample charging, which is caused by a lack of conductive path to discharge the accumulated charges. In this paper, an approach using an insitu micromanipulator was investigated to alleviate the charging effects. With this approach, a simple front side semiconductor device modification was carried out and the corresponding stage current was monitored to correlate to the milling process.

Maskless, Direct Deposition of Copper onto Aluminum Bond Pads for Flip Chip Applications

1998 ◽  
Vol 515 ◽  
Author(s):  
M. Fang ◽  
T. O'Keefe ◽  
M. Stroder ◽  
W. Shih ◽  
M. O'Keefe ◽  
...  
Keyword(s):  
Thin Films ◽  
Integrated Circuits ◽  
Flip Chip ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Metallic Copper ◽  
Nucleation Site ◽  
Oxide Surface ◽  
Underbump Metallization ◽  
Organic Solutions

ABSTRACTFlip chip interconnection of integrated circuits (IC) for packaging applications such as direct chip attachment use Pb-Sn solders as the connection between the die and the substrate. Underbump metallization is typically used to transition from the non-solderable Al bond pad on the IC to a solderable surface such as copper using traditional blanket metal deposition, photolithography and etching procedures. In this study, we report for the first time the use of a novel process for selectively depositing adherent copper directly onto aluminum thin films, eliminating the need for adhesion promoting transition layers and additional patterning steps. Utilizing copper bearing organic solutions and standard electroless and electrolytic copper plating baths, as-deposited and annealed sputter deposited Al-x%Cu (x = 0 to 2) thin films were coated with metallic copper. An increase in the organically deposited copper nucleation site density was observed with increasing copper concentration in the sputtered aluminum/copper thin films. Preliminary results using focused ion beam microscopy indicated that dissolution of the aluminum oxide surface and subsequent deposition of copper by cementation occurs in the non-conducting organic solution at sub-micron reaction lengths. Qualitative adhesion testing of samples resulted in the majority of films passing the tape test. Demonstration of the process using 50 micron diameter vias in BCB coated flip chip test vehicles from MCNC will be presented.

Studies of Buried Voids Capturing with e-Beam Inspection System and Confirmation with Physical Failure Analysis

2012 ◽  
Author(s):  
Hong Xiao ◽  
Ximan Jiang
Keyword(s):  
Electron Beam ◽  
Electron Microscope ◽  
Failure Analysis ◽  
Integrated Circuit ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Energetic Electron ◽  
Optical Microscope ◽  
Inspection System ◽  
Dual Beam

Abstract In this paper, a novel inspection mode of electron beam inspection (EBI) that can effectively detect buried voids in tungsten (W) plugs is reported for the first time. Buried voids in metal are a defect of interest (DOI) that cannot be captured by either optical inspection or traditional EBI modes. The detection of buried voids is achieved by using energetic electron beam (e-beam) with energy high enough to penetrate into metal and reach the buried void. By selecting desired secondary electrons to form the inspection images, strong contrast between the defective tungsten plugs and normal ones can be achieved. Failure analysis was performed on the DOI that is unique to this new EBI mode. After optical microscope locating and laser marking, we successfully recaptured DOI with scanning electron microscope (SEM) and capped the DOI with e-beam assisted platinum (Pt) deposition. Later a dual-beam focused ion beam (FIB) system was used to re-locate the Pt-capped DOI and prepare samples for transmission electron microscope (TEM). TEM images confirmed the unique DOI were buried voids in the metal plugs, which could affect resistance of interconnect in integrated circuit (IC) chip and impact the IC yield.

Sign in / Sign up

Export Citation Format

Share Document