Laser Voltage Probe (LVP): A Novel Optical Probing Technology for Flip-Chip Packaged Microprocessors

2000 ◽  
Author(s):  
Wai Mun Yee ◽  
Mario Paniccia ◽  
Travis Eiles ◽  
Valluri Rao
Keyword(s):  
Integrated Circuits ◽  
High Frequency ◽  
Flip Chip ◽  
Complementary Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Ir Laser ◽  
Timing Measurement ◽  
Optical Probing ◽  
Probe Hole ◽  
Silicon Debug

Abstract A novel optical probing technique to measure voltage waveforms from flip-chip packaged complementary metal-oxide-semiconductor (CMOS) integrated circuits (IC) is described. This infrared (IR) laser based technique allows signal waveform acquisition and high frequency timing measurement directly from active PN junctions through the silicon backside substrate on IC’s mounted in flip-chip, stand-alone, or multi-chip module packages as well as wire-bond packages on which the chip backside is accessible. The technique significantly improves silicon debug & failure analysis (FA) through-put time (TPT) as compared to backside electron-beam (E-beam) probing because of the elimination of backside trenching and probe hole generation operations.

scholarly journals LTCC Packaged Ring Oscillator Based Sensor for Evaluation of Cell Proliferation

Sensors ◽  
2018 ◽  
Vol 18 (10) ◽  
pp. 3346 ◽  
Author(s):  
Joni Kilpijärvi ◽  
Niina Halonen ◽  
Maciej Sobocinski ◽  
Antti Hassinen ◽  
Bathiya Senevirathna ◽  
...  
Keyword(s):  
Frequency Shift ◽  
Flip Chip ◽  
Effective Permittivity ◽  
Complementary Metal Oxide Semiconductor ◽  
Cellular Adhesion ◽  
Sensor Response ◽  
Lung Epithelial Cells ◽  
Ring Oscillator ◽  
Oxide Semiconductor ◽  
Chip Surface

A complementary metal-oxide-semiconductor (CMOS) chip biosensor was developed for cell viability monitoring based on an array of capacitance sensors utilizing a ring oscillator. The chip was packaged in a low temperature co-fired ceramic (LTCC) module with a flip chip bonding technique. A microcontroller operates the chip, while the whole measurement system was controlled by PC. The developed biosensor was applied for measurement of the proliferation stage of adherent cells where the sensor response depends on the ratio between healthy, viable and multiplying cells, which adhere onto the chip surface, and necrotic or apoptotic cells, which detach from the chip surface. This change in cellular adhesion caused a change in the effective permittivity in the vicinity of the sensor element, which was sensed as a change in oscillation frequency of the ring oscillator. The sensor was tested with human lung epithelial cells (BEAS-2B) during cell addition, proliferation and migration, and finally detachment induced by trypsin protease treatment. The difference in sensor response with and without cells was measured as a frequency shift in the scale of 1.1 MHz from the base frequency of 57.2 MHz. Moreover, the number of cells in the sensor vicinity was directly proportional to the frequency shift.

Analysis and Simulation of a Low-Leakage Analog Single Gate and FinFET Circuits

2014 ◽  
Vol 13 (02) ◽  
pp. 1450012 ◽  
Author(s):  
Manorama Chauhan ◽  
Ravindra Singh Kushwah ◽  
Pavan Shrivastava ◽  
Shyam Akashe
Keyword(s):  
Integrated Circuits ◽  
Metal Oxide ◽  
Low Power ◽  
High Performance ◽  
Complementary Metal Oxide Semiconductor ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Short Channel ◽  
State Dependency ◽  
Low Leakage

In the world of Integrated Circuits, complementary metal–oxide–semiconductor (CMOS) has lost its ability during scaling beyond 50 nm. Scaling causes severe short channel effects (SCEs) which are difficult to suppress. FinFET devices undertake to replace usual Metal Oxide Semiconductor Field Effect Transistor (MOSFETs) because of their better ability in controlling leakage and diminishing SCEs while delivering a strong drive current. In this paper, we present a relative examination of FinFET with the double gate MOSFET (DGMOSFET) and conventional bulk Si single gate MOSFET (SGMOSFET) by using Cadence Virtuoso simulation tool. Physics-based numerical two-dimensional simulation results for FinFET device, circuit power is presented, and classifying that FinFET technology is an ideal applicant for low power applications. Exclusive FinFET device features resulting from gate–gate coupling are conversed and efficiently exploited for optimal low leakage device design. Design trade-off for FinFET power and performance are suggested for low power and high performance applications. Whole power consumptions of static and dynamic circuits and latches for FinFET device, believing state dependency, show that leakage currents for FinFET circuits are reduced by a factor of over ~ 10X, compared to DGMOSFET and ~ 20X compared with SGMOSFET.

Experimental Basis and Design of a New Cochlear Prosthesis System

1987 ◽  
Vol 96 (1_suppl) ◽  
pp. 76-79
Author(s):  
J. Génin ◽  
R. Charachon
Keyword(s):  
Theoretical Model ◽  
Integrated Circuits ◽  
Cochlear Implant ◽  
Dynamic Range ◽  
Complementary Metal Oxide Semiconductor ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Semiconductor Technology ◽  
Experimental Basis ◽  
Cochlear Prosthesis

In a multichannel cochlear prosthesis, electrical interactions between electrodes impose severe limitations on dynamic range and selectivity. We present a theoretical model to cope with these limitations. Building a successful cochlear implant requires full custom-integrated circuits. We present the design of such a device, implemented in complementary metal oxide semiconductor technology. The area of the chip is 9 mm2 and it can stimulate 15 cochlear electrodes with current impulses.

scholarly journals Bitstream Photon Counting Chirped AM Lidar with a Dual Unipolar Signal

2020 ◽  
Author(s):  
Brian Redman
Keyword(s):  
Integrated Circuits ◽  
Phase I ◽  
Signal To Noise Ratio ◽  
Photon Counting ◽  
Complementary Metal Oxide Semiconductor ◽  
Local Oscillator ◽  
Sinusoidal Signal ◽  
Oxide Semiconductor ◽  
Quadrature Phase ◽  
Simulation Results

This paper is a follow-up to three previous papers: the first introducing the new Bitstream Photon Counting Chirped Amplitude Modulation (AM) Lidar (PC-CAML) with the unipolar Digital Logic Local Oscillator (DLLO) concept, the second introducing the improvement thereof using the bipolar DLLO, and the third introducing the improvement of digital In-phase and Quadrature-phase (I/Q) demodulation.In that previous work, the signal was a single unipolar chirped sinusoidal or square wave. This paper introduces a new bitstream PC-CAML transceiver architecture that combines two unipolar chirped signals, referred to as the dual unipolar signal, to form a single bipolar signal in the receiver. (patent pending) This bipolar signal is mixed with the bipolar DLLOs in the in-phase (I) digital mixing and quadrature-phase (Q) digital mixing channels for digital I/Q demodulation for improved signal-to-noise ratio (SNR) compared to that when using a single unipolar signal.The simulation results presented in this paper indicate an SNR improvement for the dual unipolar chirped sinusoidal signal bitstream PC-CAML compared to that of the unipolar chirped sinusoidal signal bitstream PC-CAML (both with bipolar DLLOs and digital I/Q demodulation) of from about 3 dB to about 6 dB for signals below the onset of receiver saturation, and an improvement for maximum achievable SNR of about 13 dB if the receiver is allowed to saturate.The bitstream PC-CAML with a dual unipolar signal and bipolar DLLOs with digital I/Q demodulation architecture discussed in this paper adds complexity to the transmitter and receiver compared to the architectures presented in the previous papers. Whether or not this additional complexity is worth the improved SNR will have to be decided as part of system trade studies for particular systems and their applications.However, the new architecture still retains the key advantages of the previous bitstream PC-CAML architectures since it still replaces bulky, power-hungry, and expensive wideband RF analog electronics in the receiver with digital components that can be implemented in inexpensive silicon complementary metal-oxide-semiconductor (CMOS) read-out integrated circuits (ROICs) to make the bitstream PC-CAML with a DLLO more suitable for compact lidar-on-a-chip systems and lidar array receivers than previous standard PC-CAML systems.This paper introduces the dual unipolar signal and bipolar DLLOs with digital I/Q demodulation transceiver architecture for bitstream PC-CAML, and presents the initial SNR theory with comparisons to Monte Carlo simulation results.

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