scholarly journals Development of a Novel Deployable Solar Panel and Mechanism for 6U CubeSat of STEP Cube Lab-II

Aerospace ◽  
2021 ◽  
Vol 8 (3) ◽  
pp. 64
Author(s):  
Shankar Bhattarai ◽  
Ji-Seong Go ◽  
Hongrae Kim ◽  
Hyun-Ung Oh
Keyword(s):  
Solar Cells ◽  
Printed Circuit Board ◽  
Solar Panel ◽  
Circuit Board ◽  
Structural Safety ◽  
Release Mechanism ◽  
Constrained Layer Damping ◽  
Solar Panels ◽  
Printed Circuit ◽  
Design Effectiveness

The structural safety of solar cells mounted on deployable solar panels in the launch vibration environment is a significant aspect of a successful CubeSat mission. This paper presents a novel highly damped deployable solar panel module that is effective in ensuring structural protection of solar cells under the launch environment by rapidly suppressing the vibrations transmitting through the solar panel by constrained layer damping achieved using printed circuit board (PCB)-based multilayered thin stiffeners with double-sided viscoelastic tapes. A high-damping solar panel demonstration model with a three-pogo pin-based burn wire release mechanism was fabricated and tested for application in the 6U CubeSat “STEP Cube Lab-II” developed by Chosun University, South Korea. The reliable release function and radiation hardness assurance of the mechanism in an in-orbit environment were confirmed by performing solar panel deployment tests and radiation tests, respectively. The design effectiveness and structural safety of the proposed solar panel module were validated by launch vibration and in-orbit environment tests at the qualification level.

scholarly journals Development of 6 U CubeSat’s Deployable Solar Panel with Burn Wire Triggering Holding and Release Mechanism

2019 ◽  
Vol 2019 ◽  
pp. 1-13
Author(s):  
Tae-Yong Park ◽  
Bong-Geon Chae ◽  
Hyun-Ung Oh
Keyword(s):  
Random Vibration ◽  
Printed Circuit Board ◽  
Solar Panel ◽  
Circuit Board ◽  
Structural Safety ◽  
Release Mechanism ◽  
Printed Circuit ◽  
Test Conditions ◽  
Wire Cutting ◽  
Vibration Tests

In the present work, a deployable solar panel based on a burn wire triggering holding and release mechanism was developed for use of 6 U CubeSat. The holding and release mechanism was designed based on a nichrome burn wire cutting method widely used for CubeSat applications. However, it provides a high loading capability, reliable wire cutting, multiplane constraints, and handling simplicity during the tightening process of wire. A demonstration model of a printed circuit board-based solar panel stiffened by a high-pressure fiberglass-laminated G10 material was fabricated and tested to validate the effectiveness of the design and functionality of the mechanism under various test conditions. The structural safety of the solar panel combined with the mechanism in a launch vibration environment was verified through sine and random vibration tests at qualification level.

scholarly journals Experimental Validation of a Highly Damped Deployable Solar Panel Module with a Pogo Pin-Based Burn Wire Triggering Release Mechanism

2020 ◽  
Vol 2020 ◽  
pp. 1-14 ◽  
Author(s):  
Shankar Bhattarai ◽  
Ji-Seong Go ◽  
Hongrae Kim ◽  
Hyun-Ung Oh
Keyword(s):  
Room Temperature ◽  
Experimental Validation ◽  
Solar Panel ◽  
Structural Safety ◽  
Release Mechanism ◽  
Thermal Vacuum ◽  
Triggering Mechanism ◽  
Damping Characteristics ◽  
Ambient Room Temperature ◽  
Design Effectiveness

In this present work, a highly damped deployable solar panel module was developed for application in the 3 U CubeSat. The solar panel proposed herein is effective in guaranteeing the structural safety of solar cells under a launch environment owing to the superior damping characteristics achieved using multilayered stiffeners with viscoelastic acrylic tapes. A holding and release action of the solar panel was achieved by a new version of spring-loaded pogo pin-based burn wire triggering mechanism. A demonstration model of high-damping solar panel assembly was fabricated and tested to validate the effectiveness of the design. The holding and release mechanism achieved using a pogo pin was functionally tested through solar panel deployment tests under ambient room temperature and a thermal vacuum environment. The design effectiveness and structural safety of the solar panel module were validated through qualification-level launch and in-orbit environment tests.

scholarly journals Diseño e Implementacion de un Modulo de Gestion de Energia para un Pico-Satelite Tipo Cubesat

2018 ◽  
Vol 3 (1) ◽  
pp. 913
Author(s):  
Jorge Enrique Salamanca Céspedes ◽  
Roberto Ferro Escobar
Keyword(s):  
Printed Circuit Board ◽  
Circuit Board ◽  
Space Environment ◽  
Study Phase ◽  
Solar Panels ◽  
Power Module ◽  
Printed Circuit ◽  
Component Assembly ◽  
Proper Operation ◽  
Made In

This article briefly describes the development of Power Module for Experimental picosatellite CubeSat UD Colombia 1 following CubeSat standard requirements. Whether the Power Module project consists of four stages of development: study, design, implementation and testing. In the study phase to review the theoretical framework and preliminary designs made in the Universidad Distrital and other CubeSat  developed in the world, also investigates existing components and technologies in the market. The design phase involves analysis of the system and using a computer program designed to generate the necessary hardware. The implementation consists in making the printed circuit board and the component assembly. And electrical type tests to certify the proper operation of the module. The development of the power module of the CubeSat standard requirements and mission picosatellite, and depends on the state and information available from other modules picosatellite. The ultimate goal is to obtain a power module that is functional and working conditions of the space environment in which the picosatellite fulfill its focused on telemedicine, with a payload that would become the telecommunications system mission. Keywords: Power Module, CubeSat UD Colombia 1, Standard CubeSat, DC-DC converters, Solar Panels, Batteries, Power Management.

Characteristics of Radiated Emission from a Printed Circuit Board with a Slit

2012 ◽  
Vol 132 (6) ◽  
pp. 404-410 ◽  
Author(s):  
Kenichi Nakayama ◽  
Kenichi Kagoshima ◽  
Shigeki Takeda
Keyword(s):  
Printed Circuit Board ◽  
Circuit Board ◽  
Printed Circuit ◽  
Radiated Emission

Confirming the Signal Integrity in Transmission of Digital Signals on Microstrip Straight Circuits via the Eye Diagrams

2014 ◽  
Vol 5 (1) ◽  
pp. 737-741
Author(s):  
Alejandro Dueñas Jiménez ◽  
Francisco Jiménez Hernández
Keyword(s):  
Integrated Circuits ◽  
Printed Circuit Board ◽  
Signal Integrity ◽  
High Volume ◽  
Information Storage ◽  
Circuit Board ◽  
Electromagnetic Simulation ◽  
Electronic Systems ◽  
Digital Signals ◽  
Printed Circuit

Because of the high volume of processing, transmission, and information storage, electronic systems presently requires faster clock speeds tosynchronizethe integrated circuits. Presently the “speeds” on the connections of a printed circuit board (PCB) are in the order of the GHz. At these frequencies the behavior of the interconnects are more like that of a transmission line, and hence distortion, delay, and phase shift- effects caused by phenomena like cross talk, ringing and over shot are present and may be undesirable for the performance of a circuit or system.Some of these phrases were extracted from the chapter eight of book “2-D Electromagnetic Simulation of Passive Microstrip Circuits” from the corresponding author of this paper.

Root Cause Analysis of a Connector Time-Delayed Fracture

2015 ◽  
Author(s):  
Prabjit Singh ◽  
Ying Yu ◽  
Robert E. Davis
Keyword(s):  
Printed Circuit Board ◽  
Ceramic Substrate ◽  
Circuit Board ◽  
Delayed Fracture ◽  
Ceramic Substrates ◽  
Printed Circuit ◽  
Root Cause ◽  
Chip Carrier ◽  
Electrical Connections ◽  
Grain Boundary Grooves

Abstract A land-grid array connector, electrically connecting an array of plated contact pads on a ceramic substrate chip carrier to plated contact pads on a printed circuit board (PCB), failed in a year after assembly due to time-delayed fracture of multiple C-shaped spring connectors. The land-grid-array connectors analyzed had arrays of connectors consisting of gold on nickel plated Be-Cu C-shaped springs in compression that made electrical connections between the pads on the ceramic substrates and the PCBs. Metallography, fractography and surface analyses revealed the root cause of the C-spring connector fracture to be plating solutions trapped in deep grain boundary grooves etched into the C-spring connectors during the pre-plating cleaning operation. The stress necessary for the stress corrosion cracking mechanism was provided by the C-spring connectors, in the land-grid array, being compressed between the ceramic substrate and the printed circuit board.

Application of Lock-in Thermography on PCB for Fault Localization and Validation of Failure Mechanism Due to External Discrete Component Variation

2010 ◽  
Author(s):  
William Ng ◽  
Kevin Weaver ◽  
Zachary Gemmill ◽  
Herve Deslandes ◽  
Rudolf Schlangen
Keyword(s):  
Failure Mechanism ◽  
Integrated Circuit ◽  
Printed Circuit Board ◽  
Hot Spot ◽  
Circuit Board ◽  
Discrete Component ◽  
Printed Circuit ◽  
Thermal Signature ◽  
Lock In

Abstract This paper demonstrates the use of a real time lock-in thermography (LIT) system to non-destructively characterize thermal events prior to the failing of an integrated circuit (IC) device. A case study using a packaged IC mounted on printed circuit board (PCB) is presented. The result validated the failing model by observing the thermal signature on the package. Subsequent analysis from the backside of the IC identified a hot spot in internal circuitry sensitive to varying value of external discrete component (inductor) on PCB.

Temperature and Humidity Dependent Reliability Analysis of RGB LED Chips

2006 ◽  
Author(s):  
Jun-Xian Fu ◽  
Shukri Souri ◽  
James S. Harris
Keyword(s):  
Reliability Analysis ◽  
Printed Circuit Board ◽  
Light Emitting Diode ◽  
Circuit Board ◽  
Light Emitting ◽  
Printed Circuit ◽  
Root Cause ◽  
Micro Cracks ◽  
Temperature And Humidity

Abstract Temperature and humidity dependent reliability analysis was performed based on a case study involving an indicator printed-circuit board with surface-mounted multiple-die red, green and blue light-emitting diode chips. Reported intermittent failures were investigated and the root cause was attributed to a non-optimized reflow process that resulted in micro-cracks and delaminations within the molding resin of the chips.

Materials Characterization of Lead Free Compositions for Minimum Temperature SMT Processes at the SLI-Second Level Interconnect Solder Joint

2004 ◽  
Author(s):  
Norman J. Armendariz ◽  
Prawin Paulraj
Keyword(s):  
Solder Joint ◽  
Printed Circuit Board ◽  
Gold Surface ◽  
Circuit Board ◽  
Lead Free ◽  
Processing Temperature ◽  
The European Union ◽  
Printed Circuit ◽  
Higher Temperature ◽  
Tin Silver Copper

Abstract The European Union is banning the use of Pb in electronic products starting July 1st, 2006. Printed circuit board assemblies or “motherboards” require that planned CPU sockets and BGA chipsets use lead-free solder ball compositions at the second level interconnections (SLI) to attach to a printed circuit board (PCB) and survive various assembly and reliability test conditions for end-use deployment. Intel is pro-actively preparing for this anticipated Pb ban, by evaluating a new lead free (LF) solder alloy in the ternary Tin- Silver-Copper (Sn4.0Ag0.5Cu) system and developing higher temperature board assembly processes. This will be pursued with a focus on achieving the lowest process temperature required to avoid deleterious higher temperature effects and still achieve a metallurgically compatible solder joint. One primary factor is the elevated peak reflow temperature required for surface mount technology (SMT) LF assembly, which is approximately 250 °C compared to present eutectic tin/lead (Sn37Pb) reflow temperatures of around 220 °C. In addition, extended SMT time-above-liquidus (TAL) and subsequent cooling rates are also a concern not only for the critical BGA chipsets and CPU BGA sockets but to other components similarly attached to the same PCB substrate. PCBs used were conventional FR-4 substrates with organic solder preservative on the copper pads and mechanical daisychanged FCBGA components with direct immersion gold surface finish on their copper pads. However, a materials analysis method and approach is also required to characterize and evaluate the effect of low peak temperature LF SMT processing on the PBA SLI to identify the absolute limits or “cliffs” and determine if the minimum processing temperature and TAL could be further lowered. The SLI system is characterized using various microanalytical techniques, such as, conventional optical microscopy, scanning electron microscopy, energy dispersive spectroscopy and microhardness testing. In addition, the SLI is further characterized using macroanalytical techniques such as dye penetrant testing (DPT) with controlled tensile testing for mechanical strength in addition to disbond and crack area mapping to complete the analysis.

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