scholarly journals A Comparison Study on Multilayered Barrier Oxide Structure in Charge Trap Flash for Synaptic Operation

Crystals ◽  
2021 ◽  
Vol 11 (1) ◽  
pp. 70
Author(s):  
Minkyung Kim ◽  
Eunpyo Park ◽  
In Soo Kim ◽  
Jongkil Park ◽  
Jaewook Kim ◽  
...  
Keyword(s):  
Memory Device ◽  
Spike Timing ◽  
Comparison Study ◽  
Oxide Structure ◽  
Charge Trap ◽  
Synaptic Functions ◽  
Essential Components ◽  
Neuromorphic System ◽  
A Charge ◽  
Synaptic Operation

A synaptic device that contains weight information between two neurons is one of the essential components in a neuromorphic system, which needs highly linear and symmetric characteristics of weight update. In this study, a charge trap flash (CTF) memory device with a multilayered high-κ barrier oxide structure on the MoS2 channel is proposed. The fabricated device was oxide-engineered on the barrier oxide layers to achieve improved synaptic functions. A comparison study between two fabricated devices with different barrier oxide materials (Al2O3 and SiO2) suggests that a high-κ barrier oxide structure improves the synaptic operations by demonstrating the increased on/off ratio and symmetry of synaptic weight updates due to a better coupling ratio. Lastly, the fabricated device has demonstrated reliable potentiation and depression behaviors and spike-timing-dependent plasticity (STDP) for use in a spiking neural network (SNN) neuromorphic system.

scholarly journals Synaptic memory devices from CoO/Nb:SrTiO 3 junction

2019 ◽  
Vol 6 (4) ◽  
pp. 181098 ◽  
Author(s):  
Le Zhao ◽  
Jie Xu ◽  
Xiantao Shang ◽  
Xue Li ◽  
Qiang Li ◽  
...  
Keyword(s):  
Large Scale ◽  
Hebbian Learning ◽  
Learning Rule ◽  
Charge Trapping ◽  
Spike Timing ◽  
Hebbian Learning Rule ◽  
Synaptic Functions ◽  
Neuromorphic System ◽  
Reduce Energy Consumption ◽  
Novel Design

Non-volatile memristors are promising for future hardware-based neurocomputation application because they are capable of emulating biological synaptic functions. Various material strategies have been studied to pursue better device performance, such as lower energy cost, better biological plausibility, etc. In this work, we show a novel design for non-volatile memristor based on CoO/Nb:SrTiO 3 heterojunction. We found the memristor intrinsically exhibited resistivity switching behaviours, which can be ascribed to the migration of oxygen vacancies and charge trapping and detrapping at the heterojunction interface. The carrier trapping/detrapping level can be finely adjusted by regulating voltage amplitudes. Gradual conductance modulation can therefore be realized by using proper voltage pulse stimulations. And the spike-timing-dependent plasticity, an important Hebbian learning rule, has been implemented in the device. Our results indicate the possibility of achieving artificial synapses with CoO/Nb:SrTiO 3 heterojunction. Compared with filamentary type of the synaptic device, our device has the potential to reduce energy consumption, realize large-scale neuromorphic system and work more reliably, since no structural distortion occurs.

Improvement of memory performance by high temperature annealing of the Al2O3 blocking layer in a charge-trap type flash memory device

2010 ◽  
Vol 96 (22) ◽  
pp. 222902 ◽  
Author(s):  
Jong Kyung Park ◽  
Youngmin Park ◽  
Sung Kyu Lim ◽  
Jae Sub Oh ◽  
Moon Sig Joo ◽  
...  
Keyword(s):  
High Temperature ◽  
Flash Memory ◽  
Memory Performance ◽  
Memory Device ◽  
Blocking Layer ◽  
High Temperature Annealing ◽  
Charge Trap ◽  
A Charge

Cubic-Structured HfLaO for the Blocking Layer of a Charge-Trap Type Flash Memory Device

2010 ◽  
Vol 3 (9) ◽  
pp. 091501 ◽  
Author(s):  
Jong Kyung Park ◽  
Youngmin Park ◽  
Myeong Ho Song ◽  
Sung Kyu Lim ◽  
Jae Sub Oh ◽  
...  
Keyword(s):  
Flash Memory ◽  
Memory Device ◽  
Blocking Layer ◽  
Charge Trap ◽  
A Charge

A Charge Trap Folded nand Flash Memory Device With Band-Gap-Engineered Storage Node

2011 ◽  
Vol 58 (2) ◽  
pp. 288-295 ◽  
Author(s):  
Seongjae Cho ◽  
Won Bo Shim ◽  
Yoon Kim ◽  
Jang-Gn Yun ◽  
Jong Duk Lee ◽  
...  
Keyword(s):  
Band Gap ◽  
Flash Memory ◽  
Memory Device ◽  
Nand Flash ◽  
Nand Flash Memory ◽  
Charge Trap ◽  
Storage Node ◽  
A Charge

A Charge-Trap Memory Device with a Composition-Modulated Zr-Silicate High- k Dielectric Multilayer Structure

2010 ◽  
Vol 27 (6) ◽  
pp. 068502 ◽  
Author(s):  
Lv Shi-Cheng ◽  
Ge Zhong-Yang ◽  
Zhou Yue ◽  
Xu Bo ◽  
Gao Li-Gang ◽  
...  
Keyword(s):  
Multilayer Structure ◽  
Memory Device ◽  
Charge Trap ◽  
High K ◽  
High K Dielectric ◽  
A Charge ◽  
Dielectric Multilayer

Design of a Robust Memristive Spiking Neuromorphic System with Unsupervised Learning in Hardware

2021 ◽  
Vol 17 (4) ◽  
pp. 1-26
Author(s):  
Md Musabbir Adnan ◽  
Sagarvarma Sayyaparaju ◽  
Samuel D. Brown ◽  
Mst Shamim Ara Shawkat ◽  
Catherine D. Schuman ◽  
...  
Keyword(s):  
Unsupervised Learning ◽  
Recognition Task ◽  
Single Layer ◽  
Process Variations ◽  
Spike Timing ◽  
System Level ◽  
Design Parameters ◽  
Digital Pulse ◽  
Neuromorphic System ◽  
The Impact

Spiking neural networks (SNN) offer a power efficient, biologically plausible learning paradigm by encoding information into spikes. The discovery of the memristor has accelerated the progress of spiking neuromorphic systems, as the intrinsic plasticity of the device makes it an ideal candidate to mimic a biological synapse. Despite providing a nanoscale form factor, non-volatility, and low-power operation, memristors suffer from device-level non-idealities, which impact system-level performance. To address these issues, this article presents a memristive crossbar-based neuromorphic system using unsupervised learning with twin-memristor synapses, fully digital pulse width modulated spike-timing-dependent plasticity, and homeostasis neurons. The implemented single-layer SNN was applied to a pattern-recognition task of classifying handwritten-digits. The performance of the system was analyzed by varying design parameters such as number of training epochs, neurons, and capacitors. Furthermore, the impact of memristor device non-idealities, such as device-switching mismatch, aging, failure, and process variations, were investigated and the resilience of the proposed system was demonstrated.

scholarly journals Gradually Modified Conductance in the Self-Compliance Region of an Atomic-Layer-Deposited Pt/TiO2/HfAlOx/TiN RRAM Device

Metals ◽  
2021 ◽  
Vol 11 (8) ◽  
pp. 1199
Author(s):  
Hojeong Ryu ◽  
Sungjun Kim
Keyword(s):  
Photoelectron Spectroscopy ◽  
Depth Profiling ◽  
Atomic Layer ◽  
High Resistance State ◽  
Long Term Potentiation ◽  
Memory Device ◽  
Bipolar Resistive Switching ◽  
Term Potentiation ◽  
Resistance State ◽  
Neuromorphic System

This study presents conductance modulation in a Pt/TiO2/HfAlOx/TiN resistive memory device in the compliance region for neuromorphic system applications. First, the chemical and material characteristics of the atomic-layer-deposited films were verified by X-ray photoelectron spectroscopy depth profiling. The low-resistance state was effectively controlled by the compliance current, and the high-resistance state was adjusted by the reset stop voltage. Stable endurance and retention in bipolar resistive switching were achieved. When a compliance current of 1 mA was imposed, only gradual switching was observed in the reset process. Self-compliance was used after an abrupt set transition to achieve a gradual set process. Finally, 10 cycles of long-term potentiation and depression were obtained in the compliance current region for neuromorphic system applications.

scholarly journals Artificial synapses with a sponge-like double-layer porous oxide memristor

2021 ◽  
Vol 13 (1) ◽  
Author(s):  
Qin Gao ◽  
Anping Huang ◽  
Jing Zhang ◽  
Yuhang Ji ◽  
Jingjing Zhang ◽  
...  
Keyword(s):  
Double Layer ◽  
Layer Structure ◽  
Learning Experience ◽  
Rapid Development ◽  
Spike Timing ◽  
Synaptic Functions ◽  
Intelligence Studies ◽  
Bionic Structure ◽  
Porous Oxide ◽  
The Stability

AbstractClosely following the rapid development of artificial intelligence, studies of the human brain and neurobiology are focusing on the biological mechanisms of neurons and synapses. Herein, a memory system employing a nanoporous double-layer structure for simulation of synaptic functions is described. The sponge-like double-layer porous (SLDLP) oxide stack of Pt/porous LiCoO2/porous SiO2/Si is designed as presynaptic and postsynaptic membranes. This bionic structure exhibits high ON–OFF ratios up to 108 during the stability test, and data can be maintained for 105 s despite a small read voltage of 0.5 V. Typical synaptic functions, such as nonlinear transmission characteristics, spike-timing-dependent plasticity, and learning-experience behaviors, are achieved simultaneously with this device. Based on the hydrodynamic transport mechanism of water molecules in porous sponges and the principle of water storage, the synaptic behavior of the device is discussed. The SLDLP oxide memristor is very promising due to its excellent synaptic performance and potential in neuromorphic computing.

Sign in / Sign up

Export Citation Format

Share Document