scholarly journals Body-Effect-Free OLED-on-Silicon Pixel Circuit Based on Capacitive Division to Extend Data Voltage Range

Electronics ◽  
2021 ◽  
Vol 10 (19) ◽  
pp. 2351
Author(s):  
Jina Bae ◽  
Hyoungsik Nam
Keyword(s):  
Threshold Voltage ◽  
Supply Voltage ◽  
The Body ◽  
Body Effect ◽  
Voltage Range ◽  
Error Range ◽  
Large Current ◽  
Voltage Variation ◽  
Current Error ◽  
Node Voltage

This paper proposes an OLED pixel compensation circuit that copes with threshold voltage variation, narrow data voltage range, and body effect on a backplane of silicon-based transistors. It consists of six PMOS transistors and two capacitors. The data voltage range is extended by the capacitor division with two capacitors, and the connection of both source and gate nodes to the supply voltage makes the driving transistor free from the body effect. In addition, the reference voltage is used to initialize the gate node voltage of the driving transistor as well as to adjust the data voltage region. By the SPICE simulation, it is verified that the current error over the threshold voltage variations of ±10 mV is reduced to be −1.200% to 0.964% at the maximum current range of around 8 nA, and the data voltage range is extended to 3.4 V, compared to the large current error range from −21.46% to 27.36% and the data voltage range of 0.41 V in the basic 2T1C circuit. In addition, the body-effect-free circuit outperforms the latest 4T1C circuit of the current error range from −3.279% to 3.388%.

Compact CMOS Analog Multiplier Free of Voltage Reference Generators

2020 ◽  
Vol 15 (3) ◽  
pp. 1-12
Author(s):  
Ana Isabela Araújo Cunha ◽  
Antonio José Sobrinho De Sousa ◽  
Edson Pinto Santana ◽  
Robson Nunes De Lima ◽  
Fabian Souza De Andrade ◽  
...  
Keyword(s):  
Supply Voltage ◽  
Harmonic Distortion ◽  
Current Mode ◽  
Input Voltage ◽  
Voltage Reference ◽  
Analog Multiplier ◽  
Voltage Range ◽  
Voltage Variation ◽  
Static Power ◽  
Four Quadrant

This work presents a CMOS four quadrant analog multiplier architecture for application as the synapse element in analog cellular neural networks. For this reason, the circuit has voltage-mode inputs and a current-mode output and the chief design targets are compactness and low energy consumption. A signal application method is proposed that avoids voltage reference generators, which contributes to reduce sensitivity to supply voltage variation. Performance analysis through simulation has been accomplished for a design in CMOS 130 nm technology with 163 µm2 total active area. The circuit features ±50 mV input voltage range, 86 µW static power and ‑28.4 dB maximum total harmonic distortion. A simple technique for manual calibration is also presented.

scholarly journals A novel supply voltage compensation circuit for the inverter switching point

2017 ◽  
Vol 30 (4) ◽  
pp. 627-638 ◽  
Author(s):  
Alexandru-Mihai Antonescu ◽  
Lidia Dobrescu
Keyword(s):  
Supply Voltage ◽  
Switching Point ◽  
Compensation Circuit ◽  
Back Gate ◽  
Voltage Range ◽  
Voltage Variation ◽  
Voltage Change ◽  
Gate Effect ◽  
Voltage Compensation

The present work proposes an innovative circuit that is able to compensate the inverter switching point voltage variation due to supply voltage change. The circuit is designed to work for a 1.6V to 2V supply voltage range. The operation principle includes the back gate effect and an original transistor switching.

scholarly journals Near-Threshold Voltage Design Techniques for Heterogenous Manycore System-on-Chips

2020 ◽  
Vol 10 (2) ◽  
pp. 16
Author(s):  
Sriram Vangal ◽  
Somnath Paul ◽  
Steven Hsu ◽  
Amit Agarwal ◽  
Ram Krishnamurthy ◽  
...  
Keyword(s):  
Energy Efficiency ◽  
Threshold Voltage ◽  
Supply Voltage ◽  
Energy Budgets ◽  
Voltage Range ◽  
Ip Blocks ◽  
Test Chips ◽  
Many Core ◽  
Near Threshold ◽  
Design Techniques

Aggressive power supply scaling into the near-threshold voltage (NTV) region holds great potential for applications with strict energy budgets, since the energy efficiency peaks as the supply voltage approaches the threshold voltage (VT) of the CMOS transistors. The improved silicon energy efficiency promises to fit more cores in a given power envelope. As a result, many-core Near-threshold computing (NTC) has emerged as an attractive paradigm. Realizing energy-efficient heterogenous system on chips (SoCs) necessitates key NTV-optimized ingredients, recipes and IP blocks; including CPUs, graphic vector engines, interconnect fabrics and mm-scale microcontroller (MCU) designs. We discuss application of NTV design techniques, necessary for reliable operation over a wide supply voltage range—from nominal down to the NTV regime, and for a variety of IPs. Evaluation results spanning Intel’s 32-, 22- and 14-nm CMOS technologies across four test chips are presented, confirming substantial energy benefits that scale well with Moore’s law.

РАЗРАБОТКА И ИССЛЕДОВАНИЕ СВЕТОДИОДНОГО ДРАЙВЕРА

2020 ◽  
Vol 96 (3s) ◽  
pp. 631-634
Author(s):  
О.Л. Климов ◽  
С.М. Игнатьев ◽  
И.В. Ермаков
Keyword(s):  
Research And Development ◽  
Supply Voltage ◽  
Cmos Technology ◽  
Output Current ◽  
Led Driver ◽  
Voltage Range ◽  
Temperature Range ◽  
Current Consumption ◽  
Current Error

Представлены результаты разработки и исследования светодиодного драйвера в КМОП-технологии уровня 0,6 мкм. Погрешность выходного тока драйвера с учетом технологического разброса в диапазоне напряжений питания от 4 до 20 В и диапазоне температур от -60 до +125 °С составила менее ±5 % от номинального значения 3,55 мА. Ток потребления драйвера - менее 100 мкА, а занимаемая площадь - 0,3 х 0,3 мм2. The paper presents the research and development of the LED driver in 0.6 μm CMOS technology. When the supply voltage range is from 4 to 20 V and temperature range is from -60 to +125 °C the output current error of the LED driver taking into account the process corners is less than ±5 % of the nominal value 3.55 mA. The LED driver current consumption is less than 100 uA and the area is less than 0.3 х 0.3 mm2.

scholarly journals Consequences of Body-Biasing Technique on SRAM Memory

2019 ◽  
Vol 8 (10) ◽  
pp. 2922-2925
Keyword(s):  
Threshold Voltage ◽  
High Speed ◽  
Supply Voltage ◽  
Tunneling Current ◽  
Memory Device ◽  
Leakage Power ◽  
The Body ◽  
Low Leakage ◽  
Body Biasing ◽  
Body Bias

The circuit changes the threshold voltage effectively with a definite delay and power by altering the body biasing of the transistors. The body bias is employed to govern the frequency and leakage of the memory device. The threshold voltage of individual transistor is decreases by applying the reverse body bias (RBB) and increases with forward body bias (FBB). This paper presents the viability of RBB to decrease the leakage power and increase in the speed of operations for SRAM circuit. The investigation of RBB dependencies on various performance parameters are analyzed. It is observed that the leakage power improves by 30.32% on applying RBB voltage compared to zero body bias while the transient power increases by 3.22% but decrease of delay by 84.56% dominates on it. Because of this the overall energy consumption reduces by 84.06%. Further the simulation work is carried out to see effect of supply voltage variation on leakage power at different RBB voltage and temperature. Therefore, the RBB scheme is beneficial for devices of low leakage, low energy and high speed of operation but this RBB voltage is limited by band-to-band tunneling current.

Sign in / Sign up

Export Citation Format

Share Document